quick_dump: vlv: add missing dpio phy registers

Also move the phy register block to its logical place.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

3 files changed, 199 insertions, 62 deletions

diff --git a/tools/quick_dump/valleyview b/tools/quick_dump/valleyview
index 769f05f6..4c5705fd 100644
--- a/tools/quick_dump/valleyview
+++ b/tools/quick_dump/valleyview
@@ -1,11 +1,11 @@
 vlv_pipe_a.txt
 vlv_pipe_b.txt
 vlv_display_base.txt
+vlv_dpio_phy.txt
 vlv_dsi.txt
 base_interrupt.txt
 base_other.txt
 base_power.txt
 base_rings.txt
 gen7_other.txt
-vlv_dpio.txt
 vlv_flisdsi.txt
diff --git a/tools/quick_dump/vlv_dpio.txt b/tools/quick_dump/vlv_dpio.txt
deleted file mode 100644
index df8dbb5f..00000000
--- a/tools/quick_dump/vlv_dpio.txt
+++ /dev/null
@@ -1,61 +0,0 @@
-('DPIO_CTL', '0x182110', '')
-('DPIO_TX3_DW4_CH0', '0x690', 'DPIO')
-('DPIO_TX3_DW4_CH1', '0x2a90', 'DPIO')
-('DPIO_PLL_DW3_CH0', '0x800c', 'DPIO')
-('DPIO_PLL_DW3_CH1', '0x802c', 'DPIO')
-('DPIO_PLL_DW5_CH0', '0x8014', 'DPIO')
-('DPIO_PLL_DW5_CH1', '0x8034', 'DPIO')
-('DPIO_PLL_DW7_CH0', '0x801c', 'DPIO')
-('DPIO_PLL_DW7_CH1', '0x803c', 'DPIO')
-('DPIO_PLL_DW8_CH0', '0x8040', 'DPIO')
-('DPIO_PLL_DW8_CH1', '0x8060', 'DPIO')
-('DPIO_PLL_DW9_BCAST', '0xc044', 'DPIO')
-('DPIO_PLL_DW9_CH0', '0x8044', 'DPIO')
-('DPIO_PLL_DW9_CH1', '0x8064', 'DPIO')
-('DPIO_PLL_DW10_CH0', '0x8048', 'DPIO')
-('DPIO_PLL_DW10_CH1', '0x8068', 'DPIO')
-('DPIO_PLL_DW11_CH0', '0x804c', 'DPIO')
-('DPIO_PLL_DW11_CH1', '0x806c', 'DPIO')
-('DPIO_REF_DW13', '0x80ac', 'DPIO')
-('DPIO_CMN_DW0', '0x8100', 'DPIO')
-('DPIO_CMN_DW4', '0x810c', 'DPIO')
-('DPIO_PCS_DW0_CH0', '0x8200', 'DPIO')
-('DPIO_PCS_DW0_CH1', '0x8400', 'DPIO')
-('DPIO_PCS_DW1_CH0', '0x8204', 'DPIO')
-('DPIO_PCS_DW1_CH1', '0x8404', 'DPIO')
-('DPIO_PCS01_DW8_CH0', '0x0220', 'DPIO')
-('DPIO_PCS23_DW8_CH0', '0x0420', 'DPIO')
-('DPIO_PCS01_DW8_CH1', '0x2620', 'DPIO')
-('DPIO_PCS23_DW8_CH1', '0x2820', 'DPIO')
-('DPIO_PCS_DW8_CH0', '0x8220', 'DPIO')
-('DPIO_PCS_DW8_CH1', '0x8420', 'DPIO')
-('DPIO_PCS_DW9_CH0', '0x8224', 'DPIO')
-('DPIO_PCS_DW9_CH1', '0x8424', 'DPIO')
-('DPIO_PCS_DW11_CH0', '0x822c', 'DPIO')
-('DPIO_PCS_DW11_CH1', '0x842c', 'DPIO')
-('DPIO_PCS_DW12_CH0', '0x8230', 'DPIO')
-('DPIO_PCS_DW12_CH1', '0x8430', 'DPIO')
-('DPIO_PCS_DW14_CH0', '0x8238', 'DPIO')
-('DPIO_PCS_DW14_CH1', '0x8438', 'DPIO')
-('DPIO_PCS_DW23_CH0', '0x825c', 'DPIO')
-('DPIO_PCS_DW23_CH1', '0x845c', 'DPIO')
-('DPIO_TX_DW2_CH0', '0x8288', 'DPIO')
-('DPIO_TX_DW2_CH1', '0x8488', 'DPIO')
-('DPIO_TX_DW3_CH0', '0x828c', 'DPIO')
-('DPIO_TX_DW3_CH1', '0x848c', 'DPIO')
-('DPIO_TX_DW4_CH0', '0x8290', 'DPIO')
-('DPIO_TX_DW4_CH1', '0x8490', 'DPIO')
-('DPIO_TX_DW5_CH0', '0x8294', 'DPIO')
-('DPIO_TX_DW5_CH1', '0x8494', 'DPIO')
-('DPIO_TX_DW11_CH0', '0x82ac', 'DPIO')
-('DPIO_TX_DW11_CH1', '0x84ac', 'DPIO')
-('DPIO_TX_DW14_CH0', '0x82b8', 'DPIO')
-('DPIO_TX_DW14_CH1', '0x84b8', 'DPIO')
-('lane1 ctl ddi1', '0x2600', 'DPIO')
-('lane1 ctl ddi1', '0x2604', 'DPIO')
-('lane2 ctl ddi1', '0x2800', 'DPIO')
-('lane3 ctl ddi1', '0x2804', 'DPIO')
-('lane1 ctl ddi0', '0x200', 'DPIO')
-('lane1 ctl ddi0', '0x204', 'DPIO')
-('lane2 ctl ddi0', '0x400', 'DPIO')
-('lane3 ctl ddi0', '0x404', 'DPIO')
diff --git a/tools/quick_dump/vlv_dpio_phy.txt b/tools/quick_dump/vlv_dpio_phy.txt
new file mode 100644
index 00000000..622a6156
--- /dev/null
+++ b/tools/quick_dump/vlv_dpio_phy.txt
@@ -0,0 +1,198 @@
+('PLL1_DW0',		'0x8000', 'DPIO')
+('PLL1_DW1',		'0x8004', 'DPIO')
+('PLL1_DW2',		'0x8008', 'DPIO')
+('PLL1_DW3',		'0x800C', 'DPIO')
+('PLL1_DW4',		'0x8010', 'DPIO')
+('PLL1_DW5',		'0x8014', 'DPIO')
+('PLL1_DW6',		'0x8018', 'DPIO')
+('PLL1_DW7',		'0x801C', 'DPIO')
+('PLL2_DW0',		'0x8020', 'DPIO')
+('PLL2_DW1',		'0x8024', 'DPIO')
+('PLL2_DW2',		'0x8028', 'DPIO')
+('PLL2_DW3',		'0x802C', 'DPIO')
+('PLL2_DW4',		'0x8030', 'DPIO')
+('PLL2_DW5',		'0x8034', 'DPIO')
+('PLL2_DW6',		'0x8038', 'DPIO')
+('PLL2_DW7',		'0x803C', 'DPIO')
+('PLL1_EXT_DW0',	'0x8040', 'DPIO')
+('PLL1_EXT_DW1',	'0x8044', 'DPIO')
+('PLL1_EXT_DW2',	'0x8048', 'DPIO')
+('PLL1_EXT_DW3',	'0x804C', 'DPIO')
+('PLL1_EXT_DW4',	'0x8050', 'DPIO')
+('PLL1_EXT_DW5',	'0x8054', 'DPIO')
+('PLL1_EXT_DW6',	'0x8058', 'DPIO')
+('PLL1_EXT_DW7',	'0x805C', 'DPIO')
+('PLL2_EXT_DW0',	'0x8060', 'DPIO')
+('PLL2_EXT_DW1',	'0x8064', 'DPIO')
+('PLL2_EXT_DW2',	'0x8068', 'DPIO')
+('PLL2_EXT_DW3',	'0x806C', 'DPIO')
+('PLL2_EXT_DW4',	'0x8070', 'DPIO')
+('PLL2_EXT_DW5',	'0x8074', 'DPIO')
+('PLL2_EXT_DW6',	'0x8078', 'DPIO')
+('PLL2_EXT_DW7',	'0x807C', 'DPIO')
+('REF_DW0',		'0x80A0', 'DPIO')
+('REF_DW1',		'0x80A4', 'DPIO')
+('REF_DW2',		'0x80A8', 'DPIO')
+('REF_DW3',		'0x80AC', 'DPIO')
+('REF_DW4',		'0x80B0', 'DPIO')
+('REF_DW5',		'0x80B4', 'DPIO')
+('REF_DW6',		'0x80B8', 'DPIO')
+('REF_DW7',		'0x80BC', 'DPIO')
+('REF_DW8',		'0x80C0', 'DPIO')
+('REF_DW9',		'0x80C4', 'DPIO')
+('REF_DW10',		'0x80C8', 'DPIO')
+('REF_DW11',		'0x80CC', 'DPIO')
+('REF_DW12',		'0x80D0', 'DPIO')
+('REF_DW13',		'0x80D4', 'DPIO')
+('REF_DW14',		'0x80D8', 'DPIO')
+('REF_DW15',		'0x80DC', 'DPIO')
+('CL_DW0',		'0x8100', 'DPIO')
+('CL_DW1',		'0x8104', 'DPIO')
+('CL_DW2',		'0x8108', 'DPIO')
+('CL_DW3',		'0x810C', 'DPIO')
+('CL_DW4',		'0x8110', 'DPIO')
+('CL_DW5',		'0x8114', 'DPIO')
+('CL_DW6',		'0x8118', 'DPIO')
+('CL_DW7',		'0x811C', 'DPIO')
+('CL_DW8',		'0x8120', 'DPIO')
+('CL_DW9',		'0x8124', 'DPIO')
+('CL_DW10',		'0x8128', 'DPIO')
+('CL_DW11',		'0x812C', 'DPIO')
+('CL_DW12',		'0x8130', 'DPIO')
+('CL_DW13',		'0x8134', 'DPIO')
+('CL_DW14',		'0x8138', 'DPIO')
+('CL_DW15',		'0x813C', 'DPIO')
+('CL_DW16',		'0x8140', 'DPIO')
+('CL_DW17',		'0x8144', 'DPIO')
+('CL_DW18',		'0x8148', 'DPIO')
+('CL_DW19',		'0x814C', 'DPIO')
+('CL_DW20',		'0x8150', 'DPIO')
+('CL_DW21',		'0x8154', 'DPIO')
+('CL_DW22',		'0x8158', 'DPIO')
+('CL_DW23',		'0x815C', 'DPIO')
+('CL_DW24',		'0x8160', 'DPIO')
+('CL_DW25',		'0x8164', 'DPIO')
+('CL_DW26',		'0x8168', 'DPIO')
+('CL_DW27',		'0x816C', 'DPIO')
+('CL_DW28',		'0x8170', 'DPIO')
+('CL_DW29',		'0x8174', 'DPIO')
+('CL_DW30',		'0x8178', 'DPIO')
+('CL_DW31',		'0x817C', 'DPIO')
+('PCS01_CH0_DW0',	'0x0200', 'DPIO')
+('PCS01_CH0_DW1',	'0x0204', 'DPIO')
+('PCS01_CH0_DW2',	'0x0208', 'DPIO')
+('PCS01_CH0_DW3',	'0x020C', 'DPIO')
+('PCS01_CH0_DW4',	'0x0210', 'DPIO')
+('PCS01_CH0_DW5',	'0x0214', 'DPIO')
+('PCS01_CH0_DW6',	'0x0218', 'DPIO')
+('PCS01_CH0_DW7',	'0x021C', 'DPIO')
+('PCS01_CH0_DW8',	'0x0220', 'DPIO')
+('PCS01_CH0_DW9',	'0x0224', 'DPIO')
+('PCS01_CH0_DW10',	'0x0228', 'DPIO')
+('PCS01_CH0_DW11',	'0x022C', 'DPIO')
+('PCS01_CH0_DW12',	'0x0230', 'DPIO')
+('PCS01_CH0_DW13',	'0x0234', 'DPIO')
+('PCS01_CH0_DW14',	'0x0238', 'DPIO')
+('PCS01_CH0_DW15',	'0x023C', 'DPIO')
+('PCS01_CH0_DW16',	'0x0240', 'DPIO')
+('PCS01_CH0_DW17',	'0x0244', 'DPIO')
+('PCS01_CH0_DW18',	'0x0248', 'DPIO')
+('PCS01_CH0_DW19',	'0x024C', 'DPIO')
+('PCS01_CH0_DW20',	'0x0250', 'DPIO')
+('PCS01_CH0_DW21',	'0x0254', 'DPIO')
+('PCS01_CH0_DW22',	'0x0258', 'DPIO')
+('PCS01_CH0_DW23',	'0x025C', 'DPIO')
+('PCS01_CH0_DW24',	'0x0260', 'DPIO')
+('TX0_CH0_DW0',		'0x0080', 'DPIO')
+('TX0_CH0_DW1',		'0x0084', 'DPIO')
+('TX0_CH0_DW2',		'0x0088', 'DPIO')
+('TX0_CH0_DW3',		'0x008C', 'DPIO')
+('TX0_CH0_DW4',		'0x0090', 'DPIO')
+('TX0_CH0_DW5',		'0x0094', 'DPIO')
+('TX0_CH0_DW6',		'0x0098', 'DPIO')
+('TX0_CH0_DW7',		'0x009C', 'DPIO')
+('TX0_CH0_DW8',		'0x00A0', 'DPIO')
+('TX0_CH0_DW9',		'0x00A4', 'DPIO')
+('TX0_CH0_DW10',	'0x00A8', 'DPIO')
+('TX0_CH0_DW11',	'0x00AC', 'DPIO')
+('TX0_CH0_DW12',	'0x00B0', 'DPIO')
+('TX0_CH0_DW13',	'0x00B4', 'DPIO')
+('TX0_CH0_DW14',	'0x00B8', 'DPIO')
+('TX0_CH0_DW15',	'0x00BC', 'DPIO')
+('TX0_CH0_DW16',	'0x00C0', 'DPIO')
+('TX1_CH0_DW0',		'0x0280', 'DPIO')
+('TX1_CH0_DW1',		'0x0284', 'DPIO')
+('TX1_CH0_DW2',		'0x0288', 'DPIO')
+('TX1_CH0_DW3',		'0x028C', 'DPIO')
+('TX1_CH0_DW4',		'0x0290', 'DPIO')
+('TX1_CH0_DW5',		'0x0294', 'DPIO')
+('TX1_CH0_DW6',		'0x0298', 'DPIO')
+('TX1_CH0_DW7',		'0x029C', 'DPIO')
+('TX1_CH0_DW8',		'0x02A0', 'DPIO')
+('TX1_CH0_DW9',		'0x02A4', 'DPIO')
+('TX1_CH0_DW10',	'0x02A8', 'DPIO')
+('TX1_CH0_DW11',	'0x02AC', 'DPIO')
+('TX1_CH0_DW12',	'0x02B0', 'DPIO')
+('TX1_CH0_DW13',	'0x02B4', 'DPIO')
+('TX1_CH0_DW14',	'0x02B8', 'DPIO')
+('TX1_CH0_DW15',	'0x02BC', 'DPIO')
+('TX1_CH0_DW16',	'0x02C0', 'DPIO')
+('PCS23_CH0_DW0',	'0x0400', 'DPIO')
+('PCS23_CH0_DW1',	'0x0404', 'DPIO')
+('PCS23_CH0_DW2',	'0x0408', 'DPIO')
+('PCS23_CH0_DW3',	'0x040C', 'DPIO')
+('PCS23_CH0_DW4',	'0x0410', 'DPIO')
+('PCS23_CH0_DW5',	'0x0414', 'DPIO')
+('PCS23_CH0_DW6',	'0x0418', 'DPIO')
+('PCS23_CH0_DW7',	'0x041C', 'DPIO')
+('PCS23_CH0_DW8',	'0x0420', 'DPIO')
+('PCS23_CH0_DW9',	'0x0424', 'DPIO')
+('PCS23_CH0_DW10',	'0x0428', 'DPIO')
+('PCS23_CH0_DW11',	'0x042C', 'DPIO')
+('PCS23_CH0_DW12',	'0x0430', 'DPIO')
+('PCS23_CH0_DW13',	'0x0434', 'DPIO')
+('PCS23_CH0_DW14',	'0x0438', 'DPIO')
+('PCS23_CH0_DW15',	'0x043C', 'DPIO')
+('PCS23_CH0_DW16',	'0x0440', 'DPIO')
+('PCS23_CH0_DW17',	'0x0444', 'DPIO')
+('PCS23_CH0_DW18',	'0x0448', 'DPIO')
+('PCS23_CH0_DW19',	'0x044C', 'DPIO')
+('PCS23_CH0_DW20',	'0x0450', 'DPIO')
+('PCS23_CH0_DW21',	'0x0454', 'DPIO')
+('PCS23_CH0_DW22',	'0x0458', 'DPIO')
+('PCS23_CH0_DW23',	'0x045C', 'DPIO')
+('PCS23_CH0_DW24',	'0x0460', 'DPIO')
+('TX2_CH0_DW0',		'0x0480', 'DPIO')
+('TX2_CH0_DW1',		'0x0484', 'DPIO')
+('TX2_CH0_DW2',		'0x0488', 'DPIO')
+('TX2_CH0_DW3',		'0x048C', 'DPIO')
+('TX2_CH0_DW4',		'0x0490', 'DPIO')
+('TX2_CH0_DW5',		'0x0494', 'DPIO')
+('TX2_CH0_DW6',		'0x0498', 'DPIO')
+('TX2_CH0_DW7',		'0x049C', 'DPIO')
+('TX2_CH0_DW8',		'0x04A0', 'DPIO')
+('TX2_CH0_DW9',		'0x04A4', 'DPIO')
+('TX2_CH0_DW10',	'0x04A8', 'DPIO')
+('TX2_CH0_DW11',	'0x04AC', 'DPIO')
+('TX2_CH0_DW12',	'0x04B0', 'DPIO')
+('TX2_CH0_DW13',	'0x04B4', 'DPIO')
+('TX2_CH0_DW14',	'0x04B8', 'DPIO')
+('TX2_CH0_DW15',	'0x04BC', 'DPIO')
+('TX2_CH0_DW16',	'0x04C0', 'DPIO')
+('TX3_CH0_DW0',		'0x0680', 'DPIO')
+('TX3_CH0_DW1',		'0x0684', 'DPIO')
+('TX3_CH0_DW2',		'0x0688', 'DPIO')
+('TX3_CH0_DW3',		'0x068C', 'DPIO')
+('TX3_CH0_DW4',		'0x0690', 'DPIO')
+('TX3_CH0_DW5',		'0x0694', 'DPIO')
+('TX3_CH0_DW6',		'0x0698', 'DPIO')
+('TX3_CH0_DW7',		'0x069C', 'DPIO')
+('TX3_CH0_DW8',		'0x06A0', 'DPIO')
+('TX3_CH0_DW9',		'0x06A4', 'DPIO')
+('TX3_CH0_DW10',	'0x06A8', 'DPIO')
+('TX3_CH0_DW11',	'0x06AC', 'DPIO')
+('TX3_CH0_DW12',	'0x06B0', 'DPIO')
+('TX3_CH0_DW13',	'0x06B4', 'DPIO')
+('TX3_CH0_DW14',	'0x06B8', 'DPIO')
+('TX3_CH0_DW15',	'0x06BC', 'DPIO')
+('TX3_CH0_DW16',	'0x06C0', 'DPIO')