diff options
author | Patrice Mandin <pmandin@caramail.com> | 2008-08-28 19:04:05 +0200 |
---|---|---|
committer | Patrice Mandin <pmandin@caramail.com> | 2008-08-28 19:04:05 +0200 |
commit | e64e3bd6240a70ef7826c3d32e448ef6895f936d (patch) | |
tree | 614c0ba63ab2006bfa23f1fc020b4ef0f93f6954 | |
parent | 48328f8224829260a17a84a92908ff59ab0ab0eb (diff) |
cleanup
-rw-r--r-- | tcl_init.c | 74 |
1 files changed, 28 insertions, 46 deletions
@@ -7,6 +7,15 @@ static void tcl_fp_color(void) { +#if 0 +000428e4 size 1, subchannel 1 (0xbeef3097),offset 0x08e4,increment +# NV30_TCL_PRIMITIVE_3D_ACTIVE_PROGRAM = 0x07bfef01 +# -- program at 0x0xad7e3000 - 0x20D000 +# 0x01803e81 0x1c9dc901 0x0001c900 0x0001c900 +# INST 0: MOVX R0 (TR0.xyzw), attrib.color + END +07bfef01 NV30TCL.FP_ACTIVE_PROGRAM = DMA0=TRUE | DMA1=FALSE | OFFSET=0x07bfef00 +#endif + volatile unsigned int *fragprog_map; uint64_t fragprog_offset; @@ -34,10 +43,23 @@ static void tcl_fp_color(void) BEGIN_RING(NvSub3D, NV34TCL_FP_ACTIVE_PROGRAM, 1); OUT_RING ((uint32_t)fragprog_offset| NV34TCL_FP_ACTIVE_PROGRAM_DMA0); + BEGIN_RING(NvSub3D, NV34TCL_FP_CONTROL, 1); + OUT_RING(0); + BEGIN_RING(NvSub3D, NV34TCL_FP_REG_CONTROL, 1); + OUT_RING((1<<16)|4); } static void tcl_fp_nop(void) { +#if 0 +000428e4 size 1, subchannel 1 (0xbeef3097),offset 0x08e4,increment +# NV30_TCL_PRIMITIVE_3D_ACTIVE_PROGRAM = 0x07bfef41 +# -- program at 0x0xad7e3010 - 0x20D010 +# 0x00000001 0x00000000 0x00000000 0x00000000 +# INST 0: NOP (FL0.xxxx) + END +07bfef41 NV30TCL.FP_ACTIVE_PROGRAM = DMA0=TRUE | DMA1=FALSE | OFFSET=0x07bfef40 +#endif + volatile unsigned int *fragprog_map; uint64_t fragprog_offset; @@ -57,6 +79,10 @@ static void tcl_fp_nop(void) BEGIN_RING(NvSub3D, NV34TCL_FP_ACTIVE_PROGRAM, 1); OUT_RING ((uint32_t)fragprog_offset| NV34TCL_FP_ACTIVE_PROGRAM_DMA0); + BEGIN_RING(NvSub3D, NV34TCL_FP_CONTROL, 1); + OUT_RING(0x40); + BEGIN_RING(NvSub3D, NV34TCL_FP_REG_CONTROL, 1); + OUT_RING((1<<16)|4); } void tcl_init(void) @@ -167,20 +193,6 @@ void tcl_init(void) BEGIN_RING(NvSub3D, NV34TCL_RC_ENABLE, 1); OUT_RING(0); -#if 0 -000428e4 size 1, subchannel 1 (0xbeef3097),offset 0x08e4,increment -# NV30_TCL_PRIMITIVE_3D_ACTIVE_PROGRAM = 0x07bfef01 -# -- program at 0x0xad7e3000 - 0x20D000 -# 0x01803e81 0x1c9dc901 0x0001c900 0x0001c900 -# INST 0: MOVX R0 (TR0.xyzw), attrib.color + END -07bfef01 NV30TCL.FP_ACTIVE_PROGRAM = DMA0=TRUE | DMA1=FALSE | OFFSET=0x07bfef00 -#endif - tcl_fp_color(); - BEGIN_RING(NvSub3D, NV34TCL_FP_CONTROL, 1); - OUT_RING(0); - BEGIN_RING(NvSub3D, NV34TCL_FP_REG_CONTROL, 1); - OUT_RING((1<<16)|4); - BEGIN_RING(NvSub3D, NV34TCL_TX_UNITS_ENABLE, 1); OUT_RING(0); for (i=0; i<4; i++) { @@ -368,38 +380,8 @@ void tcl_init(void) OUT_RING(0); } -#if 0 -000428e4 size 1, subchannel 1 (0xbeef3097),offset 0x08e4,increment -# NV30_TCL_PRIMITIVE_3D_ACTIVE_PROGRAM = 0x07bfef41 -# -- program at 0x0xad7e3010 - 0x20D010 -# 0x00000001 0x00000000 0x00000000 0x00000000 -# INST 0: NOP (FL0.xxxx) + END -07bfef41 NV30TCL.FP_ACTIVE_PROGRAM = DMA0=TRUE | DMA1=FALSE | OFFSET=0x07bfef40 -#endif - /*tcl_fp_nop(); - - BEGIN_RING(NvSub3D, NV34TCL_FP_CONTROL, 1); - OUT_RING(0x40); - BEGIN_RING(NvSub3D, NV34TCL_FP_REG_CONTROL, 1); - OUT_RING((1<<16)|4);*/ - - /*BEGIN_RING(NvSub3D, NV34TCL_CLEAR_DEPTH_VALUE, 2); - OUT_RING(0); - OUT_RING(0); - BEGIN_RING(NvSub3D, NV34TCL_IDXBUF_ADDRESS, 1); - OUT_RING(0); - BEGIN_RING(NvSub3D, NV34TCL_CLEAR_BUFFERS, 1); - OUT_RING(0xf0);*/ - -#if 0 -000428e4 size 1, subchannel 1 (0xbeef3097),offset 0x08e4,increment -07bfef01 NV30TCL.FP_ACTIVE_PROGRAM = DMA0=TRUE | DMA1=FALSE | OFFSET=0x07bfef00 -#endif - - /*BEGIN_RING(NvSub3D, NV34TCL_FP_CONTROL, 1); - OUT_RING(0); - BEGIN_RING(NvSub3D, NV34TCL_FP_REG_CONTROL, 1); - OUT_RING((1<<16)|4);*/ + /*tcl_fp_nop();*/ + tcl_fp_color(); FIRE_RING(); } |