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authorLeon Alrae <leon.alrae@imgtec.com>2015-08-03 13:01:19 +0100
committerLeon Alrae <leon.alrae@imgtec.com>2015-08-04 11:10:20 +0100
commit060ebfef1a09b58fb219b3769b72efb407515bf1 (patch)
treeddc6736365baedf3620a29945edb33b7bfbad416 /target-mips
parente95edefbd0559e1d0aa09549641b5d9af1f96fac (diff)
target-mips: fix semihosting for microMIPS R6
In semihosting mode the SDBBP 1 instructions should trigger UHI syscall, but in QEMU this does not happen for recently added microMIPS R6. Consequently bare metal microMIPS R6 programs supporting UHI will not run. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'target-mips')
-rw-r--r--target-mips/translate.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c
index d1de35ad30..e299643e04 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -13278,10 +13278,14 @@ static void gen_pool16c_r6_insn(DisasContext *ctx)
break;
case R6_SDBBP16:
/* SDBBP16 */
- if (ctx->hflags & MIPS_HFLAG_SBRI) {
- generate_exception(ctx, EXCP_RI);
+ if (is_uhi(extract32(ctx->opcode, 6, 4))) {
+ gen_helper_do_semihosting(cpu_env);
} else {
- generate_exception(ctx, EXCP_DBp);
+ if (ctx->hflags & MIPS_HFLAG_SBRI) {
+ generate_exception(ctx, EXCP_RI);
+ } else {
+ generate_exception(ctx, EXCP_DBp);
+ }
}
break;
}