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authorTom Stellard <thomas.stellard@amd.com>2015-12-21 18:44:21 +0000
committerTom Stellard <thomas.stellard@amd.com>2015-12-21 18:44:21 +0000
commit0b69fa94843c911b2faaf48625a50857a42aa542 (patch)
tree10249ba71392a92f89e4d2d51610ea7326d0b261
parent0ce5d69ee3fb6415ed625805b50ddedc2ee6964f (diff)
AMDGPU/SI: Change assembly name for flat scratch registers to flat_scratch
This matches what the assembler accepts. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256177 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/AMDGPU/SIRegisterInfo.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/lib/Target/AMDGPU/SIRegisterInfo.td b/lib/Target/AMDGPU/SIRegisterInfo.td
index 227c4f535cb..51b501b5847 100644
--- a/lib/Target/AMDGPU/SIRegisterInfo.td
+++ b/lib/Target/AMDGPU/SIRegisterInfo.td
@@ -44,11 +44,11 @@ def EXEC : RegisterWithSubRegs<"EXEC", [EXEC_LO, EXEC_HI]>,
def SCC : SIReg<"scc", 253>;
def M0 : SIReg <"m0", 124>;
-def FLAT_SCR_LO : SIReg<"flat_scr_lo", 104>; // Offset in units of 256-bytes.
-def FLAT_SCR_HI : SIReg<"flat_scr_hi", 105>; // Size is the per-thread scratch size, in bytes.
+def FLAT_SCR_LO : SIReg<"flat_scratch_lo", 104>; // Offset in units of 256-bytes.
+def FLAT_SCR_HI : SIReg<"flat_scratch_hi", 105>; // Size is the per-thread scratch size, in bytes.
// Pair to indicate location of scratch space for flat accesses.
-def FLAT_SCR : RegisterWithSubRegs <"flat_scr", [FLAT_SCR_LO, FLAT_SCR_HI]>,
+def FLAT_SCR : RegisterWithSubRegs <"flat_scratch", [FLAT_SCR_LO, FLAT_SCR_HI]>,
DwarfRegAlias<FLAT_SCR_LO> {
let Namespace = "AMDGPU";
let SubRegIndices = [sub0, sub1];