summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>2024-04-19 11:34:11 -0700
committerDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>2024-05-01 10:47:19 -0700
commitd457519c942d4885d92f6367e42ca67f4c7471ad (patch)
tree1353c1f672be7323202b0b87b40b705117e25a4e
parente29a7a34c3cf140ceb2f994a8eae0b68d21e357e (diff)
drm/xe/gsc: Turn off GSCCS interrupts when disabling the engine
Starting on LNL, there is a new GSCCS interrupt that is triggered when the GSC engine reset fails. If the HW is in a bad state, this interrupt might end up being triggered even if we're not using the engine, which will lead to a warning because we'll see it as unexpected. Since there is no point in handling the interrupt in this scenario, we can just make sure the interrupts are off when we disable the engine. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Tested-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240419183412.1605782-1-daniele.ceraolospurio@intel.com
-rw-r--r--drivers/gpu/drm/xe/xe_hw_engine.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 4cc757457e01..ec69803152a2 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -717,6 +717,11 @@ static void check_gsc_availability(struct xe_gt *gt)
*/
if (!xe_uc_fw_is_available(&gt->uc.gsc.fw)) {
gt->info.engine_mask &= ~BIT(XE_HW_ENGINE_GSCCS0);
+
+ /* interrupts where previously enabled, so turn them off */
+ xe_mmio_write32(gt, GUNIT_GSC_INTR_ENABLE, 0);
+ xe_mmio_write32(gt, GUNIT_GSC_INTR_MASK, ~0);
+
drm_info(&xe->drm, "gsccs disabled due to lack of FW\n");
}
}