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authorFrancisco Jerez <currojerez@riseup.net>2020-04-07 17:22:10 -0700
committerFrancisco Jerez <currojerez@riseup.net>2020-04-28 23:00:28 -0700
commitd6ae079771bc8f5ae3a9e8a333c50a6cacb7a77c (patch)
treecbd50b3997a2794cef9f9671c21894abce18fc4e
parent35ee6b3d361b13c6380cf357ef05c9681639cfc1 (diff)
intel/fs/gen12: Fix hangs with per-sample SIMD32 fragment shader dispatch.
The Gen12 docs are rather contradictory regarding the dispatch configurations supported by the fragment shader -- The same table present in previous generations seems to imply that only one dispatch mode can be enabled when doing per-sample shading, but a restriction documented in the 3DSTATE_PS_BODY page implies the opposite: That SIMD32 can only be used in combination with some other dispatch mode. The latter seems to match the behavior of real hardware as I could tell from my testing: A bunch of multisample test-cases that do per-sample shading hang if we only provide a SIMD32 shader. Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
-rw-r--r--src/intel/compiler/brw_fs.cpp13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index 0fa0be683f0..0c6fe0bbf3b 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -8793,13 +8793,20 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
if (prog_data->persample_dispatch) {
/* Starting with SandyBridge (where we first get MSAA), the different
* pixel dispatch combinations are grouped into classifications A
- * through F (SNB PRM Vol. 2 Part 1 Section 7.7.1). On all hardware
+ * through F (SNB PRM Vol. 2 Part 1 Section 7.7.1). On most hardware
* generations, the only configurations supporting persample dispatch
- * are are this in which only one dispatch width is enabled.
+ * are those in which only one dispatch width is enabled.
+ *
+ * The Gen12 hardware spec has a similar dispatch grouping table, but
+ * the following conflicting restriction applies (from the page on
+ * "Structure_3DSTATE_PS_BODY"), so we need to keep the SIMD16 shader:
+ *
+ * "SIMD32 may only be enabled if SIMD16 or (dual)SIMD8 is also
+ * enabled."
*/
if (simd32_cfg || simd16_cfg)
simd8_cfg = NULL;
- if (simd32_cfg)
+ if (simd32_cfg && devinfo->gen < 12)
simd16_cfg = NULL;
}