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AgeCommit message (Expand)AuthorFilesLines
2017-05-23tests/gem_exec_store: Verify all readsstore_dwordMika Kuoppala1-1/+17
2017-05-23tests/gem_exec_store: Add hang before storeMika Kuoppala1-6/+34
2017-05-23tests/gem_exec_store: Add tests to multiple offsets and dst bosMika Kuoppala1-7/+47
2017-05-23igt/gem_exec_store: Exercise more patterns for MI_STORE_DWORD_IMMChris Wilson1-1/+85
2017-05-19gem_wsim: Add missing help text for -pTvrtko Ursulin1-0/+2
2017-05-19igt/pm_rps: Allow CUR to be greater than MAX (overclocking)Chris Wilson1-2/+2
2017-05-18igt/gem_exec_fence: Skip await test if store-dword is not supportChris Wilson1-0/+2
2017-05-18lib: Refactor testing for ability to use MI_STORE_DATA_IMMChris Wilson24-189/+98
2017-05-17igt/gem_spin_batch: Avoid interleave throttle within open spin batchesChris Wilson3-19/+26
2017-05-17wsim: Allow assigning priorities to each workloadChris Wilson1-15/+37
2017-05-17wsim: Fix reporting of workload/s for slavesChris Wilson1-5/+6
2017-05-17gem_wsim: Fix client exit with more than one background workloadTvrtko Ursulin1-4/+5
2017-05-17media-bench: Print score range when evaluation workloadsTvrtko Ursulin1-3/+4
2017-05-17media-bench: Simplify combined scoringTvrtko Ursulin1-1/+1
2017-05-17media-bench: Store the trace file for laterTvrtko Ursulin1-4/+10
2017-05-17media-bench: Flag workloads which failed to balanceTvrtko Ursulin1-5/+14
2017-05-17media-bench: Fix evaluating with no balancingTvrtko Ursulin1-3/+6
2017-05-17media-bench: Fix scoreboard range statTvrtko Ursulin1-1/+1
2017-05-17wsim: Only require execbuf wr ioctl for FENCE_OUTChris Wilson1-2/+1
2017-05-16igt/gem_exec_store: Add welcome screenChris Wilson1-2/+29
2017-05-16gem_wsim: Implement sw sync point supportTvrtko Ursulin2-9/+120
2017-05-16gem_wsync: Clearer step metadata handlingTvrtko Ursulin1-13/+20
2017-05-16gem_wsim: Fence supportTvrtko Ursulin2-35/+154
2017-05-16gem_wsim: Simplify batch offset block a bitTvrtko Ursulin1-9/+6
2017-05-16igt/media-bench.pl: Media workload analyzerTvrtko Ursulin2-1/+507
2017-05-16gem_wsim: Add append workloadTvrtko Ursulin1-7/+58
2017-05-16gem_wsim: Two small tidiesTvrtko Ursulin1-2/+3
2017-05-13amdgpu/amd_cs_nop: Use a counter not seqnoChris Wilson1-3/+6
2017-05-13igt/amd_cs_nop: Spread submissions across multiple processesChris Wilson1-29/+37
2017-05-13igt/gem_exec_nop: Restore check on available signal ringsChris Wilson1-0/+1
2017-05-12igt/gem_exec_nop: Include the impact of signaling a fenceChris Wilson1-1/+116
2017-05-11gem_wsim: Minimize startup gapTvrtko Ursulin1-1/+11
2017-05-11igt/trace.pl: Collect perf data in quiet modeTvrtko Ursulin1-1/+1
2017-05-11wsim: Set the seqno/time stamp on each batch to every engineChris Wilson1-19/+9
2017-05-11intel_error_decode: Tell zlib the correct amount of memory we allocatedChris Wilson1-5/+4
2017-05-11igt/gem_exec_reloc: Filter out unavailable addresses for !ppgttChris Wilson1-2/+14
2017-05-11igt/gem_exec_reloc: Exercise relocations across the full GTT rangeChris Wilson1-0/+112
2017-05-10intel_error_decode: Fix off-by-one when dumping the binary objectsChris Wilson1-1/+1
2017-05-10overlay: Convert to per-context seqno trackingChris Wilson2-2/+5
2017-05-10overlay: Fixup new layout of tracepointsChris Wilson3-10/+22
2017-05-10wsim: Use a loop over engines to calculate RTChris Wilson1-59/+36
2017-05-10wsim: Feed qd into ewmaChris Wilson1-26/+50
2017-05-10wsim: Switch off heartbeat by defaultChris Wilson1-2/+7
2017-05-10wsim: Limit the information updated during the heartbeatChris Wilson1-33/+51
2017-05-10wsim: Limit heartbeats to sync pointsChris Wilson1-2/+4
2017-05-10wsim: Cache the heartbeat batch and locationChris Wilson1-29/+25
2017-05-10wsim: Avoid the workload_step being tracked simultaneously on multiple enginesChris Wilson1-0/+8
2017-05-10wsim: Stop treating wrk->status_page as just a single uint32_tChris Wilson1-3/+2
2017-05-10gem_wsim: Refactor balancer selection and help textTvrtko Ursulin1-82/+131
2017-05-10gem_wsim: Fix master workload handling and statsTvrtko Ursulin1-40/+51
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