diff options
| author | Xiang, Haihao <haihao.xiang@intel.com> | 2013-12-02 12:52:08 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2013-12-06 15:11:10 +0800 |
| commit | 5f40b23cfa0441fceba9d2cb6437724e880a8fc3 (patch) | |
| tree | f220879a35620ed911d4d40e216ce2435974102f /shaders | |
| parent | c6835697253c07cfc6711bcfc9b071afa4a6144d (diff) | |
tests/gem_media_fill: the assembly code for the shader used in the case
The code is for reference only
v2: Fixed the source register used for the send with EOT
Fixed the posted destination operand for the send with EOT
v3: Fixed the cache agent used in media_block_write message on GEN8
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Diffstat (limited to 'shaders')
| -rw-r--r-- | shaders/media/README | 5 | ||||
| -rw-r--r-- | shaders/media/media_fill.gxa | 44 |
2 files changed, 49 insertions, 0 deletions
diff --git a/shaders/media/README b/shaders/media/README new file mode 100644 index 00000000..9f296010 --- /dev/null +++ b/shaders/media/README @@ -0,0 +1,5 @@ +These files are here for reference only. + +Commands used to generate the shader on gen8 +$> m4 media_fill.gxa > media_fill.gxm +$> intel-gen4asm -g 8 -o <output> media_fill.gxm diff --git a/shaders/media/media_fill.gxa b/shaders/media/media_fill.gxa new file mode 100644 index 00000000..75788906 --- /dev/null +++ b/shaders/media/media_fill.gxa @@ -0,0 +1,44 @@ +/* + * Registers + * g0 -- header + * g1 -- constant + * g2 -- inline data + * g3 -- reserved + * g4-g12 payload for write message + */ +define(`ORIG', `g2.0<2,2,1>UD') +define(`COLOR', `g1.0') +define(`COLORUB', `COLOR<0,1,0>UB') +define(`COLORUD', `COLOR<0,1,0>UD') + +mov(4) COLOR<1>UB COLORUB {align1}; + +/* WRITE */ +mov(8) g4.0<1>UD g0.0<8,8,1>UD {align1}; +mov(2) g4.0<1>UD ORIG {align1}; +mov(1) g4.8<1>UD 0x000f000fUD {align1}; + +mov(16) g5.0<1>UD COLORUD {align1 compr}; +mov(16) g7.0<1>UD COLORUD {align1 compr}; +mov(16) g9.0<1>UD COLORUD {align1 compr}; +mov(16) g11.0<1>UD COLORUD {align1 compr}; + +/* + * comment out the following instruction on Gen7 + * write(0, 0, 10, 12) + * 10: media_block_write + * 12: data cache data port 1 + */ +send(16) 4 acc0<1>UW null write(0, 0, 10, 12) mlen 9 rlen 0 {align1}; + +/* + * uncomment the following instruction on Gen7 + * write(0, 0, 10, 0) + * 10: media_block_write + * 0: reander cache data port + */ +/* send(16) 4 acc0<1>UW null write(0, 0, 10, 0) mlen 9 rlen 0 {align1}; */ + +/* EOT */ +mov(8) g112.0<1>UD g0.0<8,8,1>UD {align1}; +send(16) 112 null<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; |