test more combinationgen7_exec_parse

Signed-off-by: Mika Kuoppala <miku@iki.fi>

1 files changed, 94 insertions, 100 deletions

diff --git a/tests/i915/gen7_exec_parse.c b/tests/i915/gen7_exec_parse.c
index 61ff89b9..2d457476 100644
--- a/tests/i915/gen7_exec_parse.c
+++ b/tests/i915/gen7_exec_parse.c
@@ -372,73 +372,110 @@ static void test_allocations(int fd)
 	}
 }
 
+static void print_batch(uint32_t *cs, uint32_t size)
+{
+	int i;
+
+	for (i = 0; i < size/4; i++)
+		igt_debug("cs[%d] = 0x%08x\n", i, cs[i]);
+}
+
 static void hsw_load_register_reg(void)
 {
-	uint32_t init_gpr0[16] = {
+	uint32_t init_gpr0[] = {
 		MI_LOAD_REGISTER_IMM | (3 - 2),
 		HSW_CS_GPR0,
 		0xabcdabc0, /* leave [1:0] zero */
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t store_gpr0[16] = {
+	uint32_t store_gpr0[] = {
 		MI_STORE_REGISTER_MEM | (3 - 2),
 		HSW_CS_GPR0,
 		0, /* reloc */
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t do_lrr[16] = {
+	uint32_t do_lrr_src[] = {
 		MI_LOAD_REGISTER_REG | (3 - 2),
 		0, /* [1] = src */
 		HSW_CS_GPR0, /* dst */
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t do_lrm[16] = {
+	uint32_t do_lrr_dst[] = {
+		MI_LOAD_REGISTER_REG | (3 - 2),
+		HSW_CS_GPR1, /* src */
+		0, /* [2] = dst */
+		MI_BATCH_BUFFER_END,
+	};
+	uint32_t do_lrm[] = {
 		MI_LOAD_REGISTER_MEM | (3 - 2),
 		0, /* dst reg */
 		0, /* reloc */
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t do_lri_wrong_mask[16] = {
+	uint32_t do_lri[] = {
 		MI_LOAD_REGISTER_IMM | (3 - 2),
 		0, /* [1] = dst */
 		0xffffffff, /* value */
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t do_lri_long_middle[16] = {
+	uint32_t do_lri_long_middle[] = {
 		MI_LOAD_REGISTER_IMM | (7 - 2),
-		HSW_CS_GPR0,
+		HSW_CS_GPR1,
 		0,
 		0, /* [3] = dst */
 		0xffffffff,
-		HSW_CS_GPR0,
+		HSW_CS_GPR1,
 		0,
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t do_lri_long_end[16] = {
+	uint32_t do_lri_long_end[] = {
 		MI_LOAD_REGISTER_IMM | (7 - 2),
-		HSW_CS_GPR0,
+		HSW_CS_GPR1,
 		0,
-		HSW_CS_GPR0,
+		HSW_CS_GPR1,
 		0,
 		0, /* [5] = dst */
 		0xffffffff,
 		MI_BATCH_BUFFER_END,
 	};
-	uint32_t allowed_regs[] = {
-		HSW_CS_GPR1,
-		SO_WRITE_OFFSET_0,
+
+	struct {
+		uint32_t *cs;
+		int addr_idx;
+		uint32_t size;
+	} batches[] = {
+		{ do_lrr_src, 1, sizeof(do_lrr_src) },
+		{ do_lrr_dst, 2, sizeof(do_lrr_dst) },
+		{ do_lrm, 1, sizeof(do_lrm) },
+		{ do_lri, 1, sizeof(do_lri) },
+		{ do_lri_long_middle, 3, sizeof(do_lri_long_middle) },
+		{ do_lri_long_end, 5, sizeof(do_lri_long_end) },
 	};
-	uint32_t disallowed_regs[] = {
-		0,
-		OACONTROL, /* filtered */
-		DERRMR, /* master only */
-		0x2038, /* RING_START: invalid */
-		0xb038, /* HSW_SCRATCH1 masked */
-		0xe49c  /* HSW_ROW_CHICKEN3 masked */
+
+#define CMD_ALLOW_ANY (~0)
+#define _REG_MASK(a, m, c) { .addr = (a), .mask = (m), .allowed_cmd = (c) }
+#define REG_ALLOW(a) _REG_MASK(a, ~0, CMD_ALLOW_ANY)
+#define REG_DENY(a) _REG_MASK(a, ~0, 0)
+	const struct {
+		uint32_t addr;
+		uint32_t mask;
+		uint32_t allowed_cmd;
+	} reglist[] = {
+		REG_ALLOW(HSW_CS_GPR1),
+		REG_ALLOW(SO_WRITE_OFFSET_0),
+		REG_DENY(0),
+		REG_DENY(OACONTROL), /* filtered */
+		REG_DENY(DERRMR), /* master only */
+		REG_DENY(0x2038), /* RING_START: invalid */
+		REG_DENY(0xb038), /* HSW_SCRATCH1 masked */
+		REG_DENY(0xe49c),  /* HSW_ROW_CHICKEN3 masked */
+
+		_REG_MASK(0xb038, (1 << 27), MI_LOAD_REGISTER_IMM), /* HSW_SCRATCH1 masked */
+		_REG_MASK(0xe49c, (1 << 6) | (1 << (6+16)), MI_LOAD_REGISTER_IMM), /* HSW_ROW_CHICKEN3 masked */
 	};
 	int fd;
 	uint32_t handle;
-	int bad_lrr_errno = parser_version >= 8 ? 0 : -EINVAL;
+	const int deny_errno = parser_version >= 8 ? 0 : -EINVAL;
 
 	/* Open again to get a non-master file descriptor */
 	fd = drm_open_driver(DRIVER_INTEL);
@@ -448,95 +485,52 @@ static void hsw_load_register_reg(void)
 
 	handle = gem_create(fd, 4096);
 
-	for (int i = 0 ; i < ARRAY_SIZE(allowed_regs); i++) {
-		uint32_t var;
+	for (int j = 0; j < ARRAY_SIZE(batches); j++) {
+		uint32_t * const cs = batches[j].cs;
 
-		exec_batch(fd, handle, init_gpr0, sizeof(init_gpr0),
-			   I915_EXEC_RENDER,
-			   0);
-		exec_batch_patched(fd, handle,
-				   store_gpr0, sizeof(store_gpr0),
-				   2 * sizeof(uint32_t), /* reloc */
-				   0xabcdabc0);
-		do_lrr[1] = allowed_regs[i];
-		exec_batch(fd, handle, do_lrr, sizeof(do_lrr),
-			   I915_EXEC_RENDER,
-			   0);
-		var = __exec_batch_patched(fd, handle, 0,
+		for (int i = 0 ; i < ARRAY_SIZE(reglist); i++) {
+			uint32_t var;
+			bool allow;
+
+			exec_batch(fd, handle, init_gpr0, sizeof(init_gpr0),
+				   I915_EXEC_RENDER,
+				   0);
+			exec_batch_patched(fd, handle,
 					   store_gpr0, sizeof(store_gpr0),
-					   2 * sizeof(uint32_t)); /* reloc */
-		igt_assert_neq(var, 0xabcdabc0);
-	}
+					   2 * sizeof(uint32_t), /* reloc */
+					   0xabcdabc0);
 
-	for (int i = 0 ; i < ARRAY_SIZE(disallowed_regs); i++) {
-		exec_batch(fd, handle, init_gpr0, sizeof(init_gpr0),
-			   I915_EXEC_RENDER,
-			   0);
-		exec_batch_patched(fd, handle,
-				   store_gpr0, sizeof(store_gpr0),
-				   2 * sizeof(uint32_t), /* reloc */
-				   0xabcdabc0);
-		igt_debug("Testing disallowed lrr 0x%08x\n", disallowed_regs[i]);
-		do_lrr[1] = disallowed_regs[i];
-		exec_batch(fd, handle, do_lrr, sizeof(do_lrr),
-			   I915_EXEC_RENDER,
-			   bad_lrr_errno);
-		exec_batch_patched(fd, handle,
-				   store_gpr0, sizeof(store_gpr0),
-				   2 * sizeof(uint32_t), /* reloc */
-				   0xabcdabc0);
-	}
+			/* We don't use any longer cmds, so keep it simple */
+#define IS_CMD(cs, cmd) ((cs & ~0xff) == (cmd & ~0xff))
 
-	for (int i = 0 ; i < ARRAY_SIZE(disallowed_regs); i++) {
-		exec_batch(fd, handle, init_gpr0, sizeof(init_gpr0),
-			   I915_EXEC_RENDER,
-			   0);
-		exec_batch_patched(fd, handle,
-				   store_gpr0, sizeof(store_gpr0),
-				   2 * sizeof(uint32_t), /* reloc */
-				   0xabcdabc0);
+			allow = reglist[i].allowed_cmd == CMD_ALLOW_ANY ||
+				IS_CMD(cs[0], reglist[i].allowed_cmd);
 
-		igt_debug("Testing disallowed lrr dst 0x%08x\n", disallowed_regs[i]);
-		do_lrr[1] = HSW_CS_GPR0;
-		do_lrr[2] = disallowed_regs[i];
-		exec_batch(fd, handle, do_lrr, sizeof(do_lrr),
-			   I915_EXEC_RENDER,
-			   bad_lrr_errno);
+			igt_debug("Batch %d with addr 0x%08x %s\n", j, reglist[i].addr,
+				  allow ? "allow" : "deny");
 
-		igt_debug("Testing disallowed lrm 0x%08x\n", disallowed_regs[i]);
-		do_lrm[1] = disallowed_regs[i];
-		exec_batch_patched(fd, handle, do_lrm, sizeof(do_lrm),
-				   2 * sizeof(uint32_t), /* reloc */
-				   bad_lrr_errno);
+			cs[batches[j].addr_idx] = reglist[i].addr;
 
-		igt_debug("Testing disallowed wrong mask lri 0x%08x\n", disallowed_regs[i]);
-		do_lri_wrong_mask[1] = disallowed_regs[i];
-		exec_batch(fd, handle, do_lri_wrong_mask, sizeof(do_lri_wrong_mask),
-			   I915_EXEC_RENDER,
-			   bad_lrr_errno);
+			if (IS_CMD(cs[0], MI_LOAD_REGISTER_IMM))
+				cs[batches[j].addr_idx + 1] =
+					0xffffffff & reglist[i].mask;
 
-		igt_debug("Testing disallowed long lri middle 0x%08x\n",
-			  disallowed_regs[i]);
-		do_lri_long_middle[3] = disallowed_regs[i];
-		exec_batch(fd, handle,
-			   do_lri_long_middle, sizeof(do_lri_long_middle),
-			   I915_EXEC_RENDER,
-			   bad_lrr_errno);
+			print_batch(cs, batches[j].size);
 
-		igt_debug("Testing disallowed long lri end 0x%08x\n",
-			  disallowed_regs[i]);
-		do_lri_long_end[5] = disallowed_regs[i];
-		exec_batch(fd, handle,
-			   do_lri_long_end, sizeof(do_lri_long_end),
-			   I915_EXEC_RENDER,
-			   bad_lrr_errno);
+			exec_batch(fd, handle, cs, batches[j].size,
+				   I915_EXEC_RENDER,
+				   allow ? 0 : deny_errno);
 
-		exec_batch_patched(fd, handle,
-				   store_gpr0, sizeof(store_gpr0),
-				   2 * sizeof(uint32_t), /* reloc */
-				   0xabcdabc0);
-	}
+			var = __exec_batch_patched(fd, handle, 0,
+						   store_gpr0, sizeof(store_gpr0),
+						   2 * sizeof(uint32_t)); /* reloc */
 
+			if (cs == do_lrr_src && reglist[i].allowed_cmd == CMD_ALLOW_ANY)
+				igt_assert_neq(var, 0xabcdabc0);
+			else
+				igt_assert_eq(var, 0xabcdabc0);
+		}
+	}
 	close(fd);
 }