~marcheu/unununium - unsp disassembler and emulator

Age	Commit message (Expand)	Author	Files	Lines
2010-02-17	Make timing virtual; sync with real time each video frame	Segher Boessenkool	1	-5/+4
2010-02-13	Add timers for TMB1 and TMB2; use timer.interval if timer.time == 0	Segher Boessenkool	1	-6/+39
2010-02-10	Wire up uart_send() in the I/O core	Segher Boessenkool	1	-1/+6
2010-02-08	Abstract UART communication	Segher Boessenkool	1	-9/+13
2010-02-03	Slight interrupt handling improvement	Segher Boessenkool	1	-3/+5
2010-02-03	Big interrupt handling improvement	Segher Boessenkool	1	-1/+1
2010-02-02	Big fat I/O update	Segher Boessenkool	1	-34/+232
2010-02-02	Handle "special" GPIO	Segher Boessenkool	1	-5/+8
2010-02-01	UART: Fix baud rate setting	Segher Boessenkool	1	-2/+8
2010-01-31	Add DMA	Segher Boessenkool	1	-0/+23
2009-04-09	Make 3d1c work more like the real thing	Segher Boessenkool	1	-2/+2
2009-04-08	Emulate I/O reg 3d1c	Segher Boessenkool	1	-0/+5
2009-03-03	VII GPIO support.	Segher Boessenkool	1	-8/+2
2009-03-01	Fix crash for boards that do not support do_gpio() (yet).	Segher Boessenkool	1	-1/+4
2009-02-25	Update copyright messages	Segher Boessenkool	1	-1/+1
2009-02-25	Add GPIO framework; make WAL controller use it.	Segher Boessenkool	1	-14/+42
2009-02-05	Add "board.h" header	Segher Boessenkool	1	-0/+2
2009-02-05	Document a few more registers, no functional change	Segher Boessenkool	1	-0/+17
2009-02-05	Abstract WAL controller code a bit	Segher Boessenkool	1	-1/+4
2009-02-01	I/O: Keep entries in order	Segher Boessenkool	1	-3/+3
2009-02-01	I/O: Implement reading from 3d2f (DS register)	Segher Boessenkool	1	-1/+4
2009-01-30	Document watchdog.	Segher Boessenkool	1	-1/+1
2008-11-13	Trivial IIC fix.	Segher Boessenkool	1	-1/+2
2008-10-01	Implement a SEEPROM on IIC.	Segher Boessenkool	1	-7/+26
2008-10-01	Split off device loads into their respective files.	Segher Boessenkool	1	-0/+34
2008-10-01	Split I/O hardware routines to io.c file.	Segher Boessenkool	1	-0/+92