Try to tie IO location to pci-id. Still needs to be narrowed down though.

1 files changed, 12 insertions, 4 deletions

diff --git a/src/atipreinit.c b/src/atipreinit.c
index 5b9fd6b..bc9aeec 100644
--- a/src/atipreinit.c
+++ b/src/atipreinit.c
@@ -144,7 +144,14 @@ Mach64MMIOProbeMap(ATIPtr pATI, unsigned long Address)
 /*
  * This function attempts to locate the MMIO area.
  *
- * TODO: ClaimFixedResource sparse IO address 0x6AEC
+ * TODO: ClaimFixedResource sparse IO address 0x6AEC when no seperate IO range.
+ *
+ * When do we get a seperate IO bar? Currently we know that IO sits at:
+ * End of BAR0: at least as late as a 264CT
+ * BAR2: at least as early as 264GTB
+ *
+ * So where does this change happen? ET? VT? VTB? GT?
+ * I guess VT, but this needs verification. -- libv.
  */
 static unsigned long
 Mach64MMIOProbe(ATIPtr pATI)
@@ -157,8 +164,9 @@ Mach64MMIOProbe(ATIPtr pATI)
      * apertures can be enabled/disabled only through PCI, this probes no
      * further.
      */
-    if ((pVideo->size[2] >= 12) && pVideo->memBase[2]) { 
-        if (pVideo->memBase[2] < (CARD32)(-1 << pVideo->size[2])) {
+    if ((pATI->Chip > ATI_CHIP_264CT) && (pVideo->size[2] >= 12)) {
+        if (pVideo->memBase[2] && 
+            (pVideo->memBase[2] < (CARD32)(-1 << pVideo->size[2]))) {
             Address = pVideo->memBase[2] + 0x400;
 
             if (Mach64MMIOProbeMap(pATI, Address)) {
@@ -173,7 +181,7 @@ Mach64MMIOProbe(ATIPtr pATI)
      * Probe through the primary MMIO aperture that exists at the tail end
      * of the linear aperture.  Test for both 8MB and 4MB linear apertures.
      */
-    if (pVideo->memBase[0]) {
+    if ((pATI->Chip < ATI_CHIP_264GTB) && pVideo->memBase[0]) {
         /* Check if our linear memory aperture is enabled */
         if (!(inw(0x6AEC) & 0x3)) {
             CARD32 tmp = inw(0x6AEC);