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2015-07-07Rough, but dumps LLVM!cb-hackLaura Ekstrand2-3/+5
2015-07-06Won't build, but on the right track for dump-opt-llvm.Laura Ekstrand1-3/+26
2015-06-19Comment out CL_PROFILING_INFO_NOT_AVAILABLE.Laura Ekstrand1-6/+7
I suspect that this is too conformant to OpenCL 1.2 spec.
2015-06-19Add string parsing to remove unknown -dump-opt-llvm compiler option.Laura Ekstrand1-0/+35
2015-06-17Adds CMake help info and local beignet runner script.Laura Ekstrand2-0/+20
2015-06-17Changes platform name to match other driver.Laura Ekstrand1-1/+1
2015-06-17Fixed messy git status.Laura Ekstrand1-0/+2
2015-03-19Build: fix the beignet icd name when CMAKE_INSTALL_FULL_LIBDIR is undefined.Zhigang Gong1-2/+8
On some distributions, the CMAKE_INSTALL_FULL_LIBDIR or CMAKE_LIBRARY_ARCHITECTURE may be undefined. To avoid generate intel-beignet-.icd file name, we need to get rid of the extra "-" for such case. Reported by Igor Gnatenko. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-19Generate NAN for UNDEF value in printf parser.Junyan He1-0/+6
llvm 3.6 will give a UNDEF value for NAN. The will cause the store instruction for UNDEF to be ignored. We need to modify it to NAN here. Comments from Zhigang: " The related commit of why LLVM won't just simply return NaN for such case is at: Make the sqrt intrinsic return undef for a negative input. As discussed here: http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20140609/220598.html And again here: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-September/077168.html The sqrt of a negative number when using the llvm intrinsic is undefined. We should return undef rather than 0.0 to match the definition in the LLVM IR lang ref. This change should not affect any code that isn't using "no-nans-fp-math"; ie, no-nans is a requirement for generating the llvm intrinsic in place of a sqrt function call. Unfortunately, the behavior introduced by this patch will not match current gcc, xlc, icc, and possibly other compilers. The current clang/llvm behavior of returning 0.0 doesn't either. We knowingly approve of this difference with the other compilers in an attempt to flag code that is invoking undefined behavior. A front-end warning should also try to convince the user that the program will fail: http://llvm.org/bugs/show_bug.cgi?id=21093 Differential Revision: http://reviews.llvm.org/D5527 This patch is a workaround for the following scenario: printf("%f \n", sqrt(-1.0f)); " Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-19runtime: fix a conformance bug in cl_get_kernel_arg_info.Zhigang Gong1-1/+5
Accordying to OpenCL 1.2 Rev 17: "CL_KERNEL_ARG_TYPE_CONST is returned if the argument is a pointer and the referenced type is declared with the restrict or const qualifier. For example, a kernel argument declared as global int const *x returns CL_KERNEL_ARG_TYPE_CONST but a kernel argument declared as global int * const x does not." So only need to return CL_KERNEL_ARG_TYPE_CONST for pointer arguments. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Tested-by: "Weng, Chuanbo" <chuanbo.weng@intel.com>
2015-03-18CL: update to 2.0 header files.Zhigang Gong10-12571/+344
Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-17correct env var to output llvm IRGuo Yejun1-3/+5
Signed-off-by: Guo Yejun <yejun.guo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-17strip PointerCast for call instructions before use.Luo Xionghu2-4/+3
the callInst may contains bitcast instruction if the function's is different with the decleration. strip the bitcast instruction to get the real name. v2: remove printf message. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: "Guo, Yejun" <yejun.guo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-17Add LLVM_INCLUDE_DIR to CMakeList of src.Junyan He1-1/+2
The llvm include should be specified when llvm is not installed in standard dir. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-16Bump to 1.1Zhigang Gong1-1/+1
This is the dev branch for next major release 1.1.0. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-16Docs: update team information.Zhigang Gong1-0/+13
Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-16Build: set 3.5 as the stable LLVM version for beignet.Zhigang Gong1-5/+6
And update document accordingly. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-16GBE: fix an image related bugs.Zhigang Gong2-17/+24
The bug was introduces when we removed the hacky invalid register. Now we will not pass in a fixed count of coordinates for the typed_write instruction. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
2015-03-13simple return if spir extension not supported.Luo Xionghu1-1/+1
Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-13only support spir extension for beignet build with llvm 3.5 or later.Luo Xionghu1-0/+3
the clang 3.5 will call CallGraphSCCPass to add attribute "Attribute::ReadOnly" for these parameters only reads memeory, but this attribute is not supported in the VerifierPass of llvm 3.3. This is a bug of llvm 3.3. v2: disable this extension in runtime for old llvm. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-13reset the SPIR target datalayout.Luo Xionghu1-0/+4
v2: split to a seperate patch. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-13Revert "libocl: using mad() to implement dot()"Zhigang Gong1-3/+3
It cause performance regression according to VIZ-5046. This reverts commit 3c407838c11c52be6f2ccb237884073566ed8c90.
2015-03-12replace pow with llvm intrinsic.Luo Xionghu3-11/+10
translate native pow to llvm.pow for fast path. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-12replace mad with llvm intrinsic.Luo Xionghu3-11/+1
translate native mad to llvm.fma. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-12replace rndd with llvm intrinsic.Luo Xionghu4-5/+4
translate native rndd to llvm.floor. v2: fix ocl_convert.sh. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com> Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-12replace rndu with llvm intrinsic.Luo Xionghu4-5/+2
translate native rndu to llvm.ceil. v2: fix ocl_convert.sh Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com> Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-12replace rnde with llvm intrinsic.Luo Xionghu4-5/+4
translate native rnde to llvm.rint. v2: fix ocl_convert.sh. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com> Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-12replace rndz with llvm intrinsic.Luo Xionghu4-5/+2
translate native rndz to llvm.trunc. v2: fix ocl_convert.h Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com> Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-12replace fabs with llvm intrinsic.Luo Xionghu4-5/+2
translate native fabs to llvm.fabs for fast path. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com> v2: fix ocl_geometric.cl. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
2015-03-12Backend: Fix errors in disasm for indirect instruction Gen8.Junyan He1-21/+9
Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-12Backend: Add the logic to handle uniform src for BSwap Gen8.Junyan He1-28/+62
Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-12GBE: Only emit multiply when immediate is not one.Ruiling Song1-3/+5
As constant propagation will introduce constantExpr and gep instruction, I choose not to run constant propagation pass after RemoveGep pass. So, here only generate Multiply as needed. We may do such kind of optimization in Gen IR level in the future. This could fix the performance regression introduced by: "GBE: Import constantexpr lower pass from pNaCl" to the opencv case: opencv_perf_imgproc/OCL_BilateralFixture_Bilateral Signed-off-by: Ruiling Song <ruiling.song@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Modify the utest case for bswap.Junyan He2-71/+156
We add the test case for uniform when doing the bswap. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Backend: Delete bswap logic in the llvm_to_gen stage.Junyan He3-83/+5
We move the bswap logic from llvm_to_gen to backend for efficienc using indirect mode. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Add a0 setting and bswap logic for GEN8Junyan He2-0/+175
Because Gen8 has 16 sub-registers for A0, we can use them to decrease the instructions number. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Backend: Handle the bswap using indirect mode access.Junyan He3-0/+140
Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Backend: Correct indirect mode encoder setting for Gen8.Junyan He1-7/+8
Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Backend: Correct indirect mode encoder setting for Gen7.Junyan He1-7/+7
Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Backend: Add functions to set a0 register.Junyan He2-0/+46
a0 as a address register acts a very important role in indirect mode access. We add auxiliary functions to set its content correctly and effectively. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09Backend: Add the indirect fields and functions for gen register.Junyan He1-1/+29
Add a0_subnr and addr_imm to GenRegister, in order to represent the indirect register, which may be some imm offset from a0.x subregister's base address. Also add to_indirect1xN help function to convert a register to an indirect 1XN register. V3: 1. Add Gen8 encoder setting. 2. Reorder the patches. 3. Add logic for gen8 context, using 16 a0 sub-registers. 4. Fix some bugs of uniform src. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09add utest for load spir binary.Luo Xionghu3-0/+91
To generate SPIR binary, please refer to the page https://github.com/KhronosGroup/SPIR. For llvm3.2, the command is "clang -cc1 -emit-llvm-bc -triple spir-unknown-unknown -cl-std=CL1.2 -include opencl_spir.h compiler_ceil.cl -o compiler_ceil32.spir" For llvm3.5, the option -cl-kernel-arg-info is required, and option -fno-builtin is required to avoid warning. v2: add missing load_program_from_spir.cpp file. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09SPIR binary support for printf function.Luo Xionghu2-2/+13
rename "printf" to "__gen_ocl_printf_stub" and "puts" to "__gen_ocl_puts_stub" in PrintfParser after link. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09change the workitem related api to OVERLOABABLE.Luo Xionghu9-21/+19
the SPIR header file requirs these functions to be overlable. (https://github.com/KhronosGroup/SPIR-Tools/blob/master/headers/opencl_spir.h) Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09enable cl_khr_spir extension to build and run from SPIR binary.Luo Xionghu9-5/+39
the SPIR are built by clang generating a standard llvm Module file, beignet need insert one byte before the module repesents binary type then parse the module to link. enable cl_khr_spir extension output string; enable the SPIR calling conversion of CallingConv::SPIR_KERNEL; get_global_id shoud be OVERLOADABLE; fix some bugs in prinf parse and backend. v2: move OVERLOADABLE change to another patch to keep clean; rename FROM_INTERMEDIATE to FROM_LLVM_SPIR. Signed-off-by: Luo Xionghu <xionghu.luo@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
2015-03-09GBE: add a new incompatible compile option -cl-finite-math-only.Zhigang Gong1-1/+1
Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Tested-by: Meng Mengmeng <mengmeng.meng@intel.com>
2015-03-05Fix llvm3.6 build error.Yang Rong2-8/+0
LLVM3.6 revert the c api LLVMLinkModules to LLVM3.5 last-minute. Consist with it. Reviewed-by: "Song, Ruiling" <ruiling.song@intel.com>
2015-03-02Build: use -Bsymbolic to fix conflicts with other LLVM users.Zhigang Gong1-1/+1
As there may be some other LLVM users such as mesa, and they may link to different LLVM library. To avoid such type of conflicts, we use -Bsymbolic to disable the symbol preemption. This patch should fix the build bug at: https://bugs.freedesktop.org/show_bug.cgi?id=89325 Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
2015-03-02GBE: add fastcall support.Zhigang Gong3-2/+7
I found some optimization pass may add fastcall attribute to some builtin functions. We need to add the corresponding support. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
2015-03-02GBE: support compare two bool variables.Zhigang Gong3-5/+2
LLVM 3.6 may generate the following instructions: %Pivot = icmp slt i1 %trunc49, false when do siwth lowering pass. To support it we must use GEN_TYPE_W to represent B rather than GEN_TYPE_UW and we also need to remove the corresponding assertions. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
2015-03-02GBE: remove the unecessary type check for SEL instructio.Zhigang Gong1-1/+0
The backend SEL instruction could support bool type since we change the bool representation to normal S16 data type. Now let us remove this assertion check. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Song, Ruiling" <ruiling.song@intel.com>
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