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authorZhigang Gong <zhigang.gong@intel.com>2015-03-31 16:14:25 +0800
committerZhigang Gong <zhigang.gong@intel.com>2015-04-13 16:11:22 +0800
commit167af594087b4abe95671d6a2cb276f8f9a8510d (patch)
tree4fac730dfea0931e0c66c1fd2e2216ccd4c2836e
parenta6ad8e74b8660b510c0001aa7cc755244cfd5b7d (diff)
GBE: extend backend label to 32 bit.
The front end label is still 16 bit. But the auxiliary label could be larger than that. This is the preparation to support 32 bit label for both front end and backend. Signed-off-by: Zhigang Gong <zhigang.gong@intel.com> Reviewed-by: "Yang, Rong R" <rong.r.yang@intel.com>
-rw-r--r--backend/src/backend/gen_insn_selection.cpp24
-rw-r--r--backend/src/backend/gen_insn_selection.hpp4
-rw-r--r--backend/src/ir/instruction.hpp2
3 files changed, 15 insertions, 15 deletions
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index bbcbb19d..647f991e 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -659,7 +659,7 @@ namespace gbe
friend class SelectionInstruction;
private:
/*! Auxiliary label for if/endif. */
- uint16_t currAuxLabel;
+ uint32_t currAuxLabel;
bool bHas32X32Mul;
bool bHasLongType;
uint32_t ldMsgOrder;
@@ -1048,7 +1048,7 @@ namespace gbe
void Selection::Opaque::LABEL(ir::LabelIndex index) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_LABEL, 0, 0);
- insn->index = uint16_t(index);
+ insn->index = uint32_t(index);
}
void Selection::Opaque::BARRIER(GenRegister src, GenRegister fence, uint32_t barrierType) {
@@ -1066,7 +1066,7 @@ namespace gbe
int Selection::Opaque::JMPI(Reg src, ir::LabelIndex index, ir::LabelIndex origin) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_JMPI, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(index);
+ insn->index = uint32_t(index);
insn->extra.longjmp = abs(index - origin) > 800;
return insn->extra.longjmp ? 2 : 1;
}
@@ -1074,28 +1074,28 @@ namespace gbe
void Selection::Opaque::BRD(Reg src, ir::LabelIndex jip) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_BRD, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(jip);
+ insn->index = uint32_t(jip);
}
void Selection::Opaque::BRC(Reg src, ir::LabelIndex jip, ir::LabelIndex uip) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_BRC, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(jip);
- insn->index1 = uint16_t(uip);
+ insn->index = uint32_t(jip);
+ insn->index1 = uint32_t(uip);
}
void Selection::Opaque::IF(Reg src, ir::LabelIndex jip, ir::LabelIndex uip) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_IF, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(jip);
- insn->index1 = uint16_t(uip);
+ insn->index = uint32_t(jip);
+ insn->index1 = uint32_t(uip);
}
void Selection::Opaque::ELSE(Reg src, ir::LabelIndex jip, ir::LabelIndex elseLabel) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_ELSE, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(jip);
+ insn->index = uint32_t(jip);
this->LABEL(elseLabel);
}
@@ -1107,13 +1107,13 @@ namespace gbe
this->LABEL(this->block->endifLabel);
SelectionInstruction *insn = this->appendInsn(SEL_OP_ENDIF, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(this->block->endifLabel);
+ insn->index = uint32_t(this->block->endifLabel);
}
void Selection::Opaque::WHILE(Reg src, ir::LabelIndex jip) {
SelectionInstruction *insn = this->appendInsn(SEL_OP_WHILE, 0, 1);
insn->src(0) = src;
- insn->index = uint16_t(jip);
+ insn->index = uint32_t(jip);
}
void Selection::Opaque::CMP(uint32_t conditional, Reg src0, Reg src1, Reg dst) {
@@ -1784,7 +1784,7 @@ namespace gbe
if (this->ctx.getIFENDIFFix() &&
this->block->insnList.size() != 0 &&
this->block->insnList.size() % 1000 == 0 &&
- (uint16_t)this->block->endifLabel != 0) {
+ (uint32_t)this->block->endifLabel != 0) {
ir::LabelIndex jip = this->block->endifLabel;
this->ENDIF(GenRegister::immd(0), jip);
this->push();
diff --git a/backend/src/backend/gen_insn_selection.hpp b/backend/src/backend/gen_insn_selection.hpp
index 6a08180d..686f3090 100644
--- a/backend/src/backend/gen_insn_selection.hpp
+++ b/backend/src/backend/gen_insn_selection.hpp
@@ -140,9 +140,9 @@ namespace gbe
/*! Number of sources */
uint8_t srcNum:4;
/*! To store various indices */
- uint16_t index;
+ uint32_t index;
/*! For BRC/IF to store the UIP */
- uint16_t index1;
+ uint32_t index1;
/*! instruction ID used for vector allocation. */
uint32_t ID;
/*! Variable sized. Destinations and sources go here */
diff --git a/backend/src/ir/instruction.hpp b/backend/src/ir/instruction.hpp
index e6119da1..ddcefcee 100644
--- a/backend/src/ir/instruction.hpp
+++ b/backend/src/ir/instruction.hpp
@@ -88,7 +88,7 @@ namespace ir {
std::ostream &operator<< (std::ostream &out, AddressSpace addrSpace);
/*! A label is identified with an unsigned short */
- TYPE_SAFE(LabelIndex, uint16_t)
+ TYPE_SAFE(LabelIndex, uint32_t)
/*! Function class contains the register file and the register tuple. Any
* information related to the registers may therefore require a function