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authorAndrey Grodzovsky <andrey.grodzovsky@amd.com>2017-11-09 23:30:02 -0500
committerChristian König <christian.koenig@amd.com>2017-11-13 18:20:27 +0100
commit818a0d4245801edd9a85ea95429bac4eb6ec2ef8 (patch)
tree77a0742af3553c967fa0cf6c7db586753088b1e5
parent806d0803600000faecb4025d8e9c7490cb097c25 (diff)
amdgpu: Move memory alloc tests in bo suite.
Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com>
-rw-r--r--tests/amdgpu/basic_tests.c49
-rw-r--r--tests/amdgpu/bo_tests.c49
2 files changed, 49 insertions, 49 deletions
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c
index 18bcf919..e7f48e39 100644
--- a/tests/amdgpu/basic_tests.c
+++ b/tests/amdgpu/basic_tests.c
@@ -44,7 +44,6 @@ static uint32_t minor_version;
static uint32_t family_id;
static void amdgpu_query_info_test(void);
-static void amdgpu_memory_alloc(void);
static void amdgpu_command_submission_gfx(void);
static void amdgpu_command_submission_compute(void);
static void amdgpu_command_submission_multi_fence(void);
@@ -58,7 +57,6 @@ static void amdgpu_command_submission_copy_linear_helper(unsigned ip_type);
CU_TestInfo basic_tests[] = {
{ "Query Info Test", amdgpu_query_info_test },
- { "Memory alloc Test", amdgpu_memory_alloc },
{ "Userptr Test", amdgpu_userptr_test },
{ "Command submission Test (GFX)", amdgpu_command_submission_gfx },
{ "Command submission Test (Compute)", amdgpu_command_submission_compute },
@@ -277,53 +275,6 @@ static void amdgpu_query_info_test(void)
CU_ASSERT_EQUAL(r, 0);
}
-static void amdgpu_memory_alloc(void)
-{
- amdgpu_bo_handle bo;
- amdgpu_va_handle va_handle;
- uint64_t bo_mc;
- int r;
-
- /* Test visible VRAM */
- bo = gpu_mem_alloc(device_handle,
- 4096, 4096,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
- &bo_mc, &va_handle);
-
- r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
- CU_ASSERT_EQUAL(r, 0);
-
- /* Test invisible VRAM */
- bo = gpu_mem_alloc(device_handle,
- 4096, 4096,
- AMDGPU_GEM_DOMAIN_VRAM,
- AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
- &bo_mc, &va_handle);
-
- r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
- CU_ASSERT_EQUAL(r, 0);
-
- /* Test GART Cacheable */
- bo = gpu_mem_alloc(device_handle,
- 4096, 4096,
- AMDGPU_GEM_DOMAIN_GTT,
- 0, &bo_mc, &va_handle);
-
- r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
- CU_ASSERT_EQUAL(r, 0);
-
- /* Test GART USWC */
- bo = gpu_mem_alloc(device_handle,
- 4096, 4096,
- AMDGPU_GEM_DOMAIN_GTT,
- AMDGPU_GEM_CREATE_CPU_GTT_USWC,
- &bo_mc, &va_handle);
-
- r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
- CU_ASSERT_EQUAL(r, 0);
-}
-
static void amdgpu_command_submission_gfx_separate_ibs(void)
{
amdgpu_context_handle context_handle;
diff --git a/tests/amdgpu/bo_tests.c b/tests/amdgpu/bo_tests.c
index 74b5e77b..45451960 100644
--- a/tests/amdgpu/bo_tests.c
+++ b/tests/amdgpu/bo_tests.c
@@ -46,6 +46,7 @@ static amdgpu_va_handle va_handle;
static void amdgpu_bo_export_import(void);
static void amdgpu_bo_metadata(void);
static void amdgpu_bo_map_unmap(void);
+static void amdgpu_memory_alloc(void);
CU_TestInfo bo_tests[] = {
{ "Export/Import", amdgpu_bo_export_import },
@@ -53,6 +54,7 @@ CU_TestInfo bo_tests[] = {
{ "Metadata", amdgpu_bo_metadata },
#endif
{ "CPU map/unmap", amdgpu_bo_map_unmap },
+ { "Memory alloc Test", amdgpu_memory_alloc },
CU_TEST_INFO_NULL,
};
@@ -195,3 +197,50 @@ static void amdgpu_bo_map_unmap(void)
r = amdgpu_bo_cpu_unmap(buffer_handle);
CU_ASSERT_EQUAL(r, 0);
}
+
+static void amdgpu_memory_alloc(void)
+{
+ amdgpu_bo_handle bo;
+ amdgpu_va_handle va_handle;
+ uint64_t bo_mc;
+ int r;
+
+ /* Test visible VRAM */
+ bo = gpu_mem_alloc(device_handle,
+ 4096, 4096,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED,
+ &bo_mc, &va_handle);
+
+ r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+
+ /* Test invisible VRAM */
+ bo = gpu_mem_alloc(device_handle,
+ 4096, 4096,
+ AMDGPU_GEM_DOMAIN_VRAM,
+ AMDGPU_GEM_CREATE_NO_CPU_ACCESS,
+ &bo_mc, &va_handle);
+
+ r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+
+ /* Test GART Cacheable */
+ bo = gpu_mem_alloc(device_handle,
+ 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT,
+ 0, &bo_mc, &va_handle);
+
+ r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+
+ /* Test GART USWC */
+ bo = gpu_mem_alloc(device_handle,
+ 4096, 4096,
+ AMDGPU_GEM_DOMAIN_GTT,
+ AMDGPU_GEM_CREATE_CPU_GTT_USWC,
+ &bo_mc, &va_handle);
+
+ r = gpu_mem_free(bo, va_handle, bo_mc, 4096);
+ CU_ASSERT_EQUAL(r, 0);
+}