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authorPablo Barrio <pablo.barrio@arm.com>2016-06-23 16:53:49 +0000
committerPablo Barrio <pablo.barrio@arm.com>2016-06-23 16:53:49 +0000
commite8da13b383164c46b71860b1495a17acd18c5bc7 (patch)
tree9ceafd1dac432233e2e33af6ec30eb3b40dd71e3 /include
parent525757e9f74cdfe723f5cdc40b46bd3a9b6f06ed (diff)
[ARM] Lower (select_cc k k (select_cc ~k ~k x)) into (SSAT l_k x)
Summary: SSAT saturates an integer, making sure that its value lies within an interval [-k, k]. Since the constant is given to SSAT as the number of bytes set to one, k + 1 must be a power of 2, otherwise the optimization is not possible. Also, the select_cc must use < and > respectively so that they define an interval. Reviewers: mcrosier, jmolloy, rengolin Subscribers: aemerson, rengolin, llvm-commits Differential Revision: http://reviews.llvm.org/D21372 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273581 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'include')
-rw-r--r--include/llvm/Target/TargetSelectionDAG.td3
1 files changed, 3 insertions, 0 deletions
diff --git a/include/llvm/Target/TargetSelectionDAG.td b/include/llvm/Target/TargetSelectionDAG.td
index 34f237fb4b1..88375f77e23 100644
--- a/include/llvm/Target/TargetSelectionDAG.td
+++ b/include/llvm/Target/TargetSelectionDAG.td
@@ -116,6 +116,9 @@ def SDTIntBinOp : SDTypeProfile<1, 2, [ // add, and, or, xor, udiv, etc.
def SDTIntShiftOp : SDTypeProfile<1, 2, [ // shl, sra, srl
SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisInt<2>
]>;
+def SDTIntSatNoShOp : SDTypeProfile<1, 2, [ // ssat with no shift
+ SDTCisSameAs<0, 1>, SDTCisInt<2>
+]>;
def SDTIntBinHiLoOp : SDTypeProfile<2, 2, [ // mulhi, mullo, sdivrem, udivrem
SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>,SDTCisInt<0>
]>;