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authorHans de Goede <hdegoede@redhat.com>2016-01-15 16:42:28 +0100
committerHans de Goede <hdegoede@redhat.com>2016-06-28 11:53:20 +0200
commiteec5cab218220d900bd9ad1a933ff11d385ec37f (patch)
tree2fa3afb57dc076ce0a59b87183c906b187a40583
parent982d9f388e338480216bc3612bc411bb6fe8fc6e (diff)
Use ConstantPool for immediates
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r--lib/Target/TGSI/CMakeLists.txt1
-rw-r--r--lib/Target/TGSI/TGSI.h2
-rw-r--r--lib/Target/TGSI/TGSIPreEmitImmPass.cpp105
-rw-r--r--lib/Target/TGSI/TGSITargetMachine.cpp14
4 files changed, 115 insertions, 7 deletions
diff --git a/lib/Target/TGSI/CMakeLists.txt b/lib/Target/TGSI/CMakeLists.txt
index 749f0d3e9d2..f4deabeaf05 100644
--- a/lib/Target/TGSI/CMakeLists.txt
+++ b/lib/Target/TGSI/CMakeLists.txt
@@ -17,6 +17,7 @@ add_llvm_target(TGSICodeGen
TGSISubtarget.cpp
TGSITargetMachine.cpp
TGSIRegisterInfo.cpp
+ TGSIPreEmitImmPass.cpp
)
add_dependencies(LLVMTGSICodeGen intrinsics_gen)
diff --git a/lib/Target/TGSI/TGSI.h b/lib/Target/TGSI/TGSI.h
index e394d1050ec..83a1644bc3a 100644
--- a/lib/Target/TGSI/TGSI.h
+++ b/lib/Target/TGSI/TGSI.h
@@ -27,7 +27,7 @@ namespace llvm {
class TGSITargetMachine;
FunctionPass *createTGSIISelDag(TGSITargetMachine &tm);
- FunctionPass *createTGSIBranchConvPass(const TGSITargetMachine &tm);
+ FunctionPass *createTGSIPreEmitImmPass();
namespace tgsi {
enum AddressSpace {
diff --git a/lib/Target/TGSI/TGSIPreEmitImmPass.cpp b/lib/Target/TGSI/TGSIPreEmitImmPass.cpp
new file mode 100644
index 00000000000..55c86b8de9d
--- /dev/null
+++ b/lib/Target/TGSI/TGSIPreEmitImmPass.cpp
@@ -0,0 +1,105 @@
+//===----------------------- TGSIPreEmitImmPass.cpp -----------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// A pass that form early (predicated) returns. If-conversion handles some of
+// this, but this pass picks up some remaining cases.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineConstantPool.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/IR/Constants.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
+#include "TGSI.h"
+
+using namespace llvm;
+
+#define DEBUG_TYPE "tgsi-preemit-imm"
+
+namespace llvm {
+ void initializeTGSIPreEmitImmPass(PassRegistry&);
+}
+
+namespace {
+ struct TGSIPreEmitImm : public MachineFunctionPass {
+ static char ID;
+ TGSIPreEmitImm() : MachineFunctionPass(ID) {
+ initializeTGSIPreEmitImmPass(*PassRegistry::getPassRegistry());
+ }
+
+ const TargetInstrInfo *TII;
+ Type *I32Type;
+ LLVMContext *LCtx;
+
+protected:
+ bool processBlock(MachineFunction &MF, MachineBasicBlock &MBB) {
+ MachineConstantPool *MCP = MF.getConstantPool();
+ bool Changed = false;
+
+ for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); I++) {
+ for (unsigned j = 0; j < I->getNumOperands(); j++) {
+ const Constant *c;
+
+ switch (I->getOperand(j).getType()) {
+ case MachineOperand::MO_Immediate:
+ /* FIXME: what about 64 bit ints ? */
+ c = ConstantInt::get(Type::getInt32Ty(*LCtx),
+ (int32_t)I->getOperand(j).getImm());
+ break;
+ case MachineOperand::MO_FPImmediate:
+ c = I->getOperand(j).getFPImm();
+ /* FIXME */
+ break;
+ default:
+ continue;
+ }
+ unsigned int idx = MCP->getConstantPoolIndex(c, 4);
+ /* Store the idx as Immediate the writer will know what todo */
+ I->getOperand(j).ChangeToImmediate(idx);
+ }
+ }
+
+ return Changed;
+ }
+
+public:
+ virtual bool doInitialization(Module &M) override {
+ LCtx = &M.getContext();
+ return false;
+ }
+
+ bool runOnMachineFunction(MachineFunction &MF) override {
+ TII = MF.getSubtarget().getInstrInfo();
+
+ bool Changed = false;
+
+ for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
+ MachineBasicBlock &B = *I++;
+ if (processBlock(MF, B))
+ Changed = true;
+ }
+
+ return Changed;
+ }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ MachineFunctionPass::getAnalysisUsage(AU);
+ }
+ };
+}
+
+INITIALIZE_PASS(TGSIPreEmitImm, DEBUG_TYPE,
+ "TGSI Pre-Emit Immediate translation pass", false, false)
+
+char TGSIPreEmitImm::ID = 0;
+
+FunctionPass*
+llvm::createTGSIPreEmitImmPass() { return new TGSIPreEmitImm(); }
diff --git a/lib/Target/TGSI/TGSITargetMachine.cpp b/lib/Target/TGSI/TGSITargetMachine.cpp
index 40e5c0e34d0..80fde34d1ed 100644
--- a/lib/Target/TGSI/TGSITargetMachine.cpp
+++ b/lib/Target/TGSI/TGSITargetMachine.cpp
@@ -30,7 +30,14 @@ namespace {
return getTM<TGSITargetMachine>();
}
- virtual bool addInstSelector();
+ virtual bool addInstSelector() {
+ addPass(createTGSIISelDag(getTGSITargetMachine()));
+ return false;
+ }
+
+ void addPreEmitPass() override {
+ addPass(createTGSIPreEmitImmPass(), false);
+ }
};
}
@@ -61,8 +68,3 @@ TGSITargetMachine::TGSITargetMachine(const Target &T, const Triple &TT,
TargetPassConfig *TGSITargetMachine::createPassConfig(PassManagerBase &PM) {
return new TGSIPassConfig(this, PM);
}
-
-bool TGSIPassConfig::addInstSelector() {
- addPass(createTGSIISelDag(getTGSITargetMachine()));
- return false;
-}