diff options
| author | Joakim Sindholt <opensource@zhasha.com> | 2009-10-15 21:33:16 +0200 |
|---|---|---|
| committer | Joakim Sindholt <opensource@zhasha.com> | 2009-10-15 21:33:16 +0200 |
| commit | d667885bb0546d72cc99ccbe70854c9657f8c2c1 (patch) | |
| tree | 83980bff3ec634dbf6ffe449d5b8c114cecba75b | |
| parent | a1a97e9c6542d3d29c8b2cc0c40ee38ea1a89d3d (diff) | |
xml: begin massive cleanup of the enums.
There's still much to do here, but at least now it validates
| -rw-r--r-- | r300reg.xml | 1388 |
1 files changed, 642 insertions, 746 deletions
diff --git a/r300reg.xml b/r300reg.xml index 9a87478..9f636ef 100644 --- a/r300reg.xml +++ b/r300reg.xml @@ -2,180 +2,162 @@ <database xmlns="http://nouveau.freedesktop.org/" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="rules-ng.xsd"> <domain name="R300" /> -<enum name="ENUM0"> - <value value="0" name="NORMAL_OPERATION"><doc>Normal operation.</doc></value> - <value value="1" name="RESOLVE_OPERATION"><doc>Resolve operation.</doc></value> +<enum name="AARESOLVE_MODE"> + <value value="0" name="NORMAL"><doc>Normal operation.</doc></value> + <value value="1" name="RESOLVE"><doc>Resolve operation.</doc></value> </enum> -<enum name="ENUM1"> - <value value="0" name="1"><doc>1.0</doc></value> - <value value="1" name="2"><doc>2.2</doc></value> +<enum name="AARESOLVE_GAMMA"> + <value value="0" name="1_0"><doc>1.0</doc></value> + <value value="1" name="2_2"><doc>2.2</doc></value> </enum> -<enum name="ENUM2"> - <value value="0" name="ADD_AND_CLAMP"><doc>Add and Clamp</doc></value> - <value value="1" name="ADD_BUT_NO_CLAMP"><doc>Add but no Clamp</doc></value> - <value value="2" name="SUBTRACT_DST_FROM_SRC"><doc>Subtract Dst from Src, and Clamp</doc></value> - <value value="3" name="SUBTRACT_DST_FROM_SRC"><doc>Subtract Dst from Src, and don't Clamp</doc></value> - <value value="4" name="MINIMUM_OF_SRC"><doc>Minimum of Src, Dst (the src and dst blend functions are forced to D3D_ONE)</doc></value> - <value value="5" name="MAXIMUM_OF_SRC"><doc>Maximum of Src, Dst (the src and dst blend functions are forced to D3D_ONE)</doc></value> - <value value="6" name="SUBTRACT_SRC_FROM_DST"><doc>Subtract Src from Dst, and Clamp</doc></value> - <value value="7" name="SUBTRACT_SRC_FROM_DST"><doc>Subtract Src from Dst, and don't Clamp</doc></value> +<enum name="COMBINE_FUNCTION"> + <value value="0" name="ADD_CLAMP"><doc>Add and Clamp</doc></value> + <value value="1" name="ADD"><doc>Add but no Clamp</doc></value> + <value value="2" name="SRC_MINUS_DST_CLAMP"><doc>Subtract Dst from Src, and Clamp</doc></value> + <value value="3" name="SRC_MINUS_DST"><doc>Subtract Dst from Src, and don't Clamp</doc></value> + <value value="4" name="MIN"><doc>Minimum of Src, Dst (the src and dst blend functions are forced to D3D_ONE)</doc></value> + <value value="5" name="MAX"><doc>Maximum of Src, Dst (the src and dst blend functions are forced to D3D_ONE)</doc></value> + <value value="6" name="DST_MINUS_SRC_CLAMP"><doc>Subtract Src from Dst, and Clamp</doc></value> + <value value="7" name="DST_MINUS_SRC"><doc>Subtract Src from Dst, and don't Clamp</doc></value> </enum> -<enum name="ENUM3"> - <value value="1" name="D3D_ZERO"><doc>D3D_ZERO</doc></value> - <value value="2" name="D3D_ONE"><doc>D3D_ONE</doc></value> - <value value="3" name="D3D_SRCCOLOR"><doc>D3D_SRCCOLOR</doc></value> - <value value="4" name="D3D_INVSRCCOLOR"><doc>D3D_INVSRCCOLOR</doc></value> - <value value="5" name="D3D_SRCALPHA"><doc>D3D_SRCALPHA</doc></value> - <value value="6" name="D3D_INVSRCALPHA"><doc>D3D_INVSRCALPHA</doc></value> - <value value="7" name="D3D_DESTALPHA"><doc>D3D_DESTALPHA</doc></value> - <value value="8" name="D3D_INVDESTALPHA"><doc>D3D_INVDESTALPHA</doc></value> - <value value="9" name="D3D_DESTCOLOR"><doc>D3D_DESTCOLOR</doc></value> - <value value="10" name="D3D_INVDESTCOLOR"><doc>D3D_INVDESTCOLOR</doc></value> - <value value="11" name="D3D_SRCALPHASAT"><doc>D3D_SRCALPHASAT</doc></value> - <value value="12" name="D3D_BOTHSRCALPHA"><doc>D3D_BOTHSRCALPHA</doc></value> - <value value="13" name="D3D_BOTHINVSRCALPHA"><doc>D3D_BOTHINVSRCALPHA</doc></value> - <value value="32" name="GL_ZERO"><doc>GL_ZERO</doc></value> - <value value="33" name="GL_ONE"><doc>GL_ONE</doc></value> - <value value="34" name="GL_SRC_COLOR"><doc>GL_SRC_COLOR</doc></value> - <value value="35" name="GL_ONE_MINUS_SRC_COLOR"><doc>GL_ONE_MINUS_SRC_COLOR</doc></value> - <value value="36" name="GL_DST_COLOR"><doc>GL_DST_COLOR</doc></value> - <value value="37" name="GL_ONE_MINUS_DST_COLOR"><doc>GL_ONE_MINUS_DST_COLOR</doc></value> - <value value="38" name="GL_SRC_ALPHA"><doc>GL_SRC_ALPHA</doc></value> - <value value="39" name="GL_ONE_MINUS_SRC_ALPHA"><doc>GL_ONE_MINUS_SRC_ALPHA</doc></value> - <value value="40" name="GL_DST_ALPHA"><doc>GL_DST_ALPHA</doc></value> - <value value="41" name="GL_ONE_MINUS_DST_ALPHA"><doc>GL_ONE_MINUS_DST_ALPHA</doc></value> - <value value="42" name="GL_SRC_ALPHA_SATURATE"><doc>GL_SRC_ALPHA_SATURATE</doc></value> - <value value="43" name="GL_CONSTANT_COLOR"><doc>GL_CONSTANT_COLOR</doc></value> - <value value="44" name="GL_ONE_MINUS_CONSTANT_COLOR"><doc>GL_ONE_MINUS_CONSTANT_COLOR</doc></value> - <value value="45" name="GL_CONSTANT_ALPHA"><doc>GL_CONSTANT_ALPHA</doc></value> - <value value="46" name="GL_ONE_MINUS_CONSTANT_ALPHA"><doc>GL_ONE_MINUS_CONSTANT_ALPHA</doc></value> +<enum name="BLEND_FUNC_SRC"> + <value value="1" name="D3D_ZERO" /> + <value value="2" name="D3D_ONE" /> + <value value="3" name="D3D_SRCCOLOR" /> + <value value="4" name="D3D_INVSRCCOLOR" /> + <value value="5" name="D3D_SRCALPHA" /> + <value value="6" name="D3D_INVSRCALPHA" /> + <value value="7" name="D3D_DESTALPHA" /> + <value value="8" name="D3D_INVDESTALPHA" /> + <value value="9" name="D3D_DESTCOLOR" /> + <value value="10" name="D3D_INVDESTCOLOR" /> + <value value="11" name="D3D_SRCALPHASAT" /> + <value value="12" name="D3D_BOTHSRCALPHA" /> + <value value="13" name="D3D_BOTHINVSRCALPHA" /> + <value value="32" name="GL_ZERO" /> + <value value="33" name="GL_ONE" /> + <value value="34" name="GL_SRC_COLOR" /> + <value value="35" name="GL_ONE_MINUS_SRC_COLOR" /> + <value value="36" name="GL_DST_COLOR" /> + <value value="37" name="GL_ONE_MINUS_DST_COLOR" /> + <value value="38" name="GL_SRC_ALPHA" /> + <value value="39" name="GL_ONE_MINUS_SRC_ALPHA" /> + <value value="40" name="GL_DST_ALPHA" /> + <value value="41" name="GL_ONE_MINUS_DST_ALPHA" /> + <value value="42" name="GL_SRC_ALPHA_SATURATE" /> + <value value="43" name="GL_CONSTANT_COLOR" /> + <value value="44" name="GL_ONE_MINUS_CONSTANT_COLOR" /> + <value value="45" name="GL_CONSTANT_ALPHA" /> + <value value="46" name="GL_ONE_MINUS_CONSTANT_ALPHA" /> </enum> -<enum name="ENUM4"> - <value value="1" name="D3D_ZERO"><doc>D3D_ZERO</doc></value> - <value value="2" name="D3D_ONE"><doc>D3D_ONE</doc></value> - <value value="3" name="D3D_SRCCOLOR"><doc>D3D_SRCCOLOR</doc></value> - <value value="4" name="D3D_INVSRCCOLOR"><doc>D3D_INVSRCCOLOR</doc></value> - <value value="5" name="D3D_SRCALPHA"><doc>D3D_SRCALPHA</doc></value> - <value value="6" name="D3D_INVSRCALPHA"><doc>D3D_INVSRCALPHA</doc></value> - <value value="7" name="D3D_DESTALPHA"><doc>D3D_DESTALPHA</doc></value> - <value value="8" name="D3D_INVDESTALPHA"><doc>D3D_INVDESTALPHA</doc></value> - <value value="9" name="D3D_DESTCOLOR"><doc>D3D_DESTCOLOR</doc></value> - <value value="10" name="D3D_INVDESTCOLOR"><doc>D3D_INVDESTCOLOR</doc></value> - <value value="32" name="GL_ZERO"><doc>GL_ZERO</doc></value> - <value value="33" name="GL_ONE"><doc>GL_ONE</doc></value> - <value value="34" name="GL_SRC_COLOR"><doc>GL_SRC_COLOR</doc></value> - <value value="35" name="GL_ONE_MINUS_SRC_COLOR"><doc>GL_ONE_MINUS_SRC_COLOR</doc></value> - <value value="36" name="GL_DST_COLOR"><doc>GL_DST_COLOR</doc></value> - <value value="37" name="GL_ONE_MINUS_DST_COLOR"><doc>GL_ONE_MINUS_DST_COLOR</doc></value> - <value value="38" name="GL_SRC_ALPHA"><doc>GL_SRC_ALPHA</doc></value> - <value value="39" name="GL_ONE_MINUS_SRC_ALPHA"><doc>GL_ONE_MINUS_SRC_ALPHA</doc></value> - <value value="40" name="GL_DST_ALPHA"><doc>GL_DST_ALPHA</doc></value> - <value value="41" name="GL_ONE_MINUS_DST_ALPHA"><doc>GL_ONE_MINUS_DST_ALPHA</doc></value> - <value value="43" name="GL_CONSTANT_COLOR"><doc>GL_CONSTANT_COLOR</doc></value> - <value value="44" name="GL_ONE_MINUS_CONSTANT_COLOR"><doc>GL_ONE_MINUS_CONSTANT_COLOR</doc></value> - <value value="45" name="GL_CONSTANT_ALPHA"><doc>GL_CONSTANT_ALPHA</doc></value> - <value value="46" name="GL_ONE_MINUS_CONSTANT_ALPHA"><doc>GL_ONE_MINUS_CONSTANT_ALPHA</doc></value> +<enum name="BLEND_FUNC_DEST"> + <value value="1" name="D3D_ZERO" /> + <value value="2" name="D3D_ONE" /> + <value value="3" name="D3D_SRCCOLOR" /> + <value value="4" name="D3D_INVSRCCOLOR" /> + <value value="5" name="D3D_SRCALPHA" /> + <value value="6" name="D3D_INVSRCALPHA" /> + <value value="7" name="D3D_DESTALPHA" /> + <value value="8" name="D3D_INVDESTALPHA" /> + <value value="9" name="D3D_DESTCOLOR" /> + <value value="10" name="D3D_INVDESTCOLOR" /> + <value value="32" name="GL_ZERO" /> + <value value="33" name="GL_ONE" /> + <value value="34" name="GL_SRC_COLOR" /> + <value value="35" name="GL_ONE_MINUS_SRC_COLOR" /> + <value value="36" name="GL_DST_COLOR" /> + <value value="37" name="GL_ONE_MINUS_DST_COLOR" /> + <value value="38" name="GL_SRC_ALPHA" /> + <value value="39" name="GL_ONE_MINUS_SRC_ALPHA" /> + <value value="40" name="GL_DST_ALPHA" /> + <value value="41" name="GL_ONE_MINUS_DST_ALPHA" /> + <value value="43" name="GL_CONSTANT_COLOR" /> + <value value="44" name="GL_ONE_MINUS_CONSTANT_COLOR" /> + <value value="45" name="GL_CONSTANT_ALPHA" /> + <value value="46" name="GL_ONE_MINUS_CONSTANT_ALPHA" /> </enum> -<enum name="ENUM5"> - <value value="0" name="DISABLE"><doc>Disable</doc></value> - <value value="1" name="ENABLE"><doc>Enable</doc></value> -</enum> -<enum name="ENUM7"> - <value value="0" name="1_BUFFER"><doc>1 buffer. This is the only mode where the cb processes the end of packet command.</doc></value> - <value value="1" name="2_BUFFERS"><doc>2 buffers</doc></value> - <value value="2" name="3_BUFFERS"><doc>3 buffers</doc></value> - <value value="3" name="4_BUFFERS"><doc>4 buffers</doc></value> +<enum name="ENABLE"> + <value value="0" name="DISABLE" /> + <value value="1" name="ENABLE" /> </enum> -<enum name="ENUM8"> - <value value="0" name="3D_DESTINATION_IS_NOT_MACROTILED"><doc>3D destination is not macrotiled</doc></value> - <value value="1" name="3D_DESTINATION_IS_MACROTILED"><doc>3D destination is macrotiled</doc></value> +<enum name="MICROTILE"> + <value value="0" name="LINEAR"><doc>3D destination is no microtiled</doc></value> + <value value="1" name="TILED"><doc>3D destination is microtiled</doc></value> + <value value="2" name="TILED_SQUARE"><doc>3D destination is square microtiled. Only available in 16-bit</doc></value> </enum> -<enum name="ENUM9"> - <value value="0" name="3D_DESTINATION_IS_NO_MICROTILED"><doc>3D destination is no microtiled</doc></value> - <value value="1" name="3D_DESTINATION_IS_MICROTILED"><doc>3D destination is microtiled</doc></value> - <value value="2" name="3D_DESTINATION_IS_SQUARE_MICROTILED"><doc>3D destination is square microtiled. Only available in 16-bit</doc></value> -</enum> -<enum name="ENUM10"> +<enum name="BYTESWAP"> <value value="0" name="NO_SWAP"><doc>No swap</doc></value> <value value="1" name="WORD_SWAP"><doc>Word swap (2 bytes in 16-bit)</doc></value> <value value="2" name="DWORD_SWAP"><doc>Dword swap (4 bytes in a 32-bit)</doc></value> - <value value="3" name="HALF"><doc>Half-Dword swap (2 16-bit in a 32-bit)</doc></value> + <value value="3" name="HALF_DWORD_SWAP"><doc>Half-Dword swap (2 16-bit in a 32-bit)</doc></value> </enum> -<enum name="ENUM12"> +<enum name="DITHER_MODE"> <value value="0" name="TRUNCATE"><doc>Truncate</doc></value> <value value="1" name="ROUND"><doc>Round</doc></value> - <value value="2" name="LUT_DITHER"><doc>LUT dither</doc></value> -</enum> -<enum name="ENUM16"> - <value value="0" name="AF_NEVER"><doc>AF_NEVER</doc></value> - <value value="1" name="AF_LESS"><doc>AF_LESS</doc></value> - <value value="2" name="AF_EQUAL"><doc>AF_EQUAL</doc></value> - <value value="3" name="AF_LE"><doc>AF_LE</doc></value> - <value value="4" name="AF_GREATER"><doc>AF_GREATER</doc></value> - <value value="5" name="AF_NOTEQUAL"><doc>AF_NOTEQUAL</doc></value> - <value value="6" name="AF_GE"><doc>AF_GE</doc></value> - <value value="7" name="AF_ALWAYS"><doc>AF_ALWAYS</doc></value> + <value value="2" name="LUT"><doc>LUT dither</doc></value> </enum> -<enum name="ENUM17"> - <value value="0" name="2"><doc>2/4 sub-pixel samples.</doc></value> - <value value="1" name="3"><doc>3/6 sub-pixel samples.</doc></value> +<enum name="ALPHACOMPARE_FUNC"> + <value value="0" name="NEVER" /> + <value value="1" name="LESS" /> + <value value="2" name="EQUAL" /> + <value value="3" name="LE" /> + <value value="4" name="GREATER" /> + <value value="5" name="NOTEQUAL" /> + <value value="6" name="GE" /> + <value value="7" name="ALWAYS" /> </enum> -<enum name="ENUM20"> - <value value="0" name="SOLID_FILL_COLOR"><doc>Solid fill color</doc></value> - <value value="1" name="FLAT_SHADING"><doc>Flat shading</doc></value> - <value value="2" name="GOURAUD_SHADING"><doc>Gouraud shading</doc></value> +<enum name="ALPHA_SUBPIXEL_SAMPLES"> + <value value="0" name="2_4"><doc>2/4 sub-pixel samples.</doc></value> + <value value="1" name="3_6"><doc>3/6 sub-pixel samples.</doc></value> </enum> -<enum name="ENUM22"> - <value value="0" name="NO_EFFECT"><doc>No effect.</doc></value> - <value value="1" name="PREVENTS_TCL_INTERFACE_FROM_DEADLOCKING_ON_GA_SIDE"><doc>Prevents TCL interface from deadlocking on GA side.</doc></value> +<enum name="SHADING"> + <value value="0" name="SOLID_FILL"><doc>Solid fill color</doc></value> + <value value="1" name="FLAT"><doc>Flat shading</doc></value> + <value value="2" name="GOURAUD"><doc>Gouraud shading</doc></value> </enum> -<enum name="ENUM23"> - <value value="0" name="NO_EFFECT"><doc>No effect.</doc></value> - <value value="1" name="ENABLES_HIGH"><doc>Enables high-performance register/primitive switching.</doc></value> -</enum> -<enum name="ENUM24"> +<enum name="LINE_END"> <value value="0" name="HORIZONTAL"><doc>Horizontal</doc></value> <value value="1" name="VERTICAL"><doc>Vertical</doc></value> <value value="2" name="SQUARE"><doc>Square (horizontal or vertical depending upon slope)</doc></value> <value value="3" name="COMPUTED"><doc>Computed (perpendicular to slope)</doc></value> </enum> -<enum name="ENUM27"> - <value value="0" name="DRAW_POINTS"><doc>Draw points.</doc></value> - <value value="1" name="DRAW_LINES"><doc>Draw lines.</doc></value> - <value value="2" name="DRAW_TRIANGLES"><doc>Draw triangles.</doc></value> +<enum name="POLY_DRAW_TYPE"> + <value value="0" name="POINTS"><doc>Draw points.</doc></value> + <value value="1" name="LINES"><doc>Draw lines.</doc></value> + <value value="2" name="TRIANGLES"><doc>Draw triangles.</doc></value> </enum> -<enum name="ENUM28"> - <value value="0" name="ROUND_TO_TRUNC"><doc>Round to trunc</doc></value> - <value value="1" name="ROUND_TO_NEAREST"><doc>Round to nearest</doc></value> +<enum name="ROUNDING_MODE"> + <value value="0" name="TRUNC"><doc>Round to trunc</doc></value> + <value value="1" name="NEAREST"><doc>Round to nearest</doc></value> </enum> -<enum name="ENUM32"> - <value value="0" name="DISABLE_STENCIL_AUTO_INC"><doc>Disable stencil auto inc/dec (def).</doc></value> - <value value="1" name="ENABLE_STENCIL_AUTO_INC"><doc>Enable stencil auto inc/dec based on triangle cw/ccw, force into dzy low bit.</doc></value> - <value value="2" name="FORCE_0_INTO_DZY_LOW_BIT"><doc>Force 0 into dzy low bit.</doc></value> +<enum name="STENCIL_AUTO_MODE"> + <value value="0" name="DISABLE"><doc>Disable stencil auto inc/dec (def).</doc></value> + <value value="1" name="ENABLE"><doc>Enable stencil auto inc/dec based on triangle cw/ccw, force into dzy low bit.</doc></value> + <value value="2" name="FORCE_0"><doc>Force 0 into dzy low bit.</doc></value> </enum> -<enum name="ENUM41"> - <value value="0" name="32_WORDS"><doc>32 words</doc></value> - <value value="1" name="64_WORDS"><doc>64 words</doc></value> - <value value="2" name="128_WORDS"><doc>128 words</doc></value> - <value value="3" name="256_WORDS"><doc>256 words</doc></value> +<enum name="WORDSIZE_16"> + <value value="0" name="16"><doc>16 words</doc></value> + <value value="1" name="32"><doc>32 words</doc></value> + <value value="2" name="64"><doc>64 words</doc></value> + <value value="3" name="128"><doc>128 words</doc></value> </enum> -<enum name="ENUM42"> - <value value="0" name="16_WORDS"><doc>16 words</doc></value> - <value value="1" name="32_WORDS"><doc>32 words</doc></value> - <value value="2" name="64_WORDS"><doc>64 words</doc></value> - <value value="3" name="128_WORDS"><doc>128 words</doc></value> +<enum name="WORDSIZE_32"> + <value value="0" name="32"><doc>32 words</doc></value> + <value value="1" name="64"><doc>64 words</doc></value> + <value value="2" name="128"><doc>128 words</doc></value> + <value value="3" name="256"><doc>256 words</doc></value> </enum> -<enum name="ENUM43"> - <value value="0" name="64_WORDS"><doc>64 words</doc></value> - <value value="1" name="128_WORDS"><doc>128 words</doc></value> - <value value="2" name="256_WORDS"><doc>256 words</doc></value> - <value value="3" name="512_WORDS"><doc>512 words</doc></value> +<enum name="WORDSIZE_64"> + <value value="0" name="64"><doc>64 words</doc></value> + <value value="1" name="128"><doc>128 words</doc></value> + <value value="2" name="256"><doc>256 words</doc></value> + <value value="3" name="512"><doc>512 words</doc></value> </enum> <enum name="ENUM44"> - <value value="0" name="0_WORDS"><doc>0 words</doc></value> - <value value="1" name="4_WORDS"><doc>4 words</doc></value> - <value value="2" name="8_WORDS"><doc>8 words</doc></value> - <value value="3" name="12_WORDS"><doc>12 words</doc></value> + <value value="0" name="0"><doc>0 words</doc></value> + <value value="1" name="4"><doc>4 words</doc></value> + <value value="2" name="8"><doc>8 words</doc></value> + <value value="3" name="12"><doc>12 words</doc></value> </enum> <enum name="ENUM45"> <value value="0" name="SELECT_C0A"><doc>Select C0A</doc></value> @@ -207,17 +189,13 @@ <value value="0" name="ST"><doc>ST-A tile.</doc></value> <value value="1" name="ST"><doc>ST-B tile.</doc></value> </enum> -<enum name="ENUM52"> - <value value="0" name="SELECT_1"><doc>Select 1/12 subpixel precision.</doc></value> - <value value="1" name="SELECT_1"><doc>Select 1/16 subpixel precision.</doc></value> -</enum> -<enum name="ENUM53"> - <value value="0" name="NO_WRITE"><doc>No write - texture coordinate not valid</doc></value> - <value value="1" name="WRITE"><doc>write - texture valid</doc></value> +<enum name="SUBPIXEL_PRECISION"> + <value value="0" name="1_12"><doc>Select 1/12 subpixel precision.</doc></value> + <value value="1" name="1_16"><doc>Select 1/16 subpixel precision.</doc></value> </enum> -<enum name="ENUM55"> - <value value="0" name="SAMPLE_TEXTURE_COORDINATES_AT_REAL_PIXEL_CENTERS"><doc>Sample texture coordinates at real pixel centers</doc></value> - <value value="1" name="SAMPLE_TEXTURE_COORDINATES_AT_ADJUSTED_PIXEL_CENTERS"><doc>Sample texture coordinates at adjusted pixel centers</doc></value> +<enum name="PIXEL_CENTER"> + <value value="0" name="REAL"><doc>Sample texture coordinates at real pixel centers</doc></value> + <value value="1" name="ADJUSTED"><doc>Sample texture coordinates at adjusted pixel centers</doc></value> </enum> <enum name="ENUM57"> <value value="0" name="FOUR_COMPONENTS"><doc>Four components (R,G,B,A)</doc></value> @@ -230,7 +208,7 @@ <value value="9" name="ZERO_COMPONENTS"><doc>Zero components (1,1,1,0)</doc></value> <value value="10" name="ZERO_COMPONENTS"><doc>Zero components (1,1,1,1)</doc></value> </enum> -<enum name="ENUM58"> +<enum name="COLOR_COMPONENT"> <value value="0" name="C0"><doc>C0 - 1st texture component</doc></value> <value value="1" name="C1"><doc>C1 - 2nd texture component</doc></value> <value value="2" name="C2"><doc>C2 - 3rd texture component</doc></value> @@ -306,7 +284,7 @@ <value value="30" name="T"><doc>T-out,B-out,VL-out,VR-in</doc></value> <value value="31" name="T"><doc>T-out,B-out,VL-out,VR-out</doc></value> </enum> -<enum name="ENUM69"> +<enum name="TX_FILTER_CLAMP"> <value value="0" name="WRAP"><doc>Wrap (repeat)</doc></value> <value value="1" name="MIRROR"><doc>Mirror</doc></value> <value value="2" name="CLAMP_TO_LAST_TEXEL"><doc>Clamp to last texel (0.0 to 1.0)</doc></value> @@ -316,50 +294,41 @@ <value value="6" name="CLAMP_TO_BORDER_COLOR"><doc>Clamp to border color (0.0 to 1.0)</doc></value> <value value="7" name="MIRRORONCE_TO_BORDER_COLOR"><doc>MirrorOnce to border color (-1.0 to 1.0)</doc></value> </enum> -<enum name="ENUM70"> +<enum name="TX_R300MINMAG_FILTER"> <value value="1" name="POINT"><doc>Point</doc></value> <value value="2" name="LINEAR"><doc>Linear</doc></value> </enum> -<enum name="ENUM71"> +<enum name="TX_FILTER"> <value value="0" name="NONE"><doc>None</doc></value> <value value="1" name="POINT"><doc>Point</doc></value> <value value="2" name="LINEAR"><doc>Linear</doc></value> </enum> -<enum name="ENUM72"> - <value value="0" name="NONE"><doc>None (no filter specifed, select from MIN/MAG filters)</doc></value> - <value value="1" name="POINT"><doc>Point</doc></value> - <value value="2" name="LINEAR"><doc>Linear</doc></value> -</enum> -<enum name="ENUM73"> +<enum name="CHROMA_KEY"> <value value="0" name="DISABLE"><doc>Disable</doc></value> <value value="1" name="CHROMAKEY"><doc>ChromaKey (kill pixel if any sample matches chroma key)</doc></value> <value value="2" name="CHROMAKEYBLEND"><doc>ChromaKeyBlend (set sample to 0 if it matches chroma key)</doc></value> </enum> -<enum name="ENUM74"> - <value value="0" name="NORMAL_ROUNDING_ON_ALL_COMPONENTS"><doc>Normal rounding on all components (+0.5)</doc></value> - <value value="1" name="MPEG4_ROUNDING_ON_ALL_COMPONENTS"><doc>MPEG4 rounding on all components (+0.25)</doc></value> -</enum> -<enum name="ENUM75"> - <value value="0" name="DONT_TRUNCATE_COORDINATE_FRACTIONS"><doc>Dont truncate coordinate fractions.</doc></value> - <value value="1" name="TRUNCATE_COORDINATE_FRACTIONS_TO_0"><doc>Truncate coordinate fractions to 0.0 and 0.5 for MPEG</doc></value> +<enum name="BILINEAR_ROUNDING"> + <value value="0" name="NORMAL"><doc>Normal rounding on all components (+0.5)</doc></value> + <value value="1" name="MPEG4"><doc>MPEG4 rounding on all components (+0.25)</doc></value> </enum> -<enum name="ENUM76"> - <value value="0" name="NON"><doc>Non-Projected</doc></value> - <value value="1" name="PROJECTED"><doc>Projected</doc></value> +<enum name="MPEG_TRUNC_MODE"> + <value value="0" name="DISABLE"><doc>Dont truncate coordinate fractions.</doc></value> + <value value="1" name="TRUNCATE"><doc>Truncate coordinate fractions to 0.0 and 0.5 for MPEG</doc></value> </enum> -<enum name="ENUM77"> - <value value="0" name="USE_TXWIDTH_FOR_IMAGE_ADDRESSING"><doc>Use TXWIDTH for image addressing</doc></value> - <value value="1" name="USE_TXPITCH_FOR_IMAGE_ADDRESSING"><doc>Use TXPITCH for image addressing</doc></value> +<enum name="TXWIDTH_OR_PITCH"> + <value value="0" name="TXWIDTH"><doc>Use TXWIDTH for image addressing</doc></value> + <value value="1" name="TXPITCH"><doc>Use TXPITCH for image addressing</doc></value> </enum> -<enum name="ENUM87"> - <value value="0" name="DISABLE_YUV_TO_RGB_CONVERSION"><doc>Disable YUV to RGB conversion</doc></value> - <value value="1" name="ENABLE_YUV_TO_RGB_CONVERSION"><doc>Enable YUV to RGB conversion (with clamp)</doc></value> - <value value="2" name="ENABLE_YUV_TO_RGB_CONVERSION"><doc>Enable YUV to RGB conversion (without clamp)</doc></value> +<enum name="YUV_TO_RGB_MODE"> + <value value="0" name="DISABLE"><doc>Disable YUV to RGB conversion</doc></value> + <value value="1" name="ENABLE_CLAMP"><doc>Enable YUV to RGB conversion (with clamp)</doc></value> + <value value="2" name="ENABLE"><doc>Enable YUV to RGB conversion (without clamp)</doc></value> </enum> -<enum name="ENUM88"> - <value value="0" name="2D"><doc>2D</doc></value> - <value value="1" name="3D"><doc>3D</doc></value> - <value value="2" name="CUBE"><doc>Cube</doc></value> +<enum name="COORD_TYPE"> + <value value="0" name="2D" /> + <value value="1" name="3D" /> + <value value="2" name="CUBE" /> </enum> <enum name="ENUM89"> <value value="0" name="WHOLE"><doc>WHOLE</doc></value> @@ -394,26 +363,9 @@ <value value="30" name="SIXTEENTH_REGION_E"><doc>SIXTEENTH_REGION_E</doc></value> <value value="31" name="SIXTEENTH_REGION_F"><doc>SIXTEENTH_REGION_F</doc></value> </enum> -<enum name="ENUM90"> - <value value="0" name="NO_SWAP"><doc>No swap</doc></value> - <value value="1" name="16_BIT_SWAP"><doc>16 bit swap</doc></value> - <value value="2" name="32_BIT_SWAP"><doc>32 bit swap</doc></value> - <value value="3" name="HALF"><doc>Half-DWORD swap</doc></value> -</enum> -<enum name="ENUM91"> - <value value="0" name="2KB_PAGE_IS_LINEAR"><doc>2KB page is linear</doc></value> - <value value="1" name="2KB_PAGE_IS_TILED"><doc>2KB page is tiled</doc></value> -</enum> -<enum name="ENUM92"> - <value value="0" name="32_BYTE_CACHE_LINE_IS_LINEAR"><doc>32 byte cache line is linear</doc></value> - <value value="1" name="32_BYTE_CACHE_LINE_IS_TILED"><doc>32 byte cache line is tiled</doc></value> - <value value="2" name="32_BYTE_CACHE_LINE_IS_TILED_SQUARE"><doc>32 byte cache line is tiled square (only applies to 16-bit texel)</doc></value> -</enum> -<enum name="ENUM95"> - <value value="0" name="A"><doc>A: Output to render target A</doc></value> - <value value="1" name="B"><doc>B: Output to render target B</doc></value> - <value value="2" name="C"><doc>C: Output to render target C</doc></value> - <value value="3" name="D"><doc>D: Output to render target D</doc></value> +<enum name="MACROTILE"> + <value value="0" name="LINEAR"><doc>2KB page is linear</doc></value> + <value value="1" name="TILED"><doc>2KB page is tiled</doc></value> </enum> <enum name="ENUM97"> <value value="0" name="SRC0"><doc>src0.r</doc></value> @@ -436,11 +388,11 @@ <value value="17" name="1"><doc>1.0</doc></value> <value value="18" name="0"><doc>0.5</doc></value> </enum> -<enum name="ENUM98"> - <value value="0" name="NOP"><doc>NOP: Do not modify input</doc></value> - <value value="1" name="NEG"><doc>NEG: Negate input</doc></value> - <value value="2" name="ABS"><doc>ABS: Take absolute value of input</doc></value> - <value value="3" name="NAB"><doc>NAB: Take negative absolute value of input</doc></value> +<enum name="ALU_INPUT_MOD"> + <value value="0" name="NOP"><doc>Do not modify input</doc></value> + <value value="1" name="NEG"><doc>Negate input</doc></value> + <value value="2" name="ABS"><doc>Take absolute value of input</doc></value> + <value value="3" name="NAB"><doc>Take negative absolute value of input</doc></value> </enum> <enum name="ENUM99"> <value value="0" name="1"><doc>1.0-2.0*A0</doc></value> @@ -448,20 +400,20 @@ <value value="2" name="A1"><doc>A1+A0</doc></value> <value value="3" name="1"><doc>1.0-A0</doc></value> </enum> -<enum name="ENUM101"> - <value value="0" name="RESULT"><doc>Result</doc></value> - <value value="1" name="RESULT"><doc>Result *2</doc></value> - <value value="2" name="RESULT"><doc>Result *4</doc></value> - <value value="3" name="RESULT"><doc>Result *8</doc></value> - <value value="4" name="RESULT"><doc>Result / 2</doc></value> - <value value="5" name="RESULT"><doc>Result / 4</doc></value> - <value value="6" name="RESULT"><doc>Result / 8</doc></value> +<enum name="ALU_OUTPUT_MOD"> + <value value="0" name="NONE"><doc>Result</doc></value> + <value value="1" name="MUL_2"><doc>Result * 2</doc></value> + <value value="2" name="MUL_4"><doc>Result * 4</doc></value> + <value value="3" name="MUL_8"><doc>Result * 8</doc></value> + <value value="4" name="DIV_2"><doc>Result / 2</doc></value> + <value value="5" name="DIV_4"><doc>Result / 4</doc></value> + <value value="6" name="DIV_8"><doc>Result / 8</doc></value> </enum> -<enum name="ENUM102"> - <value value="0" name="DO_NOT_CLAMP_OUTPUT"><doc>Do not clamp output.</doc></value> - <value value="1" name="CLAMP_OUTPUT_TO_THE_RANGE"><doc>Clamp output to the range [0,1].</doc></value> +<enum name="CLAMP_MODE"> + <value value="0" name="DISABLE"><doc>Do not clamp output.</doc></value> + <value value="1" name="CLAMP"><doc>Clamp output to the range [0,1].</doc></value> </enum> -<enum name="ENUM103"> +<enum name="WRITE_MASK"> <value value="0" name="NONE"><doc>NONE: No not write any output.</doc></value> <value value="1" name="R"><doc>R: Write the red channel only.</doc></value> <value value="2" name="G"><doc>G: Write the green channel only.</doc></value> @@ -511,7 +463,7 @@ <value value="2" name="RGB1"><doc>RGB1+RGB0</doc></value> <value value="3" name="1"><doc>1.0-RGB0</doc></value> </enum> -<enum name="ENUM109"> +<enum name="COLOR_FORMAT"> <value value="0" name="C4_8"><doc>C4_8 (S/U)</doc></value> <value value="1" name="C4_10"><doc>C4_10 (U)</doc></value> <value value="2" name="C4_10_GAMMA"><doc>C4_10_GAMMA - (U)</doc></value> @@ -534,28 +486,21 @@ <value value="20" name="C2_32_FP"><doc>C2_32_FP - (S23E8)</doc></value> <value value="21" name="C4_32_FP"><doc>C4_32_FP - (S23E8)</doc></value> </enum> -<enum name="ENUM110"> +<enum name="CHANNEL"> <value value="0" name="ALPHA"><doc>Alpha</doc></value> <value value="1" name="RED"><doc>Red</doc></value> <value value="2" name="GREEN"><doc>Green</doc></value> <value value="3" name="BLUE"><doc>Blue</doc></value> </enum> -<enum name="ENUM113"> +<enum name="WSRC"> <value value="0" name="WSRC_US"><doc>WSRC_US - W comes from shader instruction</doc></value> <value value="1" name="WSRC_RAS"><doc>WSRC_RAS - W comes from rasterizer</doc></value> </enum> -<enum name="ENUM114"> - <value value="0" name=""><doc>-W < X < W, -W < Y < W, -W < Z < W (OpenGL Definition)</doc></value> - <value value="1" name=""><doc>-W < X < W, -W < Y < W, 0 < Z < W (DirectX Definition)</doc></value> +<enum name="CLIP_SPACE"> + <value value="0" name="GL"><doc>-W < X < W, -W < Y < W, -W < Z < W (OpenGL Definition)</doc></value> + <value value="1" name="D3D"><doc>-W < X < W, -W < Y < W, 0 < Z < W (DirectX Definition)</doc></value> </enum> -<enum name="ENUM115"> - <value value="0" name=""><doc>(2^n - 1) (i.e. 8-bit -> 0.</doc></value> - <value value="0" name="255"><doc>255.0) 0 1 0.</doc></value> - <value value="0" name="1"><doc>1.0 1 0 -2^(n-1) - (2^(n-1) - 1) (i.e. 8-bit -> -128.</doc></value> - <value value="0" name="127"><doc>127.0) 1 1 -1.</doc></value> - <value value="0" name="1"><doc>1.0 where n is the number of bits in the associated fixed point value For signed, normalize conversion, since the fixed point range is not evenly distributed around 0, there are 3 different methods supported by R300. See the VAP_PSC_SGN_NORM_CNTL description for details.</doc></value> -</enum> -<enum name="ENUM117"> +<enum name="PRIM_TYPE"> <value value="0" name="NONE"><doc>None (will not trigger Setup Engine to run)</doc></value> <value value="1" name="POINT_LIST"><doc>Point List</doc></value> <value value="2" name="LINE_LIST"><doc>Line List</doc></value> @@ -570,56 +515,24 @@ <value value="14" name="QUAD_STRIP"><doc>Quad Strip</doc></value> <value value="15" name="POLYGON"><doc>Polygon *Encoding 7 indicates whether a 16-bit word of wFlags is present in the stream of indices arriving when the VTX_AMODE is programmed as a '0'. The Setup Engine just steps over the wFlags word; ignoring it. 0 = Stream contains just indices, as: [ Index1, Index0] [ Index3, Index2] [ Index5, Index4 ] etc... 1 = Stream contains indices and wFlags: [ Index1, Index0] [ wFlags,Index 2 ] [ Index4, Index3] [ wFlags, Index5 ] etc...</doc></value> </enum> -<enum name="ENUM118"> - <value value="0" name="STATE"><doc>State-Based Vertex Data. (Vertex data and tokens embedded in command stream.) 1 = Indexes (Indices embedded in command stream; vertex data to be fetched from memory.) 2 = Vertex List (Vertex data to be fetched from memory.) 3 = Vertex Data (Vertex data embedded in command stream.)</doc></value> -</enum> -<enum name="ENUM119"> - <value value="0" name="SELECT_COLOR_0"><doc>Select Color 0</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> -</enum> -<enum name="ENUM120"> - <value value="0" name="SELECT_COLOR_1"><doc>Select Color 1</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> +<enum name="VERTEX_DATA_PASS_MODE"> + <value value="0" name="STATE"><doc>State-Based Vertex Data. (Vertex data and tokens embedded in command stream.)</doc></value> + <value value="1" name="INDEXES"><doc>Indexes (Indices embedded in command stream; vertex data to be fetched from memory.)</doc></value> + <value value="2" name="VERTEX_LIST"><doc>Vertex List (Vertex data to be fetched from memory.)</doc></value> + <value value="3" name="VERTEX_DATA"><doc>Vertex Data (Vertex data embedded in command stream.)</doc></value> </enum> -<enum name="ENUM121"> - <value value="0" name="SELECT_COLOR_2"><doc>Select Color 2</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> -</enum> -<enum name="ENUM122"> - <value value="0" name="SELECT_COLOR_3"><doc>Select Color 3</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> -</enum> -<enum name="ENUM123"> - <value value="0" name="SELECT_COLOR_4"><doc>Select Color 4</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> -</enum> -<enum name="ENUM124"> - <value value="0" name="SELECT_COLOR_5"><doc>Select Color 5</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> -</enum> -<enum name="ENUM125"> - <value value="0" name="SELECT_COLOR_6"><doc>Select Color 6</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> -</enum> -<enum name="ENUM126"> - <value value="0" name="SELECT_COLOR_7"><doc>Select Color 7</doc></value> - <value value="1" name="SELECT_USER_COLOR_0"><doc>Select User Color 0</doc></value> - <value value="2" name="SELECT_USER_COLOR_1"><doc>Select User Color 1</doc></value> +<enum name="COLOR_SELECT"> + <value value="0" name="THIS"><doc>Select this color</doc></value> + <value value="1" name="USER_0"><doc>Select User Color 0</doc></value> + <value value="2" name="USER_1"><doc>Select User Color 1</doc></value> </enum> <enum name="ENUM127"> <value value="0" name="USER_COLOR_0_STATE_IS_NOT_UPDATED_WHEN_USER_COLOR_0_IS_WRITTEN"><doc>User Color 0 State is NOT updated when User Color 0 is written.</doc></value> <value value="1" name="USER_COLOR_1_STATE_IS_UPDATED_WHEN_USER_COLOR_0_IS_WRITTEN"><doc>User Color 1 State IS updated when User Color 0 is written.</doc></value> </enum> -<enum name="ENUM129"> - <value value="0" name="UPDATE_HIERARCHICAL_Z_WITH_MAX_VALUE"><doc>Update Hierarchical Z with Max value</doc></value> - <value value="1" name="UPDATE_HIERARCHICAL_Z_WITH_MIN_VALUE"><doc>Update Hierarchical Z with Min value</doc></value> +<enum name="HZ_UPDATE_VAL"> + <value value="0" name="MAX"><doc>Update Hierarchical Z with Max value</doc></value> + <value value="1" name="MIN"><doc>Update Hierarchical Z with Min value</doc></value> </enum> <enum name="ENUM130"> <value value="0" name="Z_UNIT_CACHE_CONTROLLER_DOES_RMW"><doc>Z unit cache controller does RMW</doc></value> @@ -630,42 +543,32 @@ <value value="1" name="16"><doc>16-bit compressed 13E3</doc></value> <value value="2" name="24"><doc>24-bit Integer Z, 8 bit Stencil (LSBs)</doc></value> </enum> -<enum name="ENUM139"> +<enum name="DSCOMPARE_FUNC"> <value value="0" name="NEVER"><doc>Never</doc></value> <value value="1" name="LESS"><doc>Less</doc></value> - <value value="2" name="LESS_OR_EQUAL"><doc>Less or Equal</doc></value> + <value value="2" name="LE"><doc>Less or Equal</doc></value> <value value="3" name="EQUAL"><doc>Equal</doc></value> - <value value="4" name="GREATER_OR_EQUAL"><doc>Greater or Equal</doc></value> - <value value="5" name="GREATER_THAN"><doc>Greater Than</doc></value> - <value value="6" name="NOT_EQUAL"><doc>Not Equal</doc></value> + <value value="4" name="GE"><doc>Greater or Equal</doc></value> + <value value="5" name="GREATER"><doc>Greater Than</doc></value> + <value value="6" name="NOTEQUAL"><doc>Not Equal</doc></value> <value value="7" name="ALWAYS"><doc>Always</doc></value> </enum> -<enum name="ENUM140"> - <value value="0" name="NEVER"><doc>Never</doc></value> - <value value="1" name="LESS"><doc>Less</doc></value> - <value value="2" name="LESS_OR_EQUAL"><doc>Less or Equal</doc></value> - <value value="3" name="EQUAL"><doc>Equal</doc></value> - <value value="4" name="GREATER_OR_EQUAL"><doc>Greater or Equal</doc></value> - <value value="5" name="GREATER"><doc>Greater</doc></value> - <value value="6" name="NOT_EQUAL"><doc>Not Equal</doc></value> - <value value="7" name="ALWAYS"><doc>Always</doc></value> -</enum> -<enum name="ENUM141"> +<enum name="STENCILFAIL_VAL"> <value value="0" name="KEEP"><doc>Keep: New value = Old value</doc></value> <value value="1" name="ZERO"><doc>Zero: New value = 0</doc></value> <value value="2" name="REPLACE"><doc>Replace: New value = STENCILREF</doc></value> - <value value="3" name="INCREMENT"><doc>Increment: New value++ (clamp)</doc></value> - <value value="4" name="DECREMENT"><doc>Decrement: New value-- (clamp)</doc></value> - <value value="5" name="INVERT_NEW_VALUE"><doc>Invert new value: New value = !Old value</doc></value> + <value value="3" name="INCREMENT_CLAMP"><doc>Increment: New value++ (clamp)</doc></value> + <value value="4" name="DECREMENT_CLAMP"><doc>Decrement: New value-- (clamp)</doc></value> + <value value="5" name="INVERT"><doc>Invert new value: New value = !Old value</doc></value> <value value="6" name="INCREMENT"><doc>Increment: New value++ (wrap)</doc></value> <value value="7" name="DECREMENT"><doc>Decrement: New value-- (wrap)</doc></value> </enum> -<enum name="ENUM144"> - <value value="0" name=""><doc>>PIO,</doc></value> - <value value="1" name=""><doc>>BM</doc></value> +<enum name="CSQ_MODE"> + <value value="0" name="PIO" /> + <value value="1" name="BM" /> </enum> -<enum name="ENUM146"> - <value value="0" name="PHYSICAL"><doc>Physical (Default),</doc></value> +<enum name="VP_ADDR_MODE"> + <value value="0" name="PHYSICAL"><doc>Physical (Default)</doc></value> <value value="1" name="VIRTUAL"><doc>Virtual</doc></value> </enum> <enum name="ENUM151"> @@ -795,14 +698,6 @@ <value value="2" name="USE_B_CHANNEL_AS_Q_COORDINATE"><doc>Use B channel as Q coordinate</doc></value> <value value="3" name="USE_A_CHANNEL_AS_Q_COORDINATE"><doc>Use A channel as Q coordinate</doc></value> </enum> -<enum name="ENUM244"> - <value value="12" name=""><doc>[8:0];2</doc></value> - <value value="56" name=""><doc>[7:0])</doc></value> -</enum> -<enum name="ENUM245"> - <value value="12" name=""><doc>[23:15];2</doc></value> - <value value="56" name=""><doc>[22:15])</doc></value> -</enum> <group name="rX00_regs" prepend="R300_"> <reg32 name="RB3D_AARESOLVE_OFFSET" access="rw" offset="0x4E80"> @@ -821,11 +716,11 @@ </bitfield> <bitfield name="SRCBLEND" high="21" low="16"> <doc>Source Blend Function , Alpha blending function (SRC).</doc> - <use-enum ref="ENUM3" /> + <use-enum ref="BLEND_FUNC_SRC" /> </bitfield> <bitfield name="DESTBLEND" high="29" low="24"> <doc>Destination Blend Function , Alpha blending function (DST).</doc> - <use-enum ref="ENUM4" /> + <use-enum ref="BLEND_FUNC_DEST" /> </bitfield> </reg32> <reg32 name="RB3D_CLRCMP_CLR" access="rw" offset="0x4E20"> @@ -847,9 +742,9 @@ <doc>Dithering control register. Pipelined through the blender.</doc> <bitfield name="DITHER_MODE" high="1" low="0"> <doc>Dither mode</doc> - <use-enum ref="ENUM12" /> + <use-enum ref="DITHER_MODE" /> </bitfield> - <bitfield name="ALPHA_DITHER_MODE" high="3" low="2"><use-enum ref="ENUM12" /></bitfield> + <bitfield name="ALPHA_DITHER_MODE" high="3" low="2"><use-enum ref="DITHER_MODE" /></bitfield> </reg32> <reg32 name="RB3D_DSTCACHE_CTLSTAT" access="rw" offset="0x4E4C"> <doc>Destination Color Buffer Cache Control/Status. If the cb is in e2 mode, then a flush or free will not occur upon a write to this register, but a sync will be immediately sent if one is requested. If both DC_FLUSH and DC_FREE are zero but DC_FINISH is one, then a sync will be sent immediately -- the cb will not wait for all the previous operations to complete before sending the sync. Unpipelined except when DC_FINISH and DC_FREE are both set to zero.</doc> @@ -874,7 +769,7 @@ </reg32> <reg32 name="RB3D_ROPCNTL" access="rw" offset="0x4E18"> <doc>3D ROP Control. Stalls the 2d/3d datapath until it is idle.</doc> - <bitfield name="ROP_ENABLE" high="2" low="2"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="ROP_ENABLE" high="2" low="2"><use-enum ref="ENABLE" /></bitfield> <bitfield name="ROP" high="11" low="8"><doc>ROP2 code for 3D fragments. This value is replicated into 2 nibbles to form the equivalent ROP3 code to control the ROP3 logic. These are the GDI ROP2 codes.</doc></bitfield> </reg32> <reg32 name="FG_DEPTH_SRC" access="rw" offset="0x4BD8"> @@ -888,7 +783,7 @@ <doc>Fog Blending Enable</doc> <bitfield name="ENABLE" high="0" low="0"> <doc>Enable for fog blending</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="FN" high="2" low="1"> <doc>Fog generation function</doc> @@ -902,35 +797,35 @@ <doc>Specifies per RGB or Alpha shading method.</doc> <bitfield name="RGB0_SHADING" high="1" low="0"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="ALPHA0_SHADING" high="3" low="2"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="RGB1_SHADING" high="5" low="4"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="ALPHA1_SHADING" high="7" low="6"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="RGB2_SHADING" high="9" low="8"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="ALPHA2_SHADING" high="11" low="10"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="RGB3_SHADING" high="13" low="12"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="ALPHA3_SHADING" high="15" low="14"> <doc>Specifies solid, flat or Gouraud shading.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="PROVOKING_VERTEX" high="17" low="16"> <doc>Specifies, for flat shaded polygons, which vertex holds the polygon color.</doc> @@ -988,11 +883,11 @@ </bitfield> <bitfield name="FRONT_PTYPE" high="6" low="4"> <doc>Specifies how to render front-facing polygons.</doc> - <use-enum ref="ENUM27" /> + <use-enum ref="POLY_DRAW_TYPE" /> </bitfield> <bitfield name="BACK_PTYPE" high="9" low="7"> <doc>Specifies how to render back-facing polygons.</doc> - <use-enum ref="ENUM27" /> + <use-enum ref="POLY_DRAW_TYPE" /> </bitfield> </reg32> <reg32 name="GA_TRIANGLE_STIPPLE" access="rw" offset="0x4214"> @@ -1004,7 +899,7 @@ <doc>Specifies the graphics pipeline configuration for antialiasing.</doc> <bitfield name="AA_ENABLE" high="0" low="0"> <doc>Enables antialiasing.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="NUM_AA_SUBSAMPLES" high="2" low="1"> <doc>Specifies the number of subsamples to use while antialiasing.</doc> @@ -1038,7 +933,7 @@ <doc>Hierarchical Z Enable</doc> <bitfield name="HZ_EN" high="0" low="0"> <doc>Enable for hierarchical Z.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="HZ_MAX" high="1" low="1"> <doc>Specifies whether to compute min or max z value</doc> @@ -1115,15 +1010,15 @@ <doc>Enables for polygon offset</doc> <bitfield name="FRONT_ENABLE" high="0" low="0"> <doc>Enables front facing polygon's offset.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="BACK_ENABLE" high="1" low="1"> <doc>Enables back facing polygon's offset.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="PARA_ENABLE" high="2" low="2"> <doc>Forces all parallelograms to have FRONT_FACING for poly offset -- Need to have FRONT_ENABLE also set to have Z offset for parallelograms.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="SU_POLY_OFFSET_FRONT_OFFSET" access="rw" offset="0x42A8"> @@ -1405,20 +1300,15 @@ <bitfield name="DEPTHPITCH" high="13" low="2"><doc>Z buffer pitch in multiples of 4 pixels.</doc></bitfield> <bitfield name="DEPTHMACROTILE" high="16" low="16"> <doc>Specifies whether Z buffer is macro-tiled. macro-tiles are 2K aligned</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="DEPTHMICROTILE" high="18" low="17"> <doc>Specifies whether Z buffer is micro-tiled. micro-tiles is 32 bytes</doc> - <value value="0" name="32_BYTE_CACHE_LINE_IS_LINEAR"><doc>32 byte cache line is linear</doc></value> - <value value="1" name="32_BYTE_CACHE_LINE_IS_TILED"><doc>32 byte cache line is tiled</doc></value> - <value value="2" name="32_BYTE_CACHE_LINE_IS_TILED_SQUARE"><doc>32 byte cache line is tiled square (only applies to 16-bit pixels)</doc></value> + <use-enum ref="MICROTILE" /> </bitfield> <bitfield name="DEPTHENDIAN" high="20" low="19"> <doc>Specifies endian control for the Z buffer.</doc> - <value value="0" name="NO_SWAP"><doc>No swap</doc></value> - <value value="1" name="WORD_SWAP"><doc>Word swap</doc></value> - <value value="2" name="DWORD_SWAP"><doc>Dword swap</doc></value> - <value value="3" name="HALF_DWORD_SWAP"><doc>Half Dword swap</doc></value> + <use-enum ref="BYTESWAP" /> </bitfield> </reg32> <reg32 name="ZB_DEPTHXY_OFFSET" access="rw" offset="0x4F60"> @@ -1471,26 +1361,26 @@ <doc>Resolve Buffer Control. Unpipelined</doc> <bitfield name="AARESOLVE_MODE" high="0" low="0"> <doc>Specifies if the color buffer is in resolve mode. The cache must be empty before changing this register.</doc> - <use-enum ref="ENUM0" /> + <use-enum ref="AARESOLVE_MODE" /> </bitfield> <bitfield name="AARESOLVE_GAMMA" high="1" low="1"> <doc>Specifies the gamma and degamma to be applied to the samples before and after filtering, respectively.</doc> - <use-enum ref="ENUM1" /> + <use-enum ref="AARESOLVE_GAMMA" /> </bitfield> </reg32> <reg32 name="RB3D_BLENDCNTL" access="rw" offset="0x4E04"> <doc>Alpha Blend Control for Color Channels. Pipelined through the blender.</doc> <bitfield name="ALPHA_BLEND_ENABLE" high="0" low="0"> <doc>Allow alpha blending with the destination.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="SEPARATE_ALPHA_ENABLE" high="1" low="1"> <doc>Enables use of RB3D_ABLENDCNTL</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="READ_ENABLE" high="2" low="2"> <doc>When blending is enabled, this enables memory reads. Memory reads will still occur when this is disabled if they are for reasons not related to blending.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="DISCARD_SRC_PIXELS" high="5" low="3"> <doc>Discard pixels when blending is enabled based on the src color.</doc> @@ -1508,26 +1398,23 @@ </bitfield> <bitfield name="SRCBLEND" high="21" low="16"> <doc>Source Blend Function , Alpha blending function (SRC).</doc> - <use-enum ref="ENUM3" /> + <use-enum ref="BLEND_FUNC_SRC" /> </bitfield> <bitfield name="DESTBLEND" high="29" low="24"> <doc>Destination Blend Function , Alpha blending function (DST).</doc> - <use-enum ref="ENUM4" /> + <use-enum ref="BLEND_FUNC_DEST" /> </bitfield> </reg32> <reg32 name="RB3D_CCTL" access="rw" offset="0x4E00"> <doc>Unpipelined.</doc> - <bitfield name="NUM_MULTIWRITES" high="6" low="5"> - <doc>A quad is replicated and written to this many buffers.</doc> - <use-enum ref="ENUM7" /> - </bitfield> + <bitfield name="NUM_MULTIWRITES" high="6" low="5"><doc>A quad is replicated and written to this many + 1 buffers. 0 (1 buffer) is the only mode where the cb processes the end of packet command.</doc></bitfield> <bitfield name="CLRCMP_FLIPE_ENABLE" high="7" low="7"> <doc>Enables equivalent of rage128 CMP_EQ_FLIP color compare mode. This is used to ensure 3D data does not get chromakeyed away by logic in the backend.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="AA_COMPRESSION_ENABLE" high="9" low="9"> <doc>Enables AA color compression. The cache must be empty before this is changed.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="Reserved" high="10" low="10"><doc>Set to 0</doc></bitfield> </reg32> @@ -1537,15 +1424,15 @@ <bitfield name="COLORPITCH" high="13" low="1"><doc>3D destination pitch in multiples of 2-pixels.</doc></bitfield> <bitfield name="COLORTILE" high="16" low="16"> <doc>Denotes whether the 3D destination is in macrotiled format.</doc> - <use-enum ref="ENUM8" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="COLORMICROTILE" high="18" low="17"> <doc>Denotes whether the 3D destination is in microtiled format.</doc> - <use-enum ref="ENUM9" /> + <use-enum ref="MICROTILE" /> </bitfield> <bitfield name="COLORENDIAN" high="20" low="19"> <doc>Specifies endian control for the color buffer.</doc> - <use-enum ref="ENUM10" /> + <use-enum ref="BYTESWAP" /> </bitfield> <bitfield name="COLORFORMAT" high="24" low="21"> <doc>3D destination color format.</doc> @@ -1566,19 +1453,19 @@ <doc>3D Color Channel Mask. If all the channels used in the current color format are disabled, then the cb will discard all the incoming quads. Pipelined through the blender.</doc> <bitfield name="BLUE_MASK" high="0" low="0"> <doc>mask bit for blue channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="GREEN_MASK" high="1" low="1"> <doc>mask bit for green channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="RED_MASK" high="2" low="2"> <doc>mask bit for red channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ALPHA_MASK" high="3" low="3"> <doc>mask bit for alpha channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="RB3D_COLOR_CLEAR_VALUE" access="rw" offset="0x4E14"> @@ -1596,23 +1483,23 @@ <bitfield name="AF_VAL" high="7" low="0"><doc>Specifies the alpha compare value.</doc></bitfield> <bitfield name="AF_FUNC" high="10" low="8"> <doc>Specifies the alpha compare function.</doc> - <use-enum ref="ENUM16" /> + <use-enum ref="ALPHACOMPARE_FUNC" /> </bitfield> <bitfield name="AF_EN" high="11" low="11"> <doc>Enables/Disables alpha compare function.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="AM_EN" high="16" low="16"> <doc>Enables/Disables alpha-to-mask function.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="AM_CFG" high="17" low="17"> <doc>Specfies number of sub-pixel samples for alpha-to-mask function.</doc> - <use-enum ref="ENUM17" /> + <use-enum ref="ALPHA_SUBPIXEL_SAMPLES" /> </bitfield> <bitfield name="DITH_EN" high="20" low="20"> <doc>Enables/Disables RGB Dithering.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="FG_FOG_COLOR_B" access="rw" offset="0x4BD0"> @@ -1634,12 +1521,12 @@ <reg32 name="GA_ENHANCE" access="rw" offset="0x4274"> <doc>GA Enhancement Register</doc> <bitfield name="DEADLOCK_CNTL" high="0" low="0"> - <doc>TCL/GA Deadlock control.</doc> - <use-enum ref="ENUM22" /> + <doc>TCL/GA Deadlock control. Prevents TCL interface from deadlocking on GA side.</doc> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="FASTSYNC_CNTL" high="1" low="1"> <doc>Enables Fast register/primitive switching</doc> - <use-enum ref="ENUM23" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="GA_LINE_CNTL" access="rw" offset="0x4234"> @@ -1647,7 +1534,7 @@ <bitfield name="WIDTH" high="15" low="0"><doc>1/2 width of line, in subpixels; (16.0) fixed format.</doc></bitfield> <bitfield name="END_TYPE" high="17" low="16"> <doc>Specifies how ends of lines should be drawn.</doc> - <use-enum ref="ENUM24" /> + <use-enum ref="LINE_END" /> </bitfield> </reg32> <reg32 name="GA_LINE_STIPPLE_VALUE" access="rw" offset="0x4260"> @@ -1667,11 +1554,11 @@ <doc>Specifies the rouding mode for geometry & color SPFP to FP conversions.</doc> <bitfield name="GEOMETRY_ROUND" high="1" low="0"> <doc>Trunc (0) or round to nearest (1) for geometry (XY).</doc> - <use-enum ref="ENUM28" /> + <use-enum ref="ROUNDING_MODE" /> </bitfield> <bitfield name="COLOR_ROUND" high="3" low="2"> <doc>Trunc (0) or round to nearest (1) for colors (RGBA).</doc> - <use-enum ref="ENUM28" /> + <use-enum ref="ROUNDING_MODE" /> </bitfield> <bitfield name="RGB_CLAMP" high="4" low="4"> <doc>Specifies SPFP color clamp range of [0,1] or [-8,8] for RGB.</doc> @@ -1702,19 +1589,19 @@ <doc>Specifies top of Raster pipe specific enable controls.</doc> <bitfield name="POINT_STUFF_ENABLE" high="0" low="0"> <doc>Specifies if points will have stuffed texture coordinates.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="LINE_STUFF_ENABLE" high="1" low="1"> <doc>Specifies if lines will have stuffed texture coordinates.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TRIANGLE_STUFF_ENABLE" high="2" low="2"> <doc>Specifies if triangles will have stuffed texture coordinates.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="STENCIL_AUTO" high="5" low="4"> <doc>Specifies if the auto dec/inc stencil mode should be enabled, and how.</doc> - <use-enum ref="ENUM32" /> + <use-enum ref="STENCIL_AUTO_MODE" /> </bitfield> <bitfield name="TEX0_SOURCE" high="17" low="16"> <doc>Specifies the source of the texture coordinates for this texture.</doc> @@ -1769,35 +1656,35 @@ <doc>Specifies the sizes of the various FIFO's in the sc/rs/us. This register must be the first one written</doc> <bitfield name="SC_IFIFO_SIZE" high="1" low="0"> <doc>Size of scan converter input FIFO (XYZ)</doc> - <use-enum ref="ENUM41" /> + <use-enum ref="WORDSIZE_32" /> </bitfield> <bitfield name="SC_TZFIFO_SIZE" high="3" low="2"> <doc>Size of scan converter top-of-pipe Z FIFO</doc> - <use-enum ref="ENUM42" /> + <use-enum ref="WORDSIZE_16" /> </bitfield> <bitfield name="SC_BFIFO_SIZE" high="5" low="4"> <doc>Size of scan converter input FIFO (B)</doc> - <use-enum ref="ENUM41" /> + <use-enum ref="WORDSIZE_32" /> </bitfield> <bitfield name="RS_TFIFO_SIZE" high="7" low="6"> <doc>Size of ras input FIFO (Texture)</doc> - <use-enum ref="ENUM43" /> + <use-enum ref="WORDSIZE_64" /> </bitfield> <bitfield name="RS_CFIFO_SIZE" high="9" low="8"> <doc>Size of ras input FIFO (Color)</doc> - <use-enum ref="ENUM43" /> + <use-enum ref="WORDSIZE_64" /> </bitfield> <bitfield name="US_RAM_SIZE" high="11" low="10"> <doc>Size of us RAM</doc> - <use-enum ref="ENUM43" /> + <use-enum ref="WORDSIZE_64" /> </bitfield> <bitfield name="US_OFIFO_SIZE" high="13" low="12"> <doc>Size of us output FIFO (RGBA)</doc> - <use-enum ref="ENUM42" /> + <use-enum ref="WORDSIZE_16" /> </bitfield> <bitfield name="US_WFIFO_SIZE" high="15" low="14"> <doc>Size of us output FIFO (W)</doc> - <use-enum ref="ENUM42" /> + <use-enum ref="WORDSIZE_16" /> </bitfield> <bitfield name="RS_HIGHWATER_COL" high="18" low="16"><doc>High water mark for RS color FIFO (0-7, default 7)</doc></bitfield> <bitfield name="RS_HIGHWATER_TEX" high="21" low="19"><doc>High water mark for RS texture FIFO (0-7, default 7)</doc></bitfield> @@ -1847,7 +1734,7 @@ <doc>Specifies the graphics pipeline configuration for rasterization</doc> <bitfield name="ENABLE" high="0" low="0"> <doc>Enables tiling, otherwise all tiles receive all polygons.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="PIPE_COUNT" high="3" low="1"> <doc>Specifies the number of active pipes and contexts.</doc> @@ -1872,7 +1759,7 @@ </bitfield> <bitfield name="SUBPIXEL" high="16" low="16"> <doc>Specifies the subpixel precision.</doc> - <use-enum ref="ENUM52" /> + <use-enum ref="SUBPIXEL_PRECISION" /> </bitfield> <bitfield name="QUADS_PER_RAS" high="18" low="17"><doc>unused</doc></bitfield> <bitfield name="BB_SCAN" high="19" low="19"><doc>unused</doc></bitfield> @@ -1891,7 +1778,7 @@ <bitfield name="TEX_ID" high="2" low="0"><doc>Specifies the index (into the RS_IP table) of the texture address output during this rasterizer instruction</doc></bitfield> <bitfield name="TEX_CN" high="5" low="3"> <doc>Write enable for texture address</doc> - <use-enum ref="ENUM53" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_ADDR" high="10" low="6"><doc>Specifies the destination address (within the current pixel stack frame) of the texture address output during this rasterizer instruction</doc></bitfield> <bitfield name="COL_ID" high="13" low="11"><doc>Specifies the index (into the RS_IP table) of the color output during this rasterizer instruction</doc></bitfield> @@ -1903,7 +1790,7 @@ <bitfield name="COL_ADDR" high="21" low="17"><doc>Specifies the destination address (within the current pixel stack frame) of the color output during this rasterizer instruction</doc></bitfield> <bitfield name="TEX_ADJ" high="22" low="22"> <doc>Specifies whether to sample texture coordinates at the real or adjusted pixel centers</doc> - <use-enum ref="ENUM55" /> + <use-enum ref="PIXEL_CENTER" /> </bitfield> <bitfield name="COL_BIAS" high="24" low="23"><doc>unused</doc></bitfield> </reg32> @@ -1935,19 +1822,19 @@ </bitfield> <bitfield name="SEL_S" high="15" low="13"> <doc>Source select for S, T, R, and Q</doc> - <use-enum ref="ENUM58" /> + <use-enum ref="COLOR_COMPONENT" /> </bitfield> <bitfield name="SEL_T" high="18" low="16"> <doc>Source select for S, T, R, and Q</doc> - <use-enum ref="ENUM58" /> + <use-enum ref="COLOR_COMPONENT" /> </bitfield> <bitfield name="SEL_R" high="21" low="19"> <doc>Source select for S, T, R, and Q</doc> - <use-enum ref="ENUM58" /> + <use-enum ref="COLOR_COMPONENT" /> </bitfield> <bitfield name="SEL_Q" high="24" low="22"> <doc>Source select for S, T, R, and Q</doc> - <use-enum ref="ENUM58" /> + <use-enum ref="COLOR_COMPONENT" /> </bitfield> </reg32> </stripe> @@ -1988,38 +1875,38 @@ </reg32> <reg32 name="SU_TEX_WRAP" access="rw" offset="0x42A0"> <doc>Enables for Cylindrical Wrapping</doc> - <bitfield name="T0C0" high="0" low="0"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T0C1" high="1" low="1"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T0C2" high="2" low="2"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T0C3" high="3" low="3"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T1C0" high="4" low="4"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T1C1" high="5" low="5"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T1C2" high="6" low="6"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T1C3" high="7" low="7"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T2C0" high="8" low="8"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T2C1" high="9" low="9"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T2C2" high="10" low="10"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T2C3" high="11" low="11"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T3C0" high="12" low="12"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T3C1" high="13" low="13"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T3C2" high="14" low="14"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T3C3" high="15" low="15"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T4C0" high="16" low="16"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T4C1" high="17" low="17"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T4C2" high="18" low="18"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T4C3" high="19" low="19"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T5C0" high="20" low="20"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T5C1" high="21" low="21"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T5C2" high="22" low="22"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T5C3" high="23" low="23"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T6C0" high="24" low="24"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T6C1" high="25" low="25"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T6C2" high="26" low="26"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T6C3" high="27" low="27"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T7C0" high="28" low="28"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T7C1" high="29" low="29"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T7C2" high="30" low="30"><use-enum ref="ENUM5" /></bitfield> - <bitfield name="T7C3" high="31" low="31"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="T0C0" high="0" low="0"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T0C1" high="1" low="1"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T0C2" high="2" low="2"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T0C3" high="3" low="3"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T1C0" high="4" low="4"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T1C1" high="5" low="5"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T1C2" high="6" low="6"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T1C3" high="7" low="7"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T2C0" high="8" low="8"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T2C1" high="9" low="9"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T2C2" high="10" low="10"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T2C3" high="11" low="11"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T3C0" high="12" low="12"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T3C1" high="13" low="13"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T3C2" high="14" low="14"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T3C3" high="15" low="15"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T4C0" high="16" low="16"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T4C1" high="17" low="17"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T4C2" high="18" low="18"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T4C3" high="19" low="19"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T5C0" high="20" low="20"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T5C1" high="21" low="21"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T5C2" high="22" low="22"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T5C3" high="23" low="23"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T6C0" high="24" low="24"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T6C1" high="25" low="25"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T6C2" high="26" low="26"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T6C3" high="27" low="27"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T7C0" high="28" low="28"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T7C1" high="29" low="29"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T7C2" high="30" low="30"><use-enum ref="ENABLE" /></bitfield> + <bitfield name="T7C3" high="31" low="31"><use-enum ref="ENABLE" /></bitfield> </reg32> <stripe offset="0x45C0" stride="0x0004" length="16"> <reg32 name="TX_BORDER_COLOR" access="rw" offset="0x0000"> @@ -2035,67 +1922,67 @@ <doc>Texture Enables for Maps 0 to 15</doc> <bitfield name="TEX_0_ENABLE" high="0" low="0"> <doc>Texture Map 0 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_1_ENABLE" high="1" low="1"> <doc>Texture Map 1 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_2_ENABLE" high="2" low="2"> <doc>Texture Map 2 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_3_ENABLE" high="3" low="3"> <doc>Texture Map 3 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_4_ENABLE" high="4" low="4"> <doc>Texture Map 4 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_5_ENABLE" high="5" low="5"> <doc>Texture Map 5 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_6_ENABLE" high="6" low="6"> <doc>Texture Map 6 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_7_ENABLE" high="7" low="7"> <doc>Texture Map 7 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_8_ENABLE" high="8" low="8"> <doc>Texture Map 8 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_9_ENABLE" high="9" low="9"> <doc>Texture Map 9 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_10_ENABLE" high="10" low="10"> <doc>Texture Map 10 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_11_ENABLE" high="11" low="11"> <doc>Texture Map 11 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_12_ENABLE" high="12" low="12"> <doc>Texture Map 12 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_13_ENABLE" high="13" low="13"> <doc>Texture Map 13 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_14_ENABLE" high="14" low="14"> <doc>Texture Map 14 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_15_ENABLE" high="15" low="15"> <doc>Texture Map 15 Enable.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <stripe offset="0x4400" stride="0x0004" length="16"> @@ -2103,31 +1990,31 @@ <doc>Texture Filter State for Map 0</doc> <bitfield name="CLAMP_S" high="2" low="0"> <doc>Clamp mode for first texture coordinate</doc> - <use-enum ref="ENUM69" /> + <use-enum ref="TX_FILTER_CLAMP" /> </bitfield> <bitfield name="CLAMP_T" high="5" low="3"> <doc>Clamp mode for second texture coordinate</doc> - <use-enum ref="ENUM69" /> + <use-enum ref="TX_FILTER_CLAMP" /> </bitfield> <bitfield name="CLAMP_R" high="8" low="6"> <doc>Clamp mode for third texture coordinate</doc> - <use-enum ref="ENUM69" /> + <use-enum ref="TX_FILTER_CLAMP" /> </bitfield> <bitfield name="MAG_FILTER" high="10" low="9"> <doc>Filter used when texture is magnified</doc> - <use-enum ref="ENUM70" /> + <use-enum ref="TX_R300MINMAG_FILTER" /> </bitfield> <bitfield name="MIN_FILTER" high="12" low="11"> <doc>Filter used when texture is minified</doc> - <use-enum ref="ENUM70" /> + <use-enum ref="TX_R300MINMAG_FILTER" /> </bitfield> <bitfield name="MIP_FILTER" high="14" low="13"> <doc>Filter used between mipmap levels</doc> - <use-enum ref="ENUM71" /> + <use-enum ref="TX_FILTER" /> </bitfield> <bitfield name="VOL_FILTER" high="16" low="15"> - <doc>Filter used between layers of a volume</doc> - <use-enum ref="ENUM72" /> + <doc>Filter used between layers of a volume. (if no filter is specifed, select from MIN/MAG filters)</doc> + <use-enum ref="TX_FILTER" /> </bitfield> <bitfield name="MAX_MIP_LEVEL" high="20" low="17"><doc>LOD index of largest (finest) mipmap to use (0 is largest). Ranges from 0 to NUM_LEVELS.</doc></bitfield> <bitfield name="ID" high="31" low="28"><doc>Logical id for this physical texture</doc></bitfield> @@ -2138,16 +2025,16 @@ <doc>Texture Filter State for Map 0</doc> <bitfield name="CHROMA_KEY_MODE" high="1" low="0"> <doc>Chroma Key Mode</doc> - <use-enum ref="ENUM73" /> + <use-enum ref="CHROMA_KEY" /> </bitfield> <bitfield name="MC_ROUND" high="2" low="2"> <doc>Bilinear rounding mode</doc> - <use-enum ref="ENUM74" /> + <use-enum ref="BILINEAR_ROUNDING" /> </bitfield> <bitfield name="LOD_BIAS" high="12" low="3"><doc>(s4.5). Ranges from -16.0 to 15.99. Mipmap LOD bias measured in mipmap levels. Added to the signed, computed LOD before the LOD is clamped.</doc></bitfield> <bitfield name="MC_COORD_TRUNCATE" high="14" low="14"> <doc>MPEG coordinate truncation mode</doc> - <use-enum ref="ENUM75" /> + <use-enum ref="MPEG_TRUNC_MODE" /> </bitfield> </reg32> </stripe> @@ -2160,11 +2047,11 @@ <bitfield name="NUM_LEVELS" high="29" low="26"><doc>Number of mipmap levels minus 1. Ranges from 0 to 11. Equivalent to LOD index of smallest (coarsest) mipmap to use.</doc></bitfield> <bitfield name="PROJECTED" high="30" low="30"> <doc>Specifies whether texture coords are projected.</doc> - <use-enum ref="ENUM76" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TXPITCH_EN" high="31" low="31"> <doc>Indicates when TXPITCH should be used instead of TXWIDTH for image addressing</doc> - <use-enum ref="ENUM77" /> + <use-enum ref="TXWIDTH_OR_PITCH" /> </bitfield> </reg32> </stripe> @@ -2260,16 +2147,16 @@ </bitfield> <bitfield name="GAMMA" high="21" low="21"> <doc>Optionally remove gamma from texture before passing to shader. Only apply to 8bit or less components.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="YUV_TO_RGB" high="23" low="22"> <doc>YUV to RGB conversion mode</doc> - <use-enum ref="ENUM87" /> + <use-enum ref="YUV_TO_RGB_MODE" /> </bitfield> - <bitfield name="SWAP_YUV" high="24" low="24"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="SWAP_YUV" high="24" low="24"><use-enum ref="ENABLE" /></bitfield> <bitfield name="TEX_COORD_TYPE" high="26" low="25"> <doc>Specifies coordinate type.</doc> - <use-enum ref="ENUM88" /> + <use-enum ref="COORD_TYPE" /> </bitfield> <bitfield name="CACHE" high="31" low="27"> <doc>Multi-texture performance can be optimized and made deterministic by assigning textures to separate regions under sw control.</doc> @@ -2291,15 +2178,15 @@ <doc>Texture Offset State for Map 0</doc> <bitfield name="ENDIAN_SWAP" high="1" low="0"> <doc>Endian Control</doc> - <use-enum ref="ENUM90" /> + <use-enum ref="BYTESWAP" /> </bitfield> <bitfield name="MACRO_TILE" high="2" low="2"> <doc>Macro Tile Control</doc> - <use-enum ref="ENUM91" /> + <use-enum ref="MACROTILE" /> </bitfield> <bitfield name="MICRO_TILE" high="4" low="3"> <doc>Micro Tile Control</doc> - <use-enum ref="ENUM92" /> + <use-enum ref="MICROTILE" /> </bitfield> <bitfield name="TXOFFSET" high="31" low="5"><doc>32-byte aligned pointer to base map</doc></bitfield> </reg32> @@ -2321,10 +2208,7 @@ <value value="0" name="NONE"><doc>NONE: No not write output.</doc></value> <value value="1" name="A"><doc>A: Write the alpha channel only.</doc></value> </bitfield> - <bitfield name="TARGET" high="26" low="25"> - <doc>Specifies which frame buffer target to write to.</doc> - <use-enum ref="ENUM95" /> - </bitfield> + <bitfield name="TARGET" high="26" low="25"><doc>Specifies which frame buffer target to write to.</doc></bitfield> <bitfield name="OMASK_W" high="27" low="27"> <doc>Specifies whether or not to write the Alpha component of the result of this instuction to the depth output fifo.</doc> <value value="0" name="NONE"><doc>NONE: No not write output to w.</doc></value> @@ -2342,7 +2226,7 @@ </bitfield> <bitfield name="MOD_A" high="6" low="5"> <doc>Specifies the modifier for inputs A, B, and C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="SEL_B" high="11" low="7"> <doc>Specifies the operand and component select for inputs A, B, and C.</doc> @@ -2350,7 +2234,7 @@ </bitfield> <bitfield name="MOD_B" high="13" low="12"> <doc>Specifies the modifier for inputs A, B, and C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="SEL_C" high="18" low="14"> <doc>Specifies the operand and component select for inputs A, B, and C.</doc> @@ -2358,7 +2242,7 @@ </bitfield> <bitfield name="MOD_C" high="20" low="19"> <doc>Specifies the modifier for inputs A, B, and C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="SRCP_OP" high="22" low="21"> <doc>Specifies how the pre-subtract value (SRCP) is computed</doc> @@ -2380,11 +2264,11 @@ </bitfield> <bitfield name="OMOD" high="29" low="27"> <doc>Specifies the output modifier for this instruction.</doc> - <use-enum ref="ENUM101" /> + <use-enum ref="ALU_OUTPUT_MOD" /> </bitfield> <bitfield name="CLAMP" high="30" low="30"> <doc>Specifies clamp mode for this instruction.</doc> - <use-enum ref="ENUM102" /> + <use-enum ref="CLAMP_MODE" /> </bitfield> </reg32> </stripe> @@ -2397,16 +2281,13 @@ <bitfield name="ADDRD" high="22" low="18"><doc>Specifies the address of the pixel stack frame register to which the RGB result of this instruction is to be written.</doc></bitfield> <bitfield name="WMASK" high="25" low="23"> <doc>Specifies which of the R, G, and B components of the result of this instruction are written to the pixel stack frame.</doc> - <use-enum ref="ENUM103" /> + <use-enum ref="WRITE_MASK" /> </bitfield> <bitfield name="OMASK" high="28" low="26"> <doc>Specifies which of the R, G, and B components of the result of this instruction are written to the output fifo.</doc> - <use-enum ref="ENUM103" /> - </bitfield> - <bitfield name="TARGET" high="30" low="29"> - <doc>Specifies which frame buffer target to write to.</doc> - <use-enum ref="ENUM95" /> + <use-enum ref="WRITE_MASK" /> </bitfield> + <bitfield name="TARGET" high="30" low="29"><doc>Specifies which frame buffer target to write to.</doc></bitfield> </reg32> </stripe> <stripe offset="0x48C0" stride="0x0004" length="64"> @@ -2418,7 +2299,7 @@ </bitfield> <bitfield name="MOD_A" high="6" low="5"> <doc>Specifies the modifier for inputs A, B, and C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="SEL_B" high="11" low="7"> <doc>Specifies the operand and component select for inputs A, B, and C.</doc> @@ -2426,7 +2307,7 @@ </bitfield> <bitfield name="MOD_B" high="13" low="12"> <doc>Specifies the modifier for inputs A, B, and C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="SEL_C" high="18" low="14"> <doc>Specifies the operand and component select for inputs A, B, and C.</doc> @@ -2434,7 +2315,7 @@ </bitfield> <bitfield name="MOD_C" high="20" low="19"> <doc>Specifies the modifier for inputs A, B, and C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="SRCP_OP" high="22" low="21"> <doc>Specifies how the pre-subtract value (SRCP) is computed</doc> @@ -2455,11 +2336,11 @@ </bitfield> <bitfield name="OMOD" high="29" low="27"> <doc>Specifies the output modifier for this instruction.</doc> - <use-enum ref="ENUM101" /> + <use-enum ref="ALU_OUTPUT_MOD" /> </bitfield> <bitfield name="CLAMP" high="30" low="30"> <doc>Specifies clamp mode for this instruction.</doc> - <use-enum ref="ENUM102" /> + <use-enum ref="CLAMP_MODE" /> </bitfield> <bitfield name="NOP" high="31" low="31"> <doc>Specifies whether to insert a NOP instruction after this. This would get specified in order to meet dependency requirements for the pre-subtract inputs.</doc> @@ -2497,7 +2378,7 @@ </bitfield> <bitfield name="FIRST_TEX" high="3" low="3"> <doc>Specifies whether or not the texture code for the first valid level is enabled</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <stripe offset="0x46A4" stride="0x0004" length="4"> @@ -2505,23 +2386,23 @@ <doc>Specifies how the shader output is written to the fog unit for each of up to four render targets</doc> <bitfield name="OUT_FMT" high="4" low="0"> <doc>Specifies the number and size of components</doc> - <use-enum ref="ENUM109" /> + <use-enum ref="COLOR_FORMAT" /> </bitfield> <bitfield name="C0_SEL" high="9" low="8"> <doc>Specifies the source for components C0, C1, C2, C3</doc> - <use-enum ref="ENUM110" /> + <use-enum ref="CHANNEL" /> </bitfield> <bitfield name="C1_SEL" high="11" low="10"> <doc>Specifies the source for components C0, C1, C2, C3</doc> - <use-enum ref="ENUM110" /> + <use-enum ref="CHANNEL" /> </bitfield> <bitfield name="C2_SEL" high="13" low="12"> <doc>Specifies the source for components C0, C1, C2, C3</doc> - <use-enum ref="ENUM110" /> + <use-enum ref="CHANNEL" /> </bitfield> <bitfield name="C3_SEL" high="15" low="14"> <doc>Specifies the source for components C0, C1, C2, C3</doc> - <use-enum ref="ENUM110" /> + <use-enum ref="CHANNEL" /> </bitfield> <bitfield name="OUT_SIGN" high="19" low="16"><doc>Mask specifying whether components C3, C2, C1 and C0 are signed (C4_8, C_16, C2_16 and C4_16 formats only)</doc></bitfield> </reg32> @@ -2557,7 +2438,7 @@ </bitfield> <bitfield name="W_SRC" high="2" low="2"> <doc>Source for W</doc> - <use-enum ref="ENUM113" /> + <use-enum ref="WSRC" /> </bitfield> </reg32> <stripe offset="0x4C0C" stride="0x0010" length="32"> @@ -2605,7 +2486,7 @@ <bitfield name="VF_MAX_VTX_NUM" high="21" low="18"><doc>This field controls the number of vertices that the vertex fetcher manages for the TCL and Setup Vertex Storage memories (and therefore the number of vertices that can be re-used). This value should be set to 12 for most operation, This number may be modified for performance evaluation. The value is the maximum vertex number used which is one less than the number of vertices (i.e. a 12 means 13 vertices will be used)</doc></bitfield> <bitfield name="DX_CLIP_SPACE_DEF" high="22" low="22"> <doc>Clip space is defined as:</doc> - <use-enum ref="ENUM114" /> + <use-enum ref="CLIP_SPACE" /> </bitfield> </reg32> <reg32 name="VAP_CNTL_STATUS" access="rw" offset="0x2140"> @@ -2628,17 +2509,32 @@ <bitfield name="DATA_TYPE_0" high="3" low="0"><doc>The data type for element 0 0 = FLOAT_1 (Single IEEE Float) 1 = FLOAT_2 (2 IEEE floats) 2 = FLOAT_3 (3 IEEE Floats) 3 = FLOAT_4 (4 IEEE Floats) 4 = BYTE * (1 DWORD w 4 8-bit fixed point values) (X = [7:0], Y = [15:8], Z = [23:16], W = [31:24]) 5 = D3DCOLOR * (Same as BYTE except has X->Z,Z- >X swap for D3D color def) (Z = [7:0], Y = [15:8], X = [23:16], W = [31:24]) 6 = SHORT_2 * (1 DWORD with 2 16-bit fixed point values) (X = [15:0], Y = [31:16], Z = 0.0, W = 1.0) 7 = SHORT_4 * (2 DWORDS with 4(2 per dword) 16- bit fixed point values) (X = DW0 [15:0], Y = DW0 [31:16], Z = DW1 [15:0], W = DW1 [31:16]) 8 = VECTOR_3_TTT * (1 DWORD with 3 10-bit fixed point values) (X = [9:0], Y = [19:10], Z = [29:20], W = 1.0) 9 = VECTOR_3_EET * (1 DWORD with 2 11-bit and 1 10-bit fixed point values) (X = [10:0], Y = [21:11], Z = [31:22], W = 1.0) * These data types use the SIGNED and NORMALIZE flags described below.</doc></bitfield> <bitfield name="SKIP_DWORDS_0" high="7" low="4"><doc>The number of DWORDS to skip (discard) after processing the current element.</doc></bitfield> <bitfield name="DST_VEC_LOC_0" high="12" low="8"><doc>The vector address in the input memory to write this element</doc></bitfield> - <bitfield name="LAST_VEC_0" high="13" low="13"><doc>If set, indicates the last vector of the current vertex stream</doc></bitfield> - <bitfield name="SIGNED_0" high="14" low="14"><doc>Determines whether fixed point data types are unsigned (0) or 2's complement signed (1) data types. See NORMALIZE for complete description of affect</doc></bitfield> + <bitfield name="LAST_VEC_0" high="13" low="13"> + <doc>If set, indicates the last vector of the current vertex stream</doc> + <use-enum ref="ENABLE" /> + </bitfield> + <bitfield name="SIGNED_0" high="14" low="14"> + <doc>Determines whether fixed point data types are unsigned (0) or 2's complement signed (1) data types. See NORMALIZE for complete description of affect</doc> + <use-enum ref="ENABLE" /> + </bitfield> <bitfield name="NORMALIZE_0" high="15" low="15"> <doc>Determines whether the fixed to floating point conversion will normalize the value (i.e. fixed point value is all fractional bits) or not (i.e. fixed point value is all integer bits). This table describes the fixed to float conversion results SIGNED NORMALIZE FLT RANGE 0 0 0.0 - (2^n - 1) (i.e. 8-bit -> 0.0 - 255.0) 0 1 0.0 - 1.0 1 0 -2^(n-1) - (2^(n-1) - 1) (i.e. 8-bit -> -128.0 - 127.0) 1 1 -1.0 - 1.0 where n is the number of bits in the associated fixed point value For signed, normalize conversion, since the fixed point range is not evenly distributed around 0, there are 3 different methods supported by R300. See the VAP_PSC_SGN_NORM_CNTL description for details.</doc> - <use-enum ref="ENUM115" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="SKIP_DWORDS_1" high="23" low="20"><doc>See SKIP_DWORDS_0</doc></bitfield> <bitfield name="DST_VEC_LOC_1" high="28" low="24"><doc>See DST_VEC_LOC_0</doc></bitfield> - <bitfield name="LAST_VEC_1" high="29" low="29"><doc>See LAST_VEC_0</doc></bitfield> - <bitfield name="SIGNED_1" high="30" low="30"><doc>See SIGNED_0</doc></bitfield> - <bitfield name="NORMALIZE_1" high="31" low="31"><doc>See NORMALIZE_0</doc></bitfield> + <bitfield name="LAST_VEC_1" high="29" low="29"> + <doc>See LAST_VEC_0</doc> + <use-enum ref="ENABLE" /> + </bitfield> + <bitfield name="SIGNED_1" high="30" low="30"> + <doc>See SIGNED_0</doc> + <use-enum ref="ENABLE" /> + </bitfield> + <bitfield name="NORMALIZE_1" high="31" low="31"> + <doc>See NORMALIZE_0</doc> + <use-enum ref="ENABLE" /> + </bitfield> </reg32> </stripe> <stripe offset="0x2290" stride="0x0004" length="16"> @@ -2652,11 +2548,11 @@ <doc>Vertex Fetcher Control</doc> <bitfield name="PRIM_TYPE" high="3" low="0"> <doc>Primitive Type</doc> - <use-enum ref="ENUM117" /> + <use-enum ref="PRIM_TYPE" /> </bitfield> <bitfield name="PRIM_WALK" high="5" low="4"> <doc>Method of Passing Vertex Data.</doc> - <use-enum ref="ENUM118" /> + <use-enum ref="VERTEX_DATA_PASS_MODE" /> </bitfield> <bitfield name="INDEX_SIZE" high="11" low="11"><doc>When set, vertex indices are 32-bits/indx, otherwise, 16- bits/indx.</doc></bitfield> <bitfield name="VTX_REUSE_DIS" high="12" low="12"><doc>When set, vertex reuse is disabled. DO NOT SET unless PRIM_WALK is Indexes.</doc></bitfield> @@ -2686,14 +2582,14 @@ </reg32> <reg32 name="VAP_VTX_STATE_CNTL" access="rw" offset="0x2180"> <doc>VAP Vertex State Control Register</doc> - <bitfield name="COLOR_0_ASSEMBLY_CNTL" high="1" low="0"><use-enum ref="ENUM119" /></bitfield> - <bitfield name="COLOR_1_ASSEMBLY_CNTL" high="3" low="2"><use-enum ref="ENUM120" /></bitfield> - <bitfield name="COLOR_2_ASSEMBLY_CNTL" high="5" low="4"><use-enum ref="ENUM121" /></bitfield> - <bitfield name="COLOR_3_ASSEMBLY_CNTL" high="7" low="6"><use-enum ref="ENUM122" /></bitfield> - <bitfield name="COLOR_4_ASSEMBLY_CNTL" high="9" low="8"><use-enum ref="ENUM123" /></bitfield> - <bitfield name="COLOR_5_ASSEMBLY_CNTL" high="11" low="10"><use-enum ref="ENUM124" /></bitfield> - <bitfield name="COLOR_6_ASSEMBLY_CNTL" high="13" low="12"><use-enum ref="ENUM125" /></bitfield> - <bitfield name="COLOR_7_ASSEMBLY_CNTL" high="15" low="14"><use-enum ref="ENUM126" /></bitfield> + <bitfield name="COLOR_0_ASSEMBLY_CNTL" high="1" low="0"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_1_ASSEMBLY_CNTL" high="3" low="2"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_2_ASSEMBLY_CNTL" high="5" low="4"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_3_ASSEMBLY_CNTL" high="7" low="6"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_4_ASSEMBLY_CNTL" high="9" low="8"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_5_ASSEMBLY_CNTL" high="11" low="10"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_6_ASSEMBLY_CNTL" high="13" low="12"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_7_ASSEMBLY_CNTL" high="15" low="14"><use-enum ref="COLOR_SELECT" /></bitfield> <bitfield name="UPDATE_USER_COLOR_0_ENA" high="16" low="16"><use-enum ref="ENUM127" /></bitfield> <bitfield name="USE_ADDR_IND_TBL" high="18" low="18"> <value value="0" name="USE_VERTEX_STATE_ADDRESSES_DIRECTLY_TO_WRITE_TO_VERTEX_STATE_MEMORY"><doc>Use vertex state addresses directly to write to vertex state memory.</doc></value> @@ -2705,17 +2601,17 @@ <doc>Z Buffer Band-Width Control Bit Defa</doc> <bitfield name="HIZ_ENABLE" high="0" low="0"> <doc>Enables hierarchical Z.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> - <bitfield name="HIZ_MIN" high="1" low="1"><use-enum ref="ENUM129" /></bitfield> - <bitfield name="FAST_FILL" high="2" low="2"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="HIZ_MIN" high="1" low="1"><use-enum ref="HZ_UPDATE_VAL" /></bitfield> + <bitfield name="FAST_FILL" high="2" low="2"><use-enum ref="ENABLE" /></bitfield> <bitfield name="RD_COMP_ENABLE" high="3" low="3"> <doc>Enables reading of compressed Z data from memory to the cache.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="WR_COMP_ENABLE" high="4" low="4"> <doc>Enables writing of compressed Z data from cache to memory,</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZB_CB_CLEAR" high="5" low="5"> <doc>This bit is set when the Z buffer is used to help the CB in clearing a region. Part of the region is cleared by the color buffer and part will be cleared by the Z buffer. Since the Z buffer does not have any write masks in the cache, full micro-tiles need to be written. If a partial micro-tile is touched , then the un-touched part will be unknowns. The cache will operate in write-allocate mode and quads will be accumulated in the cache and then evicted to main memory. The color value is supplied through the ZB_DEPTHCLEARVALUE register.</doc> @@ -2727,23 +2623,23 @@ <doc>Z Buffer Control</doc> <bitfield name="STENCIL_ENABLE" high="0" low="0"> <doc>Enables stenciling.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="Z_ENABLE" high="1" low="1"> <doc>Enables Z functions.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZWRITEENABLE" high="2" low="2"> <doc>Enables writing of the Z buffer.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZSIGNED_COMPARE" high="3" low="3"> <doc>Enable signed Z buffer comparison , for W-buffering.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="STENCIL_FRONT_BACK" high="4" low="4"> <doc>When STENCIL_ENABLE is set, setting STENCIL_FRONT_BACK bit to one specifies that stencilfunc/stencilfail/stencilzpass/stencilzfail registers are used if the quad is generated from front faced primitive and stencilfunc_bf/stencilfail_bf/stencilzpass_bf/stencilzfail_bf are used if the quad is generated from a back faced primitive. If the STENCIL_FRONT_BACK is not set, then stencilfunc/stencilfail/stencilzpass/stencilzfail registers determine the operation independent of the front/back face state of the quad.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="ZB_FORMAT" access="rw" offset="0x4F10"> @@ -2784,15 +2680,15 @@ <doc>Z and Stencil Function Control</doc> <bitfield name="ZFUNC" high="2" low="0"> <doc>Specifies the Z function.</doc> - <use-enum ref="ENUM139" /> + <use-enum ref="DSCOMPARE_FUNC" /> </bitfield> <bitfield name="STENCILFUNC" high="5" low="3"> <doc>Specifies the stencil function.</doc> - <use-enum ref="ENUM140" /> + <use-enum ref="DSCOMPARE_FUNC" /> </bitfield> <bitfield name="STENCILFAIL" high="8" low="6"> <doc>Specifies the stencil value to be written if the stencil test fails.</doc> - <use-enum ref="ENUM141" /> + <use-enum ref="STENCILFAIL_VAL" /> </bitfield> <bitfield name="STENCILZPASS" high="11" low="9"><doc>Same encoding as STENCILFAIL. Specifies the stencil value to be written if the stencil test passes and the Z test passes (or is not enabled).</doc></bitfield> <bitfield name="STENCILZFAIL" high="14" low="12"><doc>Same encoding as STENCILFAIL. Specifies the stencil value to be written if the stencil test passes and the Z test fails.</doc></bitfield> @@ -2848,11 +2744,11 @@ <doc>Alternate Command Stream Queue Control</doc> <bitfield name="INDIRECT2_START" high="6" low="0"><doc>Start location of Indirect Queue #2 in the command cache. This value also sets the size in double octwords of the Indirect Queue #1 cache that will reside in locations INDIRECT1_START to (INDIRECT2_START - 1). The Indirect Queue #2 will reside in locations INDIRECT2_START to 0x5f. The minimum size of the Indirect Queues must be at least twice the MAX_FETCH size as programmed in the CP_RB_CNTL register.</doc></bitfield> <bitfield name="INDIRECT1_START" high="14" low="8"><doc>Start location of Indirect Queue #1 in the command cache. This value is also the size in double octwords of the Primary Queue cache that will reside in locations 0 to (INDIRECT1_START - 1). The minimum size of the Primary Queue cache must be at least twice the MAX_FETCH size as programmed in the CP_RB_CNTL register.</doc></bitfield> - <bitfield name="CSQ_INDIRECT2_MODE" high="26" low="26"><use-enum ref="ENUM144" /></bitfield> + <bitfield name="CSQ_INDIRECT2_MODE" high="26" low="26"><use-enum ref="CSQ_MODE" /></bitfield> <bitfield name="CSQ_INDIRECT2_ENABLE" high="27" low="27"><doc>Enables Indirect Buffer #2. If this bit is set, the CP_CSQ_MODE register overrides the operation of the CSQ_MODE variable in the CP_CSQ_CNTL register.</doc></bitfield> - <bitfield name="CSQ_INDIRECT1_MODE" high="28" low="28"><use-enum ref="ENUM144" /></bitfield> + <bitfield name="CSQ_INDIRECT1_MODE" high="28" low="28"><use-enum ref="CSQ_MODE" /></bitfield> <bitfield name="CSQ_INDIRECT1_ENABLE" high="29" low="29"><doc>Enables Indirect Buffer #1. If this bit is set, the CP_CSQ_MODE register overrides the operation of the CSQ_MODE variable in the CP_CSQ_CNTL register.</doc></bitfield> - <bitfield name="CSQ_PRIMARY_MODE" high="30" low="30"><use-enum ref="ENUM144" /></bitfield> + <bitfield name="CSQ_PRIMARY_MODE" high="30" low="30"><use-enum ref="CSQ_MODE" /></bitfield> <bitfield name="CSQ_PRIMARY_ENABLE" high="31" low="31"><doc>Enables Primary Buffer. If this bit is set, the CP_CSQ_MODE register overrides the operation of the CSQ_MODE variable in the CP_CSQ_CNTL register.</doc></bitfield> </reg32> <reg32 name="CP_CSQ_STAT" access="r" offset="0x07F8"> @@ -2984,26 +2880,26 @@ </reg32> <reg32 name="CP_VP_ADDR_CNTL" access="rw" offset="0x07E8"> <doc>Virtual vs Physical Address Control - Selects whether the address corresponds to a physical or virtual address in memory.</doc> - <bitfield name="SCRATCH_ALT_VP_WR" high="0" low="0"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="SCRATCH_VP_WR" high="1" low="1"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="RPTR_VP_UPDATE" high="2" low="2"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="VIDDMA_VP_WR" high="3" low="3"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="VIDDMA_VP_RD" high="4" low="4"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="GUIDMA_VP_WR" high="5" low="5"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="GUIDMA_VP_RD" high="6" low="6"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="INDR2_VP_FETCH" high="7" low="7"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="INDR1_VP_FETCH" high="8" low="8"><use-enum ref="ENUM146" /></bitfield> - <bitfield name="RING_VP_FETCH" high="9" low="9"><use-enum ref="ENUM146" /></bitfield> + <bitfield name="SCRATCH_ALT_VP_WR" high="0" low="0"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="SCRATCH_VP_WR" high="1" low="1"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="RPTR_VP_UPDATE" high="2" low="2"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="VIDDMA_VP_WR" high="3" low="3"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="VIDDMA_VP_RD" high="4" low="4"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="GUIDMA_VP_WR" high="5" low="5"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="GUIDMA_VP_RD" high="6" low="6"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="INDR2_VP_FETCH" high="7" low="7"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="INDR1_VP_FETCH" high="8" low="8"><use-enum ref="VP_ADDR_MODE" /></bitfield> + <bitfield name="RING_VP_FETCH" high="9" low="9"><use-enum ref="VP_ADDR_MODE" /></bitfield> </reg32> <reg32 name="RB3D_AARESOLVE_CTL" access="rw" offset="0x4E88"> <doc>Resolve Buffer Control. Unpipelined</doc> <bitfield name="AARESOLVE_MODE" high="0" low="0"> <doc>Specifies if the color buffer is in resolve mode. The cache must be empty before changing this register.</doc> - <use-enum ref="ENUM0" /> + <use-enum ref="AARESOLVE_MODE" /> </bitfield> <bitfield name="AARESOLVE_GAMMA" high="1" low="1"> <doc>Specifies the gamma and degamma to be applied to the samples before and after filtering, respectively.</doc> - <use-enum ref="ENUM1" /> + <use-enum ref="AARESOLVE_GAMMA" /> </bitfield> <bitfield name="AARESOLVE_ALPHA" high="2" low="2"> <doc>Controls whether alpha is averaged in the resolve. 0 => the resolved alpha value is selected from the sample 0 value. 1=> the resolved alpha value is a filtered (average) result of of the samples.</doc> @@ -3015,15 +2911,15 @@ <doc>Alpha Blend Control for Color Channels. Pipelined through the blender.</doc> <bitfield name="ALPHA_BLEND_ENABLE" high="0" low="0"> <doc>Allow alpha blending with the destination.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="SEPARATE_ALPHA_ENABLE" high="1" low="1"> <doc>Enables use of RB3D_ABLENDCNTL</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="READ_ENABLE" high="2" low="2"> <doc>When blending is enabled, this enables memory reads. Memory reads will still occur when this is disabled if they are for reasons not related to blending.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="DISCARD_SRC_PIXELS" high="5" low="3"> <doc>Discard pixels when blending is enabled based on the src color.</doc> @@ -3041,19 +2937,19 @@ </bitfield> <bitfield name="SRCBLEND" high="21" low="16"> <doc>Source Blend Function , Alpha blending function (SRC).</doc> - <use-enum ref="ENUM3" /> + <use-enum ref="BLEND_FUNC_SRC" /> </bitfield> <bitfield name="DESTBLEND" high="29" low="24"> <doc>Destination Blend Function , Alpha blending function (DST).</doc> - <use-enum ref="ENUM4" /> + <use-enum ref="BLEND_FUNC_DEST" /> </bitfield> <bitfield name="SRC_ALPHA_0_NO_READ" high="30" low="30"> <doc>Enables source alpha zero performance optimization to skip reads.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="SRC_ALPHA_1_NO_READ" high="31" low="31"> <doc>Enables source alpha one performance optimization to skip reads.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD" access="rw" offset="0x4EA4"> @@ -3072,26 +2968,23 @@ </reg32> <reg32 name="RB3D_CCTL" access="rw" offset="0x4E00"> <doc>Unpipelined.</doc> - <bitfield name="NUM_MULTIWRITES" high="6" low="5"> - <doc>A quad is replicated and written to this many buffers.</doc> - <use-enum ref="ENUM7" /> - </bitfield> + <bitfield name="NUM_MULTIWRITES" high="6" low="5"><doc>A quad is replicated and written to this many + 1 buffers. 0 (1 buffer) is the only mode where the cb processes the end of packet command.</doc></bitfield> <bitfield name="CLRCMP_FLIPE_ENABLE" high="7" low="7"> <doc>Enables equivalent of rage128 CMP_EQ_FLIP color compare mode. This is used to ensure 3D data does not get chromakeyed away by logic in the backend.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="AA_COMPRESSION_ENABLE" high="9" low="9"> <doc>Enables AA color compression. Cmask must also be enabled when aa compression is enabled. The cache must be empty before this is changed.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="CMASK_ENABLE" high="10" low="10"> <doc>Enables use of the cmask ram. The cache must be empty before this is changed.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="Reserved" high="11" low="11"><doc>Set to 0</doc></bitfield> <bitfield name="INDEPENDENT_COLOR_CHANNEL_MASK_ENABLE" high="12" low="12"> <doc>Enables indepedent color channel masks for the MRTs. Disabling this feature will cause all the MRTs to use color channel mask 0.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="WRITE_COMPRESSION_DISABLE" high="13" low="13"> <doc>Disables write compression.</doc> @@ -3100,7 +2993,7 @@ </bitfield> <bitfield name="INDEPENDENT_COLORFORMAT_ENABLE" high="14" low="14"> <doc>Enables independent color format for the MRTs. Disabling this feature will cause all the MRTs to use color format 0.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <stripe offset="0x4E38" stride="0x0004" length="4"> @@ -3109,15 +3002,15 @@ <bitfield name="COLORPITCH" high="13" low="1"><doc>3D destination pitch in multiples of 2-pixels.</doc></bitfield> <bitfield name="COLORTILE" high="16" low="16"> <doc>Denotes whether the 3D destination is in macrotiled format.</doc> - <use-enum ref="ENUM8" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="COLORMICROTILE" high="18" low="17"> <doc>Denotes whether the 3D destination is in microtiled format.</doc> - <use-enum ref="ENUM9" /> + <use-enum ref="MICROTILE" /> </bitfield> <bitfield name="COLORENDIAN" high="20" low="19"> <doc>Specifies endian control for the color buffer.</doc> - <use-enum ref="ENUM10" /> + <use-enum ref="BYTESWAP" /> </bitfield> <bitfield name="COLORFORMAT" high="24" low="21"> <doc>3D destination color format.</doc> @@ -3143,67 +3036,67 @@ <doc>3D Color Channel Mask. If all the channels used in the current color format are disabled, then the cb will discard all the incoming quads. Pipelined through the blender.</doc> <bitfield name="BLUE_MASK" high="0" low="0"> <doc>mask bit for the blue channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="GREEN_MASK" high="1" low="1"> <doc>mask bit for the green channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="RED_MASK" high="2" low="2"> <doc>mask bit for the red channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ALPHA_MASK" high="3" low="3"> <doc>mask bit for the alpha channel</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="BLUE_MASK1" high="4" low="4"> <doc>mask bit for the blue channel of MRT 1</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="GREEN_MASK1" high="5" low="5"> <doc>mask bit for the green channel of MRT 1</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="RED_MASK1" high="6" low="6"> <doc>mask bit for the red channel of MRT 1</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ALPHA_MASK1" high="7" low="7"> <doc>mask bit for the alpha channel of MRT 1</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="BLUE_MASK2" high="8" low="8"> <doc>mask bit for the blue channel of MRT 2</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="GREEN_MASK2" high="9" low="9"> <doc>mask bit for the green channel of MRT 2</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="RED_MASK2" high="10" low="10"> <doc>mask bit for the red channel of MRT 2</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ALPHA_MASK2" high="11" low="11"> <doc>mask bit for the alpha channel of MRT 2</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="BLUE_MASK3" high="12" low="12"> <doc>mask bit for the blue channel of MRT 3</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="GREEN_MASK3" high="13" low="13"> <doc>mask bit for the green channel of MRT 3</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="RED_MASK3" high="14" low="14"> <doc>mask bit for the red channel of MRT 3</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ALPHA_MASK3" high="15" low="15"> <doc>mask bit for the alpha channel of MRT 3</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="RB3D_COLOR_CLEAR_VALUE" access="rw" offset="0x4E14"> @@ -3252,11 +3145,11 @@ <bitfield name="AF_VAL" high="7" low="0"><doc>Specifies the 8-bit alpha compare value when AF_EN_8BIT is enabled</doc></bitfield> <bitfield name="AF_FUNC" high="10" low="8"> <doc>Specifies the alpha compare function.</doc> - <use-enum ref="ENUM16" /> + <use-enum ref="ALPHACOMPARE_FUNC" /> </bitfield> <bitfield name="AF_EN" high="11" low="11"> <doc>Enables/Disables alpha compare function.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="AF_EN_8BIT" high="12" low="12"> <doc>Enable 8-bit alpha compare function.</doc> @@ -3265,19 +3158,19 @@ </bitfield> <bitfield name="AM_EN" high="16" low="16"> <doc>Enables/Disables alpha-to-mask function.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="AM_CFG" high="17" low="17"> <doc>Specfies number of sub-pixel samples for alpha-to-mask function.</doc> - <use-enum ref="ENUM17" /> + <use-enum ref="ALPHA_SUBPIXEL_SAMPLES" /> </bitfield> <bitfield name="DITH_EN" high="20" low="20"> <doc>Enables/Disables RGB Dithering (Not supported in R520)</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ALP_OFF_EN" high="24" low="24"> <doc>Alpha offset enable/disable (Not supported in R520)</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="DISCARD_ZERO_MASK_QUAD" high="25" low="25"> <doc>Enable/Disable discard zero mask coverage quad to ZB</doc> @@ -3314,47 +3207,47 @@ <doc>Specifies color properties and mappings of textures.</doc> <bitfield name="TEX0_SHADING_PS3" high="1" low="0"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX1_SHADING_PS3" high="3" low="2"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX2_SHADING_PS3" high="5" low="4"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX3_SHADING_PS3" high="7" low="6"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX4_SHADING_PS3" high="9" low="8"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX5_SHADING_PS3" high="11" low="10"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX6_SHADING_PS3" high="13" low="12"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX7_SHADING_PS3" high="15" low="14"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX8_SHADING_PS3" high="17" low="16"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX9_SHADING_PS3" high="19" low="18"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for each texture.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="TEX10_SHADING_PS3" high="21" low="20"> <doc>Specifies undefined(0), flat(1) and Gouraud(2/def) shading for tex10 components.</doc> - <use-enum ref="ENUM20" /> + <use-enum ref="SHADING" /> </bitfield> <bitfield name="COLOR0_TEX_OVERRIDE" high="25" low="22"> <doc>Specifies if each color should come from a texture and which one.</doc> @@ -3368,12 +3261,12 @@ <reg32 name="GA_ENHANCE" access="rw" offset="0x4274"> <doc>GA Enhancement Register</doc> <bitfield name="DEADLOCK_CNTL" high="0" low="0"> - <doc>TCL/GA Deadlock control.</doc> - <use-enum ref="ENUM22" /> + <doc>TCL/GA Deadlock control. Prevents TCL interface from deadlocking on GA side.</doc> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="FASTSYNC_CNTL" high="1" low="1"> <doc>Enables Fast register/primitive switching</doc> - <use-enum ref="ENUM23" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="REG_READWRITE" high="2" low="2"> <doc>R520+: When set, GA supports simultaneous register reads & writes</doc> @@ -3438,7 +3331,7 @@ <bitfield name="WIDTH" high="15" low="0"><doc>1/2 width of line, in subpixels (1/12 or 1/16 only, even in 8b subprecision); (16.0) fixed format.</doc></bitfield> <bitfield name="END_TYPE" high="17" low="16"> <doc>Specifies how ends of lines should be drawn.</doc> - <use-enum ref="ENUM24" /> + <use-enum ref="LINE_END" /> </bitfield> <bitfield name="SORT" high="18" low="18"> <doc>R520+: When enabled, all lines are sorted so that V0 is vertex with smallest X, or if X equal, smallest Y.</doc> @@ -3463,11 +3356,11 @@ <doc>Specifies the rouding mode for geometry & color SPFP to FP conversions.</doc> <bitfield name="GEOMETRY_ROUND" high="1" low="0"> <doc>Trunc (0) or round to nearest (1) for geometry (XY).</doc> - <use-enum ref="ENUM28" /> + <use-enum ref="ROUNDING_MODE" /> </bitfield> <bitfield name="COLOR_ROUND" high="3" low="2"> <doc>When set, FP32 to FP20 using round to nearest; otherwise trunc</doc> - <use-enum ref="ENUM28" /> + <use-enum ref="ROUNDING_MODE" /> </bitfield> <bitfield name="RGB_CLAMP" high="4" low="4"> <doc>Specifies SPFP color clamp range of [0,1] or FP20 for RGB.</doc> @@ -3511,19 +3404,19 @@ <doc>Specifies top of Raster pipe specific enable controls.</doc> <bitfield name="POINT_STUFF_ENABLE" high="0" low="0"> <doc>Specifies if points will have stuffed texture coordinates.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="LINE_STUFF_ENABLE" high="1" low="1"> <doc>Specifies if lines will have stuffed texture coordinates.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TRIANGLE_STUFF_ENABLE" high="2" low="2"> <doc>Specifies if triangles will have stuffed texture coordinates.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="STENCIL_AUTO" high="5" low="4"> <doc>Specifies if the auto dec/inc stencil mode should be enabled, and how.</doc> - <use-enum ref="ENUM32" /> + <use-enum ref="STENCIL_AUTO_MODE" /> </bitfield> <bitfield name="TEX0_SOURCE" high="17" low="16"> <doc>Specifies the sources of the texture coordinates for each texture.</doc> @@ -3562,35 +3455,35 @@ <doc>Specifies the sizes of the various FIFO's in the sc/rs/us. This register must be the first one written</doc> <bitfield name="SC_IFIFO_SIZE" high="1" low="0"> <doc>Size of scan converter input FIFO (XYZ)</doc> - <use-enum ref="ENUM41" /> + <use-enum ref="WORDSIZE_32" /> </bitfield> <bitfield name="SC_TZFIFO_SIZE" high="3" low="2"> <doc>Size of scan converter top-of-pipe Z FIFO</doc> - <use-enum ref="ENUM42" /> + <use-enum ref="WORDSIZE_16" /> </bitfield> <bitfield name="SC_BFIFO_SIZE" high="5" low="4"> <doc>Size of scan converter input FIFO (B)</doc> - <use-enum ref="ENUM41" /> + <use-enum ref="WORDSIZE_32" /> </bitfield> <bitfield name="RS_TFIFO_SIZE" high="7" low="6"> <doc>Size of ras input FIFO (Texture)</doc> - <use-enum ref="ENUM43" /> + <use-enum ref="WORDSIZE_64" /> </bitfield> <bitfield name="RS_CFIFO_SIZE" high="9" low="8"> <doc>Size of ras input FIFO (Color)</doc> - <use-enum ref="ENUM43" /> + <use-enum ref="WORDSIZE_64" /> </bitfield> <bitfield name="US_RAM_SIZE" high="11" low="10"> <doc>Size of us RAM</doc> - <use-enum ref="ENUM43" /> + <use-enum ref="WORDSIZE_64" /> </bitfield> <bitfield name="US_OFIFO_SIZE" high="13" low="12"> <doc>Size of us output FIFO (RGBA)</doc> - <use-enum ref="ENUM42" /> + <use-enum ref="WORDSIZE_16" /> </bitfield> <bitfield name="US_WFIFO_SIZE" high="15" low="14"> <doc>Size of us output FIFO (W)</doc> - <use-enum ref="ENUM42" /> + <use-enum ref="WORDSIZE_16" /> </bitfield> <bitfield name="RS_HIGHWATER_COL" high="18" low="16"><doc>High water mark for RS colors' fifo -- NOT USED</doc></bitfield> <bitfield name="RS_HIGHWATER_TEX" high="21" low="19"><doc>High water mark for RS textures' fifo -- NOT USED</doc></bitfield> @@ -3674,7 +3567,7 @@ </bitfield> <bitfield name="FOG_STUFF_ENABLE" high="5" low="5"> <doc>Controls enabling of fog stuffing into texture coordinate.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="FOG_STUFF_TEX" high="9" low="6"><doc>Controls which texture gets fog value</doc></bitfield> <bitfield name="FOG_STUFF_COMP" high="11" low="10"><doc>Controls which component of texture gets fog value</doc></bitfield> @@ -3683,7 +3576,7 @@ <doc>Specifies the graphics pipeline configuration for rasterization</doc> <bitfield name="ENABLE" high="0" low="0"> <doc>Enables tiling, otherwise all tiles receive all polygons.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="PIPE_COUNT" high="3" low="1"> <doc>Specifies the number of active pipes and contexts (up to 4 pipes, 1 ctx). When this field is written, it is automatically reduced by hardware so as not to use more pipes than the number indicated in GB_PIPE_SELECT.MAX_PIPES or the number of pipes left unmasked GB_PIPE_SELECT.BAD_PIPES. The potentially altered value is read back, rather than the original value written by software.</doc> @@ -3708,7 +3601,7 @@ </bitfield> <bitfield name="SUBPIXEL" high="16" low="16"> <doc>Specifies the precision of subpixels wrt pixels (12 or 16).</doc> - <use-enum ref="ENUM52" /> + <use-enum ref="SUBPIXEL_PRECISION" /> </bitfield> <bitfield name="QUADS_PER_RAS" high="18" low="17"> <doc>Specifies the number of quads to be sent to each rasterizer in turn when in RV300B or R300B mode</doc> @@ -3765,7 +3658,7 @@ <bitfield name="TEX_ID" high="3" low="0"><doc>Specifies the index (into the RS_IP table) of the texture address output during this rasterizer instruction</doc></bitfield> <bitfield name="TEX_CN" high="4" low="4"> <doc>Write enable for texture address</doc> - <use-enum ref="ENUM53" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_ADDR" high="11" low="5"><doc>Specifies the destination address (within the current pixel stack frame) of the texture address output during this rasterizer instruction</doc></bitfield> <bitfield name="COL_ID" high="15" low="12"><doc>Specifies the index (into the RS_IP table) of the color output during this rasterizer instruction</doc></bitfield> @@ -3779,7 +3672,7 @@ <bitfield name="COL_ADDR" high="24" low="18"><doc>Specifies the destination address (within the current pixel stack frame) of the color output during this rasterizer instruction</doc></bitfield> <bitfield name="TEX_ADJ" high="25" low="25"> <doc>Specifies whether to sample texture coordinates at the real or adjusted pixel centers</doc> - <use-enum ref="ENUM55" /> + <use-enum ref="PIXEL_CENTER" /> </bitfield> <bitfield name="W_CN" high="26" low="26"> <doc>Specifies that the rasterizer should output w</doc> @@ -3853,166 +3746,166 @@ <doc>Enables for Cylindrical Wrapping</doc> <bitfield name="T0C0" high="0" low="0"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T0C1" high="1" low="1"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T0C2" high="2" low="2"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T0C3" high="3" low="3"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T1C0" high="4" low="4"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T1C1" high="5" low="5"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T1C2" high="6" low="6"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T1C3" high="7" low="7"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T2C0" high="8" low="8"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T2C1" high="9" low="9"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T2C2" high="10" low="10"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T2C3" high="11" low="11"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T3C0" high="12" low="12"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T3C1" high="13" low="13"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T3C2" high="14" low="14"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T3C3" high="15" low="15"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T4C0" high="16" low="16"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T4C1" high="17" low="17"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T4C2" high="18" low="18"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T4C3" high="19" low="19"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T5C0" high="20" low="20"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T5C1" high="21" low="21"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T5C2" high="22" low="22"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T5C3" high="23" low="23"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T6C0" high="24" low="24"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T6C1" high="25" low="25"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T6C2" high="26" low="26"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T6C3" high="27" low="27"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T7C0" high="28" low="28"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T7C1" high="29" low="29"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T7C2" high="30" low="30"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T7C3" high="31" low="31"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <reg32 name="SU_TEX_WRAP_PS3" access="rw" offset="0x4114"> <doc>Specifies texture wrapping for new PS3 textures.</doc> <bitfield name="T9C0" high="0" low="0"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T9C1" high="1" low="1"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T9C2" high="2" low="2"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T9C3" high="3" low="3"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T8C0" high="4" low="4"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T8C1" high="5" low="5"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T8C2" high="6" low="6"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="T8C3" high="7" low="7"> <doc>tNcM -- Enable texture wrapping on component M (S,T,R,Q) of texture N.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <stripe offset="0x45C0" stride="0x0004" length="16"> @@ -4029,67 +3922,67 @@ <doc>Texture Enables for Maps 0 to 15</doc> <bitfield name="TEX_0_ENABLE" high="0" low="0"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_1_ENABLE" high="1" low="1"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_2_ENABLE" high="2" low="2"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_3_ENABLE" high="3" low="3"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_4_ENABLE" high="4" low="4"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_5_ENABLE" high="5" low="5"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_6_ENABLE" high="6" low="6"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_7_ENABLE" high="7" low="7"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_8_ENABLE" high="8" low="8"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_9_ENABLE" high="9" low="9"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_10_ENABLE" high="10" low="10"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_11_ENABLE" high="11" low="11"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_12_ENABLE" high="12" low="12"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_13_ENABLE" high="13" low="13"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_14_ENABLE" high="14" low="14"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TEX_15_ENABLE" high="15" low="15"> <doc>Texture Map Enables.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> <stripe offset="0x4400" stride="0x0004" length="16"> @@ -4097,15 +3990,15 @@ <doc>Texture Filter State</doc> <bitfield name="CLAMP_S" high="2" low="0"> <doc>Clamp mode for texture coordinates</doc> - <use-enum ref="ENUM69" /> + <use-enum ref="TX_FILTER_CLAMP" /> </bitfield> <bitfield name="CLAMP_T" high="5" low="3"> <doc>Clamp mode for texture coordinates</doc> - <use-enum ref="ENUM69" /> + <use-enum ref="TX_FILTER_CLAMP" /> </bitfield> <bitfield name="CLAMP_R" high="8" low="6"> <doc>Clamp mode for texture coordinates</doc> - <use-enum ref="ENUM69" /> + <use-enum ref="TX_FILTER_CLAMP" /> </bitfield> <bitfield name="MAG_FILTER" high="10" low="9"> <doc>Filter used when texture is magnified</doc> @@ -4117,11 +4010,11 @@ </bitfield> <bitfield name="MIP_FILTER" high="14" low="13"> <doc>Filter used between mipmap levels</doc> - <use-enum ref="ENUM71" /> + <use-enum ref="TX_FILTER" /> </bitfield> <bitfield name="VOL_FILTER" high="16" low="15"> - <doc>Filter used between layers of a volume</doc> - <use-enum ref="ENUM72" /> + <doc>Filter used between layers of a volume. (if no filter is specifed, select from MIN/MAG filters)</doc> + <use-enum ref="TX_FILTER" /> </bitfield> <bitfield name="MAX_MIP_LEVEL" high="20" low="17"><doc>LOD index of largest (finest) mipmap to use (0 is largest). Ranges from 0 to NUM_LEVELS.</doc></bitfield> <bitfield name="ID" high="31" low="28"><doc>Logical id for this physical texture</doc></bitfield> @@ -4132,16 +4025,16 @@ <doc>Texture Filter State</doc> <bitfield name="CHROMA_KEY_MODE" high="1" low="0"> <doc>Chroma Key Mode</doc> - <use-enum ref="ENUM73" /> + <use-enum ref="CHROMA_KEY" /> </bitfield> <bitfield name="MC_ROUND" high="2" low="2"> <doc>Bilinear rounding mode</doc> - <use-enum ref="ENUM74" /> + <use-enum ref="BILINEAR_ROUNDING" /> </bitfield> <bitfield name="LOD_BIAS" high="12" low="3"><doc>(s4.5). Ranges from -16.0 to 15.99. Mipmap LOD bias measured in mipmap levels. Added to the signed, computed LOD before the LOD is clamped.</doc></bitfield> <bitfield name="MC_COORD_TRUNCATE" high="14" low="14"> <doc>MPEG coordinate truncation mode</doc> - <use-enum ref="ENUM75" /> + <use-enum ref="MPEG_TRUNC_MODE" /> </bitfield> <bitfield name="TRI_PERF" high="16" low="15"> <doc>Apply slope and bias to trilerp fraction to reduce the number of 2-level fetches for trilinear. Should only be used if MIP_FILTER is LINEAR.</doc> @@ -4190,11 +4083,11 @@ <bitfield name="NUM_LEVELS" high="29" low="26"><doc>Number of mipmap levels minus 1. Ranges from 0 to 12. Equivalent to LOD index of smallest (coarsest) mipmap to use.</doc></bitfield> <bitfield name="PROJECTED" high="30" low="30"> <doc>Specifies whether texture coords are projected.</doc> - <use-enum ref="ENUM76" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="TXPITCH_EN" high="31" low="31"> <doc>Indicates when TXPITCH should be used instead of TXWIDTH for image addressing</doc> - <use-enum ref="ENUM77" /> + <use-enum ref="TXWIDTH_OR_PITCH" /> </bitfield> </reg32> </stripe> @@ -4267,16 +4160,16 @@ </bitfield> <bitfield name="GAMMA" high="21" low="21"> <doc>Optionally remove gamma from texture before passing to shader. Only apply to 8bit or less components.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="YUV_TO_RGB" high="23" low="22"> <doc>YUV to RGB conversion mode</doc> - <use-enum ref="ENUM87" /> + <use-enum ref="YUV_TO_RGB_MODE" /> </bitfield> - <bitfield name="SWAP_YUV" high="24" low="24"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="SWAP_YUV" high="24" low="24"><use-enum ref="ENABLE" /></bitfield> <bitfield name="TEX_COORD_TYPE" high="26" low="25"> <doc>Specifies coordinate type.</doc> - <use-enum ref="ENUM88" /> + <use-enum ref="COORD_TYPE" /> </bitfield> <bitfield name="CACHE" high="31" low="27"> <doc>This field is ignored on R520 and RV510.</doc> @@ -4313,15 +4206,15 @@ <doc>Texture Offset State</doc> <bitfield name="ENDIAN_SWAP" high="1" low="0"> <doc>Endian Control</doc> - <use-enum ref="ENUM90" /> + <use-enum ref="BYTESWAP" /> </bitfield> <bitfield name="MACRO_TILE" high="2" low="2"> <doc>Macro Tile Control</doc> - <use-enum ref="ENUM91" /> + <use-enum ref="MACROTILE" /> </bitfield> <bitfield name="MICRO_TILE" high="4" low="3"> <doc>Micro Tile Control</doc> - <use-enum ref="ENUM92" /> + <use-enum ref="MICROTILE" /> </bitfield> <bitfield name="TXOFFSET" high="31" low="5"><doc>32-byte aligned pointer to base map</doc></bitfield> </reg32> @@ -4362,7 +4255,7 @@ </bitfield> <bitfield name="ALPHA_MOD_A" high="18" low="17"> <doc>Specifies the input modifiers for Alpha inputs A and B.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="ALPHA_SEL_B" high="20" low="19"> <doc>Specifies the operands for Alpha inputs A and B.</doc> @@ -4374,7 +4267,7 @@ </bitfield> <bitfield name="ALPHA_MOD_B" high="25" low="24"> <doc>Specifies the input modifiers for Alpha inputs A and B.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="OMOD" high="28" low="26"> <doc>Specifies the output modifier for this instruction.</doc> @@ -4468,7 +4361,7 @@ </bitfield> <bitfield name="RGB_MOD_C" high="24" low="23"> <doc>Specifies the input modifiers for RGB and Alpha input C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="ALPHA_SEL_C" high="26" low="25"> <doc>Specifies the operands for RGB and Alpha input C.</doc> @@ -4480,7 +4373,7 @@ </bitfield> <bitfield name="ALPHA_MOD_C" high="31" low="30"> <doc>Specifies the input modifiers for RGB and Alpha input C.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> </reg32> </stripe> @@ -4505,7 +4398,7 @@ </bitfield> <bitfield name="RGB_MOD_A" high="12" low="11"> <doc>Specifies the input modifiers for RGB inputs A and B.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="RGB_SEL_B" high="14" low="13"> <doc>Specifies the operands for RGB inputs A and B.</doc> @@ -4525,7 +4418,7 @@ </bitfield> <bitfield name="RGB_MOD_B" high="25" low="24"> <doc>Specifies the input modifiers for RGB inputs A and B.</doc> - <use-enum ref="ENUM98" /> + <use-enum ref="ALU_INPUT_MOD" /> </bitfield> <bitfield name="OMOD" high="28" low="26"> <doc>Specifies the output modifier for this instruction.</doc> @@ -4646,11 +4539,11 @@ </bitfield> <bitfield name="RGB_CLAMP" high="19" low="19"> <doc>Specifies RGB and Alpha clamp mode for this instruction.</doc> - <use-enum ref="ENUM102" /> + <use-enum ref="CLAMP_MODE" /> </bitfield> <bitfield name="ALPHA_CLAMP" high="20" low="20"> <doc>Specifies RGB and Alpha clamp mode for this instruction.</doc> - <use-enum ref="ENUM102" /> + <use-enum ref="CLAMP_MODE" /> </bitfield> <bitfield name="ALU_RESULT_SEL" high="21" low="21"> <doc>Specifies which component of the result of this instruction should be used as the 'ALU result' by a subsequent flow control instruction.</doc> @@ -4802,11 +4695,11 @@ </stripe> <stripe offset="0x46A4" stride="0x0004" length="4"> <reg32 name="US_OUT_FMT" access="rw" offset="0x0000"> - <bitfield name="OUT_FMT" high="4" low="0"><use-enum ref="ENUM109" /></bitfield> - <bitfield name="C0_SEL" high="9" low="8"><use-enum ref="ENUM110" /></bitfield> - <bitfield name="C1_SEL" high="11" low="10"><use-enum ref="ENUM110" /></bitfield> - <bitfield name="C2_SEL" high="13" low="12"><use-enum ref="ENUM110" /></bitfield> - <bitfield name="C3_SEL" high="15" low="14"><use-enum ref="ENUM110" /></bitfield> + <bitfield name="OUT_FMT" high="4" low="0"><use-enum ref="COLOR_FORMAT" /></bitfield> + <bitfield name="C0_SEL" high="9" low="8"><use-enum ref="CHANNEL" /></bitfield> + <bitfield name="C1_SEL" high="11" low="10"><use-enum ref="CHANNEL" /></bitfield> + <bitfield name="C2_SEL" high="13" low="12"><use-enum ref="CHANNEL" /></bitfield> + <bitfield name="C3_SEL" high="15" low="14"><use-enum ref="CHANNEL" /></bitfield> <bitfield name="ROUND_ADJ" high="20" low="20"> <value value="0" name="NORMAL_ROUNDING"><doc>Normal rounding</doc></value> <value value="1" name="MODIFIED_ROUNDING_OF_FIXED"><doc>Modified rounding of fixed-point data</doc></value> @@ -4965,7 +4858,7 @@ </bitfield> <bitfield name="W_SRC" high="2" low="2"> <doc>Source for W</doc> - <use-enum ref="ENUM113" /> + <use-enum ref="WSRC" /> </bitfield> </reg32> <reg32 name="VAP_ALT_NUM_VERTICES" access="rw" offset="0x2088"> @@ -4996,7 +4889,7 @@ <bitfield name="VF_MAX_VTX_NUM" high="21" low="18"><doc>This field controls the number of vertices that the vertex fetcher manages for the TCL and Setup Vertex Storage memories (and therefore the number of vertices that can be re-used). This value should be set to 12 for most operation, This number may be modified for performance evaluation. The value is the maximum vertex number used which is one less than the number of vertices (i.e. a 12 means 13 vertices will be used)</doc></bitfield> <bitfield name="DX_CLIP_SPACE_DEF" high="22" low="22"> <doc>Clip space is defined as:</doc> - <use-enum ref="ENUM114" /> + <use-enum ref="CLIP_SPACE" /> </bitfield> <bitfield name="TCL_STATE_OPTIMIZATION" high="23" low="23"><doc>If set, enables the TCL state optimization, and the new state is used only if there is a change in TCL state, between VF_CNTL (triggers)</doc></bitfield> </reg32> @@ -5025,44 +4918,47 @@ <bitfield name="DATA_TYPE_0" high="3" low="0"><doc>The data type for element 0 0 = FLOAT_1 (Single IEEE Float) 1 = FLOAT_2 (2 IEEE floats) 2 = FLOAT_3 (3 IEEE Floats) 3 = FLOAT_4 (4 IEEE Floats) 4 = BYTE * (1 DWORD w 4 8-bit fixed point values) (X = [7:0], Y = [15:8], Z = [23:16], W = [31:24]) 5 = D3DCOLOR * (Same as BYTE except has X->Z,Z- >X swap for D3D color def) (Z = [7:0], Y = [15:8], X = [23:16], W = [31:24]) 6 = SHORT_2 * (1 DWORD with 2 16-bit fixed point values) (X = [15:0], Y = [31:16], Z = 0.0, W = 1.0) 7 = SHORT_4 * (2 DWORDS with 4(2 per dword) 16- bit fixed point values) (X = DW0 [15:0], Y = DW0 [31:16], Z = DW1 [15:0], W = DW1 [31:16]) 8 = VECTOR_3_TTT * (1 DWORD with 3 10-bit fixed point values) (X = [9:0], Y = [19:10], Z = [29:20], W = 1.0) 9 = VECTOR_3_EET * (1 DWORD with 2 11-bit and 1 10-bit fixed point values) (X = [10:0], Y = [21:11], Z = [31:22], W = 1.0) 10 = FLOAT_8 (8 IEEE Floats) Sames as 2 FLOAT_4 but must use consecutive DST_VEC_LOC. Used to allow > 16 PSC for OGL path. 11 = FLT16_2 (1 DWORD with 2 16-bit floating point values (SE5M10 exp bias of 15, supports denormalized numbers)) (X = [15:0], Y = [31:16], Z = 0.0, W = 1.0) 12 = FLT16_4 (2 DWORDS with 4(2 per dword) 16-bit floating point values (SE5M10 exp bias of 15, supports denormalized numbers))) (X = DW0 [15:0], Y = DW0 [31:16], Z = DW1 [15:0], W = DW1 [31:16]) * These data types use the SIGNED and NORMALIZE flags described below.</doc></bitfield> <bitfield name="SKIP_DWORDS_0" high="7" low="4"><doc>The number of DWORDS to skip (discard) after processing the current element.</doc></bitfield> <bitfield name="DST_VEC_LOC_0" high="12" low="8"><doc>The vector address in the input memory to write this element</doc></bitfield> - <bitfield name="LAST_VEC_0" high="13" low="13"><doc>If set, indicates the last vector of the current vertex stream</doc></bitfield> - <bitfield name="SIGNED_0" high="14" low="14"><doc>Determines whether fixed point data types are unsigned (0) or 2's complement signed (1) data types. See NORMALIZE for complete description of affect</doc></bitfield> + <bitfield name="LAST_VEC_0" high="13" low="13"> + <doc>If set, indicates the last vector of the current vertex stream</doc> + <use-enum ref="ENABLE" /> + </bitfield> + <bitfield name="SIGNED_0" high="14" low="14"> + <doc>Determines whether fixed point data types are unsigned (0) or 2's complement signed (1) data types. See NORMALIZE for complete description of affect</doc> + <use-enum ref="ENABLE" /> + </bitfield> <bitfield name="NORMALIZE_0" high="15" low="15"> <doc>Determines whether the fixed to floating point conversion will normalize the value (i.e. fixed point value is all fractional bits) or not (i.e. fixed point value is all integer bits). This table describes the fixed to float conversion results SIGNED NORMALIZE FLT RANGE 0 0 0.0 - (2^n - 1) (i.e. 8-bit -> 0.0 - 255.0) 0 1 0.0 - 1.0 1 0 -2^(n-1) - (2^(n-1) - 1) (i.e. 8-bit -> -128.0 - 127.0) 1 1 -1.0 - 1.0 where n is the number of bits in the associated fixed point value For signed, normalize conversion, since the fixed point range is not evenly distributed around 0, there are 3 different methods supported by R300. See the VAP_PSC_SGN_NORM_CNTL description for details.</doc> - <use-enum ref="ENUM115" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="DATA_TYPE_1" high="19" low="16"><doc>Similar to DATA_TYPE_0</doc></bitfield> <bitfield name="SKIP_DWORDS_1" high="23" low="20"><doc>See SKIP_DWORDS_0</doc></bitfield> <bitfield name="DST_VEC_LOC_1" high="28" low="24"><doc>See DST_VEC_LOC_0</doc></bitfield> - <bitfield name="LAST_VEC_1" high="29" low="29"><doc>See LAST_VEC_0</doc></bitfield> - <bitfield name="SIGNED_1" high="30" low="30"><doc>See SIGNED_0</doc></bitfield> - <bitfield name="NORMALIZE_1" high="31" low="31"><doc>See NORMALIZE_0</doc></bitfield> + <bitfield name="LAST_VEC_1" high="29" low="29"> + <use-enum ref="ENABLE" /> + <doc>See LAST_VEC_0</doc> + </bitfield> + <bitfield name="SIGNED_1" high="30" low="30"> + <use-enum ref="ENABLE" /> + <doc>See SIGNED_0</doc> + </bitfield> + <bitfield name="NORMALIZE_1" high="31" low="31"> + <use-enum ref="ENABLE" /> + <doc>See NORMALIZE_0</doc> + </bitfield> </reg32> </stripe> <stripe offset="0x2500" stride="0x0008" length="16"> <reg32 name="VAP_PVS_FLOW_CNTL_ADDRS_LW" access="rw" offset="0x0000"> <doc>For VS3.0 - To support more PVS instructions, increase the address range - Programmable Vertex Shader Flow Control Lower Word Addresses Register 0</doc> - <bitfield name="PVS_FC_ACT_ADRS_0" high="15" low="0"> - <doc>This field defines the last PVS instruction to execute prior to the control flow redirection. JUMP - The last instruction executed prior to the jump LOOP - The last instruction executed prior to the loop (init loop counter/inc) JSR - The last instruction executed prior to the jump to the subroutine. (Addrss_Range:1K=[9:0];512=[8:0];256=[7:0])</doc> - <use-enum ref="ENUM244" /> - </bitfield> - <bitfield name="PVS_FC_LOOP_CNT_JMP_INST_0" high="31" low="16"> - <doc>This field has multiple definitions as follows: JUMP - The instruction address to jump to. LOOP - The loop count. *Note loop count of 0 must be replaced by a jump. JSR - The instruction address to jump to (first inst of subroutine). (Addrss_Range:1K=[24:15];512=[23:15];256=[22:15])</doc> - <use-enum ref="ENUM245" /> - </bitfield> + <bitfield name="PVS_FC_ACT_ADRS_0" high="15" low="0"><doc>This field defines the last PVS instruction to execute prior to the control flow redirection. JUMP - The last instruction executed prior to the jump LOOP - The last instruction executed prior to the loop (init loop counter/inc) JSR - The last instruction executed prior to the jump to the subroutine. (Addrss_Range:1K=[9:0];512=[8:0];256=[7:0])</doc></bitfield> + <bitfield name="PVS_FC_LOOP_CNT_JMP_INST_0" high="31" low="16"><doc>This field has multiple definitions as follows: JUMP - The instruction address to jump to. LOOP - The loop count. *Note loop count of 0 must be replaced by a jump. JSR - The instruction address to jump to (first inst of subroutine). (Addrss_Range:1K=[24:15];512=[23:15];256=[22:15])</doc></bitfield> </reg32> </stripe> <stripe offset="0x2504" stride="0x0008" length="16"> <reg32 name="VAP_PVS_FLOW_CNTL_ADDRS_UW" access="rw" offset="0x0000"> <doc>For VS3.0 - To support more PVS instructions, increase the address range - Programmable Vertex Shader Flow Control Upper Word Addresses Register 0</doc> - <bitfield name="PVS_FC_LAST_INST_0" high="15" low="0"> - <doc>This field has multiple definitions as follows: JUMP - Not Applicable LOOP - The last instruction of the loop. JSR - The last instruction of the subroutine. (Addrss_Range:1K=[9:0];512=[8:0];256=[7:0])</doc> - <use-enum ref="ENUM244" /> - </bitfield> - <bitfield name="PVS_FC_RTN_INST_0" high="31" low="16"> - <doc>This field has multiple definitions as follows: JUMP - Not Applicable LOOP - First Instruction of Loop (Typically ACT_ADRS + 1) JSR - First Instruction After JSR (Typically ACT_ADRS + 1). (Addrss_Range:1K=[24:15];512=[23:15];256=[22:15])</doc> - <use-enum ref="ENUM245" /> - </bitfield> + <bitfield name="PVS_FC_LAST_INST_0" high="15" low="0"><doc>This field has multiple definitions as follows: JUMP - Not Applicable LOOP - The last instruction of the loop. JSR - The last instruction of the subroutine. (Addrss_Range:1K=[9:0];512=[8:0];256=[7:0])</doc></bitfield> + <bitfield name="PVS_FC_RTN_INST_0" high="31" low="16"><doc>This field has multiple definitions as follows: JUMP - Not Applicable LOOP - First Instruction of Loop (Typically ACT_ADRS + 1) JSR - First Instruction After JSR (Typically ACT_ADRS + 1). (Addrss_Range:1K=[24:15];512=[23:15];256=[22:15])</doc></bitfield> </reg32> </stripe> <stripe offset="0x2290" stride="0x0004" length="16"> @@ -5080,11 +4976,11 @@ <doc>Vertex Fetcher Control</doc> <bitfield name="PRIM_TYPE" high="3" low="0"> <doc>Primitive Type</doc> - <use-enum ref="ENUM117" /> + <use-enum ref="PRIM_TYPE" /> </bitfield> <bitfield name="PRIM_WALK" high="5" low="4"> <doc>Method of Passing Vertex Data.</doc> - <use-enum ref="ENUM118" /> + <use-enum ref="VERTEX_DATA_PASS_MODE" /> </bitfield> <bitfield name="RSVD_PREV_USED" high="10" low="6"><doc>Reserved bits</doc></bitfield> <bitfield name="INDEX_SIZE" high="11" low="11"><doc>When set, vertex indices are 32-bits/indx, otherwise, 16- bits/indx.</doc></bitfield> @@ -5117,14 +5013,14 @@ </reg32> <reg32 name="VAP_VTX_STATE_CNTL" access="rw" offset="0x2180"> <doc>VAP Vertex State Control Register</doc> - <bitfield name="COLOR_0_ASSEMBLY_CNTL" high="1" low="0"><use-enum ref="ENUM119" /></bitfield> - <bitfield name="COLOR_1_ASSEMBLY_CNTL" high="3" low="2"><use-enum ref="ENUM120" /></bitfield> - <bitfield name="COLOR_2_ASSEMBLY_CNTL" high="5" low="4"><use-enum ref="ENUM121" /></bitfield> - <bitfield name="COLOR_3_ASSEMBLY_CNTL" high="7" low="6"><use-enum ref="ENUM122" /></bitfield> - <bitfield name="COLOR_4_ASSEMBLY_CNTL" high="9" low="8"><use-enum ref="ENUM123" /></bitfield> - <bitfield name="COLOR_5_ASSEMBLY_CNTL" high="11" low="10"><use-enum ref="ENUM124" /></bitfield> - <bitfield name="COLOR_6_ASSEMBLY_CNTL" high="13" low="12"><use-enum ref="ENUM125" /></bitfield> - <bitfield name="COLOR_7_ASSEMBLY_CNTL" high="15" low="14"><use-enum ref="ENUM126" /></bitfield> + <bitfield name="COLOR_0_ASSEMBLY_CNTL" high="1" low="0"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_1_ASSEMBLY_CNTL" high="3" low="2"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_2_ASSEMBLY_CNTL" high="5" low="4"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_3_ASSEMBLY_CNTL" high="7" low="6"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_4_ASSEMBLY_CNTL" high="9" low="8"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_5_ASSEMBLY_CNTL" high="11" low="10"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_6_ASSEMBLY_CNTL" high="13" low="12"><use-enum ref="COLOR_SELECT" /></bitfield> + <bitfield name="COLOR_7_ASSEMBLY_CNTL" high="15" low="14"><use-enum ref="COLOR_SELECT" /></bitfield> <bitfield name="UPDATE_USER_COLOR_0_ENA" high="16" low="16"><use-enum ref="ENUM127" /></bitfield> <bitfield name="Reserved" high="18" low="18"><doc>Set to 0</doc></bitfield> </reg32> @@ -5136,17 +5032,17 @@ <doc>Z Buffer Band-Width Control Defa</doc> <bitfield name="HIZ_ENABLE" high="0" low="0"> <doc>Enables hierarchical Z.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> - <bitfield name="HIZ_MIN" high="1" low="1"><use-enum ref="ENUM129" /></bitfield> - <bitfield name="FAST_FILL" high="2" low="2"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="HIZ_MIN" high="1" low="1"><use-enum ref="HZ_UPDATE_VAL" /></bitfield> + <bitfield name="FAST_FILL" high="2" low="2"><use-enum ref="ENABLE" /></bitfield> <bitfield name="RD_COMP_ENABLE" high="3" low="3"> <doc>Enables reading of compressed Z data from memory to the cache.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="WR_COMP_ENABLE" high="4" low="4"> <doc>Enables writing of compressed Z data from cache to memory,</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZB_CB_CLEAR" high="5" low="5"> <doc>This bit is set when the Z buffer is used to help the CB in clearing a region. Part of the region is cleared by the color buffer and part will be cleared by the Z buffer. Since the Z buffer does not have any write masks in the cache, full micro- tiles need to be written. If a partial micro-tile is touched, then the un-touched part will be unknowns. The cache will operate in write-allocate mode and quads will be accumulated in the cache and then evicted to main memory. The color value is supplied through the ZB_DEPTHCLEARVALUE register.</doc> @@ -5170,7 +5066,7 @@ </bitfield> <bitfield name="HIZ_EQUAL_REJECT_ENABLE" high="11" low="11"> <doc>Enables hiz rejects when the z function is equals.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="HIZ_FP_INVERT" high="15" low="15"> <doc>Determines whether leading zeros or ones are eliminated.</doc> @@ -5181,7 +5077,7 @@ <bitfield name="CONTIGUOUS_6XAA_SAMPLES_DI" high="17" low="17"><doc>This disables storing samples contiguously in 6xaa.</doc></bitfield> <bitfield name="PEQ_PACKING_ENABLE" high="18" low="18"> <doc>Enables packing of the plane equations to eliminate wasted peq slots.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="COVERED_PTR_MASKING_ENABL" high="19" low="19"><doc>Enables discarding of pointers from pixels that are going to be</doc></bitfield> </reg32> @@ -5189,30 +5085,30 @@ <doc>Z Buffer Control</doc> <bitfield name="STENCIL_ENABLE" high="0" low="0"> <doc>Enables stenciling.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="Z_ENABLE" high="1" low="1"> <doc>Enables Z functions.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZWRITEENABLE" high="2" low="2"> <doc>Enables writing of the Z buffer.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZSIGNED_COMPARE" high="3" low="3"> <doc>Enable signed Z buffer comparison , for W-buffering.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="STENCIL_FRONT_BACK" high="4" low="4"> <doc>When STENCIL_ENABLE is set, setting STENCIL_FRONT_BACK bit to one specifies that stencilfunc/stencilfail/stencilzpass/stencilzfail registers are used if the quad is generated from front faced primitive and stencilfunc_bf/stencilfail_bf/stencilzpass_bf/stencilzfail_bf are used if the quad is generated from a back faced primitive. If the STENCIL_FRONT_BACK is not set, then stencilfunc/stencilfail/stencilzpass/stencilzfail registers determine the operation independent of the front/back face state of the quad.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> <bitfield name="ZSIGNED_MAGNITUDE" high="5" low="5"> <doc>Specifies the signed number type to use for the Z buffer comparison. This only has an effect when ZSIGNED_COMPARE is enabled.</doc> <value value="0" name="TWOS_COMPLEMENT"><doc>Twos complement</doc></value> <value value="1" name="SIGNED_MAGNITUDE"><doc>Signed magnitude</doc></value> </bitfield> - <bitfield name="STENCIL_REFMASK_FRONT_BACK" high="6" low="6"><use-enum ref="ENUM5" /></bitfield> + <bitfield name="STENCIL_REFMASK_FRONT_BACK" high="6" low="6"><use-enum ref="ENABLE" /></bitfield> </reg32> <reg32 name="ZB_FIFO_SIZE" access="rw" offset="0x4FD0"> <doc>Sets the fifo sizes</doc> @@ -5261,15 +5157,15 @@ <doc>Z and Stencil Function Control</doc> <bitfield name="ZFUNC" high="2" low="0"> <doc>Specifies the Z function.</doc> - <use-enum ref="ENUM139" /> + <use-enum ref="DSCOMPARE_FUNC" /> </bitfield> <bitfield name="STENCILFUNC" high="5" low="3"> <doc>Specifies the stencil function.</doc> - <use-enum ref="ENUM140" /> + <use-enum ref="DSCOMPARE_FUNC" /> </bitfield> <bitfield name="STENCILFAIL" high="8" low="6"> <doc>Specifies the stencil value to be written if the stencil test fails.</doc> - <use-enum ref="ENUM141" /> + <use-enum ref="STENCILFAIL_VAL" /> </bitfield> <bitfield name="STENCILZPASS" high="11" low="9"><doc>Same encoding as STENCILFAIL. Specifies the stencil value to be written if the stencil test passes and the Z test passes (or is not enabled).</doc></bitfield> <bitfield name="STENCILZFAIL" high="14" low="12"><doc>Same encoding as STENCILFAIL. Specifies the stencil value to be written if the stencil test passes and the Z test fails.</doc></bitfield> @@ -5279,7 +5175,7 @@ <bitfield name="STENCILZFAIL_BF" high="26" low="24"><doc>Same encoding as STENCILFAIL. Specifies the stencil value to be written if the stencil test passes and the Z test fails for back faced quads, if STENCIL_FRONT_BACK =1</doc></bitfield> <bitfield name="ZERO_OUTPUT_MASK" high="27" low="27"> <doc>Zeroes the zb coverage mask output. This does not affect the updating of the depth or stencil values.</doc> - <use-enum ref="ENUM5" /> + <use-enum ref="ENABLE" /> </bitfield> </reg32> </group> |