wipllvm-wip

16 files changed, 703 insertions, 7 deletions

diff --git a/src/mesa/drivers/dri/i965/Makefile.am b/src/mesa/drivers/dri/i965/Makefile.am
index 50c0a2c5eb..288c91838c 100644
--- a/src/mesa/drivers/dri/i965/Makefile.am
+++ b/src/mesa/drivers/dri/i965/Makefile.am
@@ -55,7 +55,15 @@ libi965_dri_la_SOURCES = \
 if HAVE_LLVM
 LLVM_HELPER_LIB = libi965_llvm.la
 libi965_llvm_la_SOURCES = \
+	bin_streamer.cpp \
+	bin_streamer.h \
 	brw_fs_llvm.cpp \
+	gen_asm_backend.cpp \
+	gen_asm_backend.h \
+	gen_asm_printer.cpp \
+	gen_asm_printer.h \
+	gen_code_emitter.cpp \
+	gen_code_emitter.h \
 	gen_frame_lowering.cpp \
 	gen_frame_lowering.h \
 	gen_instr_info.cpp \
diff --git a/src/mesa/drivers/dri/i965/bin_streamer.cpp b/src/mesa/drivers/dri/i965/bin_streamer.cpp
new file mode 100644
index 0000000000..b3df2315a5
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/bin_streamer.cpp
@@ -0,0 +1,238 @@
+//===- bin_streamer.cpp - MC "Pure" Object Output ----------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+
+#include "llvm/MC/MCStreamer.h"
+#include "llvm/MC/MCAssembler.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCContext.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCObjectStreamer.h"
+// FIXME: Remove this.
+#include "llvm/MC/MCSectionMachO.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/Support/ErrorHandling.h"
+#include "bin_streamer.h"
+
+using namespace llvm;
+
+namespace {
+
+class bin_streamer : public MCObjectStreamer {
+private:
+  virtual void EmitInstToFragment(const MCInst &Inst);
+  virtual void EmitInstToData(const MCInst &Inst);
+
+public:
+  bin_streamer(MCContext &Context, MCAsmBackend &TAB,
+                 raw_ostream &OS, MCCodeEmitter *Emitter)
+    : MCObjectStreamer(Context, TAB, OS, Emitter) {}
+
+  /// @name MCStreamer Interface
+  /// @{
+
+  virtual void InitSections();
+  virtual void EmitLabel(MCSymbol *Symbol);
+  virtual void EmitAssignment(MCSymbol *Symbol, const MCExpr *Value);
+  virtual void EmitZerofill(const MCSection *Section, MCSymbol *Symbol = 0,
+                            unsigned Size = 0, unsigned ByteAlignment = 0);
+  virtual void EmitBytes(StringRef Data, unsigned AddrSpace);
+  virtual void EmitValueToAlignment(unsigned ByteAlignment, int64_t Value = 0,
+                                    unsigned ValueSize = 1,
+                                    unsigned MaxBytesToEmit = 0);
+  virtual void EmitCodeAlignment(unsigned ByteAlignment,
+                                 unsigned MaxBytesToEmit = 0);
+  virtual bool EmitValueToOffset(const MCExpr *Offset,
+                                 unsigned char Value = 0);
+  virtual void FinishImpl();
+
+
+  virtual void EmitSymbolAttribute(MCSymbol *Symbol, MCSymbolAttr Attribute) {
+    //report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitAssemblerFlag(MCAssemblerFlag Flag) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitTBSSSymbol(const MCSection *Section, MCSymbol *Symbol,
+                              uint64_t Size, unsigned ByteAlignment = 0) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitSymbolDesc(MCSymbol *Symbol, unsigned DescValue) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitCommonSymbol(MCSymbol *Symbol, uint64_t Size,
+                                unsigned ByteAlignment) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitThumbFunc(MCSymbol *Func) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void BeginCOFFSymbolDef(const MCSymbol *Symbol) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitCOFFSymbolStorageClass(int StorageClass) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitCOFFSymbolType(int Type) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EndCOFFSymbolDef() {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitELFSize(MCSymbol *Symbol, const MCExpr *Value) {
+    //report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitLocalCommonSymbol(MCSymbol *Symbol, uint64_t Size,
+                                     unsigned ByteAlignment) {
+    report_fatal_error(__FUNCTION__);
+  }
+  virtual void EmitFileDirective(StringRef Filename) {
+    //report_fatal_error(__FUNCTION__);
+  }
+  virtual bool EmitDwarfFileDirective(unsigned FileNo, StringRef Directory,
+                                      StringRef Filename) {
+    report_fatal_error(__FUNCTION__);
+  }
+
+  /// @}
+};
+
+} // end anonymous namespace.
+
+void bin_streamer::InitSections() {
+  // FIMXE: To what!?
+  SwitchSection(getContext().getMachOSection("__TEXT", "__text",
+                                    MCSectionMachO::S_ATTR_PURE_INSTRUCTIONS,
+                                    0, SectionKind::getText()));
+
+}
+
+void bin_streamer::EmitLabel(MCSymbol *Symbol) {
+  assert(Symbol->isUndefined() && "Cannot define a symbol twice!");
+  assert(!Symbol->isVariable() && "Cannot emit a variable symbol!");
+  assert(getCurrentSection() && "Cannot emit before setting section!");
+
+  Symbol->setSection(*getCurrentSection());
+
+  MCSymbolData &SD = getAssembler().getOrCreateSymbolData(*Symbol);
+
+  // We have to create a new fragment if this is an atom defining symbol,
+  // fragments cannot span atoms.
+  if (getAssembler().isSymbolLinkerVisible(SD.getSymbol()))
+    new MCDataFragment(getCurrentSectionData());
+
+  // FIXME: This is wasteful, we don't necessarily need to create a data
+  // fragment. Instead, we should mark the symbol as pointing into the data
+  // fragment if it exists, otherwise we should just queue the label and set its
+  // fragment pointer when we emit the next fragment.
+  MCDataFragment *F = getOrCreateDataFragment();
+  assert(!SD.getFragment() && "Unexpected fragment on symbol data!");
+  SD.setFragment(F);
+  SD.setOffset(F->getContents().size());
+}
+
+void bin_streamer::EmitAssignment(MCSymbol *Symbol, const MCExpr *Value) {
+  // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into
+  // MCObjectStreamer.
+  // FIXME: Lift context changes into super class.
+  getAssembler().getOrCreateSymbolData(*Symbol);
+  Symbol->setVariableValue(AddValueSymbols(Value));
+}
+
+void bin_streamer::EmitZerofill(const MCSection *Section, MCSymbol *Symbol,
+                                  unsigned Size, unsigned ByteAlignment) {
+  report_fatal_error("not yet implemented in pure streamer");
+}
+
+void bin_streamer::EmitBytes(StringRef Data, unsigned AddrSpace) {
+  // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into
+  // MCObjectStreamer.
+  getOrCreateDataFragment()->getContents().append(Data.begin(), Data.end());
+}
+
+void bin_streamer::EmitValueToAlignment(unsigned ByteAlignment,
+                                          int64_t Value, unsigned ValueSize,
+                                          unsigned MaxBytesToEmit) {
+  // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into
+  // MCObjectStreamer.
+  if (MaxBytesToEmit == 0)
+    MaxBytesToEmit = ByteAlignment;
+  new MCAlignFragment(ByteAlignment, Value, ValueSize, MaxBytesToEmit,
+                      getCurrentSectionData());
+
+  // Update the maximum alignment on the current section if necessary.
+  if (ByteAlignment > getCurrentSectionData()->getAlignment())
+    getCurrentSectionData()->setAlignment(ByteAlignment);
+}
+
+void bin_streamer::EmitCodeAlignment(unsigned ByteAlignment,
+                                       unsigned MaxBytesToEmit) {
+  // TODO: This is exactly the same as WinCOFFStreamer. Consider merging into
+  // MCObjectStreamer.
+  if (MaxBytesToEmit == 0)
+    MaxBytesToEmit = ByteAlignment;
+  MCAlignFragment *F = new MCAlignFragment(ByteAlignment, 0, 1, MaxBytesToEmit,
+                                           getCurrentSectionData());
+  F->setEmitNops(true);
+
+  // Update the maximum alignment on the current section if necessary.
+  if (ByteAlignment > getCurrentSectionData()->getAlignment())
+    getCurrentSectionData()->setAlignment(ByteAlignment);
+}
+
+bool bin_streamer::EmitValueToOffset(const MCExpr *Offset,
+                                       unsigned char Value) {
+  new MCOrgFragment(*Offset, Value, getCurrentSectionData());
+  return false;
+}
+
+void bin_streamer::EmitInstToFragment(const MCInst &Inst) {
+  MCInstFragment *IF = new MCInstFragment(Inst, getCurrentSectionData());
+
+  // Add the fixups and data.
+  //
+  // FIXME: Revisit this design decision when relaxation is done, we may be
+  // able to get away with not storing any extra data in the MCInst.
+  SmallVector<MCFixup, 4> Fixups;
+  SmallString<256> Code;
+  raw_svector_ostream VecOS(Code);
+  getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups);
+  VecOS.flush();
+
+  IF->getCode() = Code;
+  IF->getFixups() = Fixups;
+}
+
+void bin_streamer::EmitInstToData(const MCInst &Inst) {
+  MCDataFragment *DF = getOrCreateDataFragment();
+
+  SmallVector<MCFixup, 4> Fixups;
+  SmallString<256> Code;
+  raw_svector_ostream VecOS(Code);
+  getAssembler().getEmitter().EncodeInstruction(Inst, VecOS, Fixups);
+  VecOS.flush();
+
+  // Add the fixups and data.
+  for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
+    Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());
+    DF->addFixup(Fixups[i]);
+  }
+  DF->getContents().append(Code.begin(), Code.end());
+}
+
+void bin_streamer::FinishImpl() {
+  // FIXME: Handle DWARF tables?
+
+  this->MCObjectStreamer::FinishImpl();
+}
+
+MCStreamer *llvm::create_bin_streamer(MCContext &Context, MCAsmBackend &MAB,
+                                      raw_ostream &OS, MCCodeEmitter *CE) {
+  return new bin_streamer(Context, MAB, OS, CE);
+}
+
diff --git a/src/mesa/drivers/dri/i965/bin_streamer.h b/src/mesa/drivers/dri/i965/bin_streamer.h
new file mode 100644
index 0000000000..84be414c5c
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/bin_streamer.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "llvm/MC/MCObjectStreamer.h"
+#include "llvm/Support/raw_ostream.h"
+
+using namespace llvm;
+
+namespace llvm {
+
+MCStreamer *
+create_bin_streamer(MCContext &Context, MCAsmBackend &MAB,
+                    raw_ostream &OS, MCCodeEmitter *CE);
+
+};
+
diff --git a/src/mesa/drivers/dri/i965/brw_fs_llvm.cpp b/src/mesa/drivers/dri/i965/brw_fs_llvm.cpp
index 40fbae9859..5d039c2e9f 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_llvm.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_llvm.cpp
@@ -90,8 +90,8 @@ fs_ir_to_llvm::build_epilogue()
                new(mem_ctx) ir_dereference_array(deref, index);
             Value *chan = llvm_pointer(deref_array);
 
-            gen_intrinsic(genIntrinsic::gen_MOV_MRF_F, llvm_int(i),
-                          bld.CreateLoad(chan));
+            //gen_intrinsic(genIntrinsic::gen_MOV_MRF_F, llvm_int(i),
+            //              bld.CreateLoad(chan));
          }
       }
    }
@@ -169,12 +169,17 @@ fs_visitor::build_llvm()
    raw_string_ostream oStream(CodeString);
    formatted_raw_ostream out(oStream);
 
-   tm->addPassesToEmitFile(PM, out, TargetMachine::CGFT_AssemblyFile, true);
+   //tm->addPassesToEmitFile(PM, out, TargetMachine::CGFT_AssemblyFile, true);
+   tm->addPassesToEmitFile(PM, out, TargetMachine::CGFT_ObjectFile, true);
+   //tm->addPassesToEmitFile(PM, out, TargetMachine::CGFT_Null, true);
 
    PM.run(*mod);
 
-   printf("dump2\n");
-   mod->dump();
+   oStream.flush();
+   printf("Code emitted (len=%lu)\n%s\nend code\n", CodeString.length(), CodeString.c_str());
+
+   //printf("dump2\n");
+   //mod->dump();
 
    return true;
 }
diff --git a/src/mesa/drivers/dri/i965/gen_asm_backend.cpp b/src/mesa/drivers/dri/i965/gen_asm_backend.cpp
new file mode 100644
index 0000000000..9d567dd108
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen_asm_backend.cpp
@@ -0,0 +1,33 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/** @file gen_mc_asm_info.cpp
+ *
+ * Does something related to maybe printing out assembly for gen mc
+ * instructions?
+ */
+
+#include "gen_target_machine.h"
+#include "gen_asm_backend.h"
+
+
diff --git a/src/mesa/drivers/dri/i965/gen_asm_backend.h b/src/mesa/drivers/dri/i965/gen_asm_backend.h
new file mode 100644
index 0000000000..31e9289906
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen_asm_backend.h
@@ -0,0 +1,94 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "llvm/MC/MCAsmBackend.h"
+#include "llvm/MC/MCObjectWriter.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCValue.h"
+#include <stdio.h>
+
+using namespace llvm;
+
+class gen_raw_bin_writer : public MCObjectWriter
+{
+public:
+   gen_raw_bin_writer(raw_ostream &_OS, bool _IsLittleEndian)
+      : MCObjectWriter(_OS, _IsLittleEndian) {}
+   void ExecutePostLayoutBinding(MCAssembler&, const MCAsmLayout&)
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+   }
+   void RecordRelocation(const MCAssembler&, const MCAsmLayout&, const MCFragment*, const MCFixup&, MCValue, uint64_t&)
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+   }
+   void WriteObject(MCAssembler&, const MCAsmLayout&)
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+   }
+};
+
+class gen_asm_backend : public MCAsmBackend
+{
+public:
+   gen_asm_backend(const Target &T)
+      : MCAsmBackend()
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+   }
+
+   MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+      return new gen_raw_bin_writer(OS, true);
+   }
+
+   unsigned int getNumFixupKinds() const
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+      return 0;
+   }
+   void applyFixup(const MCFixup&, char*, unsigned int, uint64_t) const
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+   }
+   bool mayNeedRelaxation(const MCInst&) const
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+      return false;
+   }
+   bool fixupNeedsRelaxation(const MCFixup&, uint64_t, const MCInstFragment*, const MCAsmLayout&) const
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+      return false;
+   }
+   void relaxInstruction(const MCInst&, MCInst&) const
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+   }
+   bool writeNopData(uint64_t, MCObjectWriter*) const
+   {
+      printf("%s %d\n", __FUNCTION__, __LINE__);
+      return false;
+   }
+};
+
diff --git a/src/mesa/drivers/dri/i965/gen_asm_printer.cpp b/src/mesa/drivers/dri/i965/gen_asm_printer.cpp
new file mode 100644
index 0000000000..30fa44b08e
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen_asm_printer.cpp
@@ -0,0 +1,33 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/** @file gen_mc_asm_info.cpp
+ *
+ * Does something related to maybe printing out assembly for gen mc
+ * instructions?
+ */
+
+#include "gen_target_machine.h"
+#include "gen_code_emitter.h"
+
+
diff --git a/src/mesa/drivers/dri/i965/gen_asm_printer.h b/src/mesa/drivers/dri/i965/gen_asm_printer.h
new file mode 100644
index 0000000000..c30620012f
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen_asm_printer.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+#include "llvm/CodeGen/AsmPrinter.h"
+
+using namespace llvm;
+
+class genAsmPrinter : public AsmPrinter {
+public:
+   explicit genAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
+      : AsmPrinter(TM, Streamer) {}
+   
+   virtual const char *getPassName() const {
+      return "Gen Assembly Printer";
+   }
+
+   void EmitInstruction(const MachineInstr *) {
+      //llvm_unreachable("EmitInstruction not implemented");
+   }
+};
+
diff --git a/src/mesa/drivers/dri/i965/gen_code_emitter.cpp b/src/mesa/drivers/dri/i965/gen_code_emitter.cpp
new file mode 100644
index 0000000000..5d792ab332
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen_code_emitter.cpp
@@ -0,0 +1,41 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+/** @file gen_mc_asm_info.cpp
+ *
+ * Does something related to maybe printing out assembly for gen mc
+ * instructions?
+ */
+
+#include "gen_target_machine.h"
+#include "gen_code_emitter.h"
+#include <stdio.h>
+
+void gen_code_emitter::
+EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                  SmallVectorImpl<MCFixup> &Fixups) const
+{
+   printf("%s\n", __FUNCTION__);
+   OS << "Hello, world\n";
+}
+
diff --git a/src/mesa/drivers/dri/i965/gen_code_emitter.h b/src/mesa/drivers/dri/i965/gen_code_emitter.h
new file mode 100644
index 0000000000..d155e54fe0
--- /dev/null
+++ b/src/mesa/drivers/dri/i965/gen_code_emitter.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright © 2012 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ */
+
+//#include "llvm/MC/MCAsmInfo.h"
+#include "llvm/MC/MCCodeEmitter.h"
+#include "llvm/MC/MCExpr.h"
+#include "llvm/MC/MCInst.h"
+#include "llvm/MC/MCInstrInfo.h"
+#include "llvm/MC/MCRegisterInfo.h"
+#include "llvm/MC/MCSubtargetInfo.h"
+#include "llvm/MC/MCSymbol.h"
+#include "llvm/Support/raw_ostream.h"
+#include <stdio.h>
+
+using namespace llvm;
+
+class gen_code_emitter : public MCCodeEmitter
+{
+   gen_code_emitter(const gen_code_emitter &); // DO NOT IMPLEMENT
+   void operator=(const gen_code_emitter &); // DO NOT IMPLEMENT
+   const MCInstrInfo &MCII;
+   const MCSubtargetInfo &STI;
+   MCContext &Ctx;
+public:
+   gen_code_emitter(const MCInstrInfo &mcii, const MCSubtargetInfo &sti,
+                    MCContext &ctx)
+     : MCII(mcii), STI(sti), Ctx(ctx)
+   {
+      printf("gen_code_emitter ctor\n");
+   }
+
+   ~gen_code_emitter() {}
+
+   void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
+                          SmallVectorImpl<MCFixup> &Fixups) const;
+
+};
+
diff --git a/src/mesa/drivers/dri/i965/gen_instr_info.h b/src/mesa/drivers/dri/i965/gen_instr_info.h
index a3e341aeff..33a6dbc45d 100644
--- a/src/mesa/drivers/dri/i965/gen_instr_info.h
+++ b/src/mesa/drivers/dri/i965/gen_instr_info.h
@@ -36,4 +36,9 @@ public:
    const gen_register_info ri;
 
    virtual const gen_register_info &getRegisterInfo() const;
+
+   virtual unsigned isLoadFromStackSlot(const MachineInstr *MI,
+                                       int &FrameIndex) const {
+    return 0;
+  }
 };
diff --git a/src/mesa/drivers/dri/i965/gen_instr_info.td b/src/mesa/drivers/dri/i965/gen_instr_info.td
index c387c12955..9e95cc24ad 100644
--- a/src/mesa/drivers/dri/i965/gen_instr_info.td
+++ b/src/mesa/drivers/dri/i965/gen_instr_info.td
@@ -48,11 +48,26 @@ def STUB_LOAD : arith<0,
     "stub_load $offset, $dst",
     [(set fgrfs:$dst, (load igrfs:$offset))]>;
 
+def STUBI_LOAD : arith<0,
+    (outs igrfs:$dst), (ins igrfs:$offset),
+    "stub_load $offset, $dst",
+    [(set igrfs:$dst, (load igrfs:$offset))]>;
+
 def STUB_STORE : arith<0,
     (outs), (ins fgrfs:$dst, igrfs:$offset),
     "stub_store $offset, $dst",
     [(store fgrfs:$dst, igrfs:$offset)]>;
 
+def STUBI_STORE : arith<0,
+    (outs), (ins igrfs:$dst, igrfs:$offset),
+    "stub_store $offset, $dst",
+    [(store igrfs:$dst, igrfs:$offset)]>;
+
+def ADD2 : arith<64,
+    (outs grfs:$dst), (ins grfs:$src1, i32imm:$src2),
+    "add $src1, $src2, $dst",
+    [(set grfs:$dst, (add grfs:$src1, imm:$src2))]>;
+
 def ADD : arith<64,
     (outs grfs:$dst), (ins grfs:$src1, grfs:$src2),
     "add $src1, $src2, $dst",
diff --git a/src/mesa/drivers/dri/i965/gen_isel_dag_to_dag.cpp b/src/mesa/drivers/dri/i965/gen_isel_dag_to_dag.cpp
index f70408dcfa..7fa87afc7f 100644
--- a/src/mesa/drivers/dri/i965/gen_isel_dag_to_dag.cpp
+++ b/src/mesa/drivers/dri/i965/gen_isel_dag_to_dag.cpp
@@ -23,6 +23,7 @@
 
 #include "gen_target_machine.h"
 #include "llvm/CodeGen/SelectionDAGISel.h"
+#include "stdio.h"
 
 class gen_dag_to_dag_isel : public SelectionDAGISel {
 public:
@@ -44,11 +45,24 @@ public:
 
 SDNode *gen_dag_to_dag_isel::Select(SDNode *N)
 {
-   return SelectCode(N);
+   printf("<<< gen_dag_to_dag_isel::Select %s opcode=%d\n", N->isMachineOpcode() ? "machine":"isd", N->getOpcode());
+   N->dump();
+   if (N->getOpcode() == ISD::GlobalAddress) {
+      printf("GlobalAddress\n");
+      return NULL;
+   }
+   SDNode *result = SelectCode(N);
+   printf(">>> gen_dag_to_dag_isel::Select => %p\n", result);
+   if (result != NULL) {
+      printf(">>> %p => %s opcode=%d\n",
+         result, result->isMachineOpcode()? "machine":"isd", result->getOpcode());
+   }
+   return result;
 }
 
 FunctionPass *llvm::create_gen_isel_dag(gen_target_machine &tm)
 {
+   printf("llvm::create_gen_isel_dag(gen_target_machine &tm)\n");
    return new gen_dag_to_dag_isel(tm);
 }
 
diff --git a/src/mesa/drivers/dri/i965/gen_mc_target_desc.cpp b/src/mesa/drivers/dri/i965/gen_mc_target_desc.cpp
index cfd88e2a71..95a3791adb 100644
--- a/src/mesa/drivers/dri/i965/gen_mc_target_desc.cpp
+++ b/src/mesa/drivers/dri/i965/gen_mc_target_desc.cpp
@@ -33,9 +33,13 @@
 
 #include "llvm/MC/MCCodeGenInfo.h"
 #include "llvm/Support/TargetRegistry.h"
+#include "bin_streamer.h"
 #include "gen_subtarget.h"
 #include "gen_target_machine.h"
 #include "gen_mc_asm_info.h"
+#include "gen_asm_backend.h"
+#include "gen_asm_printer.h"
+#include "gen_code_emitter.h"
 
 #define GET_INSTRINFO_MC_DESC
 #include "gen_instr_info.h.inc"
@@ -46,6 +50,8 @@
 #define GET_REGINFO_MC_DESC
 #include "gen_register_info.h.inc"
 
+#include "bin_streamer.h"
+
 using namespace llvm;
 
 static MCInstrInfo *create_gen_mc_instr_info()
@@ -79,6 +85,31 @@ create_gen_mc_codegen_info(StringRef TT, Reloc::Model RM,
    return X;
 }
 
+static MCCodeEmitter *
+create_gen_mc_code_emitter(const MCInstrInfo &MCII,
+                           const MCSubtargetInfo &STI,
+                           MCContext &Ctx) {
+  return new gen_code_emitter(MCII, STI, Ctx);
+}
+
+static MCAsmBackend *
+create_gen_asm_backend(const Target &T, StringRef TT)
+{
+  return new gen_asm_backend(T);
+}
+
+static MCStreamer *
+create_gen_mc_streamer(const Target &T, StringRef TT,
+                       MCContext &Ctx, MCAsmBackend &MAB,
+                       raw_ostream &_OS,
+                       MCCodeEmitter *_Emitter,
+                       bool RelaxAll,
+                       bool NoExecStack) {
+  //return createNullStreamer(Ctx);
+  //return createPureStreamer(Ctx, MAB, _OS, _Emitter);
+  return create_bin_streamer(Ctx, MAB, _OS, _Emitter);
+}
+
 void gen_initialize_llvm_target_mc()
 {
    RegisterMCAsmInfo<gen_mc_asm_info> Y(the_gen_target);
@@ -86,6 +117,17 @@ void gen_initialize_llvm_target_mc()
    TargetRegistry::RegisterMCCodeGenInfo(the_gen_target,
                                          create_gen_mc_codegen_info);
 
+   TargetRegistry::RegisterMCAsmBackend(the_gen_target,
+                                        create_gen_asm_backend);
+
+   RegisterAsmPrinter<genAsmPrinter> AP(the_gen_target);
+
+   TargetRegistry::RegisterMCCodeEmitter(the_gen_target,
+                                         create_gen_mc_code_emitter);
+
+   TargetRegistry::RegisterMCObjectStreamer(the_gen_target,
+                                            create_gen_mc_streamer);
+
    TargetRegistry::RegisterMCInstrInfo(the_gen_target,
                                        create_gen_mc_instr_info);
 
diff --git a/src/mesa/drivers/dri/i965/gen_target_lowering.cpp b/src/mesa/drivers/dri/i965/gen_target_lowering.cpp
index 42f2005a0f..60e2e7eff5 100644
--- a/src/mesa/drivers/dri/i965/gen_target_lowering.cpp
+++ b/src/mesa/drivers/dri/i965/gen_target_lowering.cpp
@@ -27,6 +27,7 @@
 
 #include "gen_target_machine.h"
 #include "gen_target_lowering.h"
+#include <stdio.h>
 
 gen_target_lowering::gen_target_lowering(TargetMachine &tm)
 : TargetLowering(tm, new TargetLoweringObjectFileELF())
@@ -56,8 +57,10 @@ gen_target_lowering::EmitInstrWithCustomInserter(MachineInstr * MI,
 
    switch (MI->getOpcode()) {
    default:
+      fprintf(stderr, "%s:%d\n", __FUNCTION__, __LINE__);
       return gen_target_lowering::EmitInstrWithCustomInserter(MI, BB);
    case gen::MOV_MRF_F:
+      fprintf(stderr, "%s:%d\n", __FUNCTION__, __LINE__);
       lower_mov_mrf_f(MI, *BB, I, MRI);
       break;
    }
@@ -75,6 +78,26 @@ gen_target_lowering::lower_mov_mrf_f(MachineInstr *MI,
 }
 
 SDValue
+gen_target_lowering::LowerCall(SDValue Chain, SDValue Callee,
+                               CallingConv::ID CallConv, bool isVarArg,
+                               bool doesNotRet, bool &isTailCall,
+                               const SmallVectorImpl<ISD::OutputArg> &Outs,
+                               const SmallVectorImpl<SDValue> &OutVals,
+                               const SmallVectorImpl<ISD::InputArg> &Ins,
+                               DebugLoc dl, SelectionDAG &DAG,
+                               SmallVectorImpl<SDValue> &InVals) const {
+   Chain.getNode()->dump();
+   Callee.getNode()->dump();
+   SDValue Flag;
+   SDValue ValToCopy;
+   Chain = DAG.getCopyToReg(Chain, dl, 2, OutVals[0], Flag);
+   Chain.getNode()->dump();
+   return Chain;
+   //assert(!"Custom lowering code for thisinstruction is not implemented yet!");
+   //llvm_unreachable("Not Implemented");
+}
+
+SDValue
 gen_target_lowering::LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
                                           bool isVarArg,
                                           const SmallVectorImpl<ISD::InputArg> &Ins,
@@ -95,7 +118,7 @@ gen_target_lowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
                                  const SmallVectorImpl<SDValue> &OutVals,
                                  DebugLoc DL, SelectionDAG &DAG) const
 {
-   assert(!"FINISHME: What's supposed to go here?");
+   //assert(!"FINISHME: What's supposed to go here?");
    return Chain;
 }
 
diff --git a/src/mesa/drivers/dri/i965/gen_target_lowering.h b/src/mesa/drivers/dri/i965/gen_target_lowering.h
index 3a353207bd..06339e0bd7 100644
--- a/src/mesa/drivers/dri/i965/gen_target_lowering.h
+++ b/src/mesa/drivers/dri/i965/gen_target_lowering.h
@@ -22,6 +22,7 @@
  */
 
 #include "llvm/Target/TargetLowering.h"
+#include "llvm/CodeGen/SelectionDAG.h"
 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
 
 using namespace llvm;
@@ -48,6 +49,15 @@ public:
 
    virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
 
+   virtual SDValue LowerCall(SDValue Chain, SDValue Callee,
+                             CallingConv::ID CallConv, bool isVarArg,
+                             bool doesNotRet, bool &isTailCall,
+                             const SmallVectorImpl<ISD::OutputArg> &Outs,
+                             const SmallVectorImpl<SDValue> &OutVals,
+                             const SmallVectorImpl<ISD::InputArg> &Ins,
+                             DebugLoc dl, SelectionDAG &DAG,
+                             SmallVectorImpl<SDValue> &InVals) const;
+
    void lower_mov_mrf_f(MachineInstr *MI,
                         MachineBasicBlock &BB,
                         MachineBasicBlock::iterator I,