i965: Add shader cache support for compute

v2:
 * Use MAYBE_UNUSED. (Matt)

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>

5 files changed, 57 insertions, 12 deletions

diff --git a/src/mesa/drivers/dri/i965/brw_cs.c b/src/mesa/drivers/dri/i965/brw_cs.c
index be7680def7..a319f14ff3 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.c
+++ b/src/mesa/drivers/dri/i965/brw_cs.c
@@ -153,7 +153,7 @@ brw_codegen_cs_prog(struct brw_context *brw,
 }
 
 
-static void
+void
 brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key)
 {
    struct gl_context *ctx = &brw->ctx;
@@ -191,14 +191,20 @@ brw_upload_cs_prog(struct brw_context *brw)
 
    brw_cs_populate_key(brw, &key);
 
-   if (!brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG,
-                         &key, sizeof(key),
-                         &brw->cs.base.prog_offset,
-                         &brw->cs.base.prog_data)) {
-      bool success = brw_codegen_cs_prog(brw, cp, &key);
-      (void) success;
-      assert(success);
-   }
+   if (brw_search_cache(&brw->cache, BRW_CACHE_CS_PROG,
+                        &key, sizeof(key),
+                        &brw->cs.base.prog_offset,
+                        &brw->cs.base.prog_data))
+      return;
+
+   if (brw_disk_cache_upload_program(brw, MESA_SHADER_COMPUTE))
+      return;
+
+   cp = (struct brw_program *) brw->programs[MESA_SHADER_COMPUTE];
+   cp->id = key.program_string_id;
+
+   MAYBE_UNUSED bool success = brw_codegen_cs_prog(brw, cp, &key);
+   assert(success);
 }
 
 
diff --git a/src/mesa/drivers/dri/i965/brw_cs.h b/src/mesa/drivers/dri/i965/brw_cs.h
index 890a0c8a80..60eb19c359 100644
--- a/src/mesa/drivers/dri/i965/brw_cs.h
+++ b/src/mesa/drivers/dri/i965/brw_cs.h
@@ -32,6 +32,9 @@ extern "C" {
 void
 brw_upload_cs_prog(struct brw_context *brw);
 
+void
+brw_cs_populate_key(struct brw_context *brw, struct brw_cs_prog_key *key);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/mesa/drivers/dri/i965/brw_disk_cache.c b/src/mesa/drivers/dri/i965/brw_disk_cache.c
index 4481189eca..0a612d7811 100644
--- a/src/mesa/drivers/dri/i965/brw_disk_cache.c
+++ b/src/mesa/drivers/dri/i965/brw_disk_cache.c
@@ -31,6 +31,7 @@
 
 #include "brw_context.h"
 #include "brw_program.h"
+#include "brw_cs.h"
 #include "brw_gs.h"
 #include "brw_state.h"
 #include "brw_vs.h"
@@ -129,6 +130,7 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache,
    struct brw_tes_prog_key tes_key;
    struct brw_gs_prog_key gs_key;
    struct brw_vs_prog_key vs_key;
+   struct brw_cs_prog_key cs_key;
 
    switch (stage) {
    case MESA_SHADER_VERTEX:
@@ -159,6 +161,11 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache,
       wm_key.program_string_id = 0;
       gen_shader_sha1(brw, prog, stage, &wm_key, binary_sha1);
       break;
+   case MESA_SHADER_COMPUTE:
+      brw_cs_populate_key(brw, &cs_key);
+      cs_key.program_string_id = 0;
+      gen_shader_sha1(brw, prog, stage, &cs_key, binary_sha1);
+      break;
    default:
       unreachable("Unsupported stage!");
    }
@@ -229,6 +236,11 @@ read_and_upload(struct brw_context *brw, struct disk_cache *cache,
       SET_UPLOAD_PRAMS(wm, FS, wp)
       break;
    }
+   case MESA_SHADER_COMPUTE: {
+      struct brw_program *cp = (struct brw_program *) prog;
+      SET_UPLOAD_PRAMS(cs, CS, cp)
+      break;
+   }
    default:
       unreachable("Unsupported stage!");
    }
@@ -357,7 +369,7 @@ write_program_data(struct brw_context *brw, struct gl_program *prog,
 }
 
 void
-brw_disk_cache_write_program(struct brw_context *brw)
+brw_disk_cache_write_render_programs(struct brw_context *brw)
 {
    struct disk_cache *cache = brw->ctx.Cache;
    if (cache == NULL)
@@ -429,3 +441,25 @@ brw_disk_cache_write_program(struct brw_context *brw)
                          MESA_SHADER_FRAGMENT);
    }
 }
+
+void
+brw_disk_cache_write_compute_program(struct brw_context *brw)
+{
+   struct disk_cache *cache = brw->ctx.Cache;
+   if (cache == NULL)
+      return;
+
+   struct gl_program *prog =
+      brw->ctx._Shader->CurrentProgram[MESA_SHADER_COMPUTE];
+   if (prog && !prog->program_written_to_cache) {
+      struct brw_cs_prog_key cs_key;
+      brw_cs_populate_key(brw, &cs_key);
+      cs_key.program_string_id = 0;
+
+      write_program_data(brw, prog, &cs_key, brw->cs.base.prog_data,
+                         brw->cs.base.prog_data->program_size,
+                         sizeof(struct brw_cs_prog_data),
+                         brw->cs.base.prog_offset, cache,
+                         MESA_SHADER_COMPUTE);
+   }
+}
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 6f2e0501b4..c98b7facd5 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -134,7 +134,8 @@ void gen8_write_pma_stall_bits(struct brw_context *brw,
 /* brw_disk_cache.c */
 bool brw_disk_cache_upload_program(struct brw_context *brw,
                                    gl_shader_stage stage);
-void brw_disk_cache_write_program(struct brw_context *brw);
+void brw_disk_cache_write_compute_program(struct brw_context *brw);
+void brw_disk_cache_write_render_programs(struct brw_context *brw);
 
 /***********************************************************************
  * brw_state.c
diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c b/src/mesa/drivers/dri/i965/brw_state_upload.c
index 1ee99648cb..b7f9095333 100644
--- a/src/mesa/drivers/dri/i965/brw_state_upload.c
+++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
@@ -443,9 +443,10 @@ brw_upload_programs(struct brw_context *brw,
          brw_upload_sf_prog(brw);
       }
 
-      brw_disk_cache_write_program(brw);
+      brw_disk_cache_write_render_programs(brw);
    } else if (pipeline == BRW_COMPUTE_PIPELINE) {
       brw_upload_cs_prog(brw);
+      brw_disk_cache_write_compute_program(brw);
    }
 }