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authorNicolai Hähnle <nicolai.haehnle@amd.com>2016-04-29 22:29:22 -0500
committerNicolai Hähnle <nicolai.haehnle@amd.com>2016-05-07 16:46:59 -0500
commit146927ce7b7c45be57655af505e8f21e90ae3928 (patch)
tree9e8fe57e1e8529ffe484cf51a565f7732998a964
parent60d2fc233bc7f15120f72119f9af678175a9b40d (diff)
radeonsi: fix some reported undefined left-shifts
One of these is an unsigned bitfield, which I suspect is a false positive, but gcc 5.3.1 complains about it with -fsanitize=undefined. Reviewed-by: Michel Dänzer <michel.daenzer@amd.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index c6e10b76f7..c4af77e149 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -464,7 +464,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
continue;
/* cb_render_state will disable unused ones */
- blend->cb_target_mask |= state->rt[j].colormask << (4 * i);
+ blend->cb_target_mask |= (unsigned)state->rt[j].colormask << (4 * i);
if (!state->rt[j].blend_enable) {
si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
@@ -528,7 +528,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
}
si_pm4_set_reg(pm4, R_028780_CB_BLEND0_CONTROL + i * 4, blend_cntl);
- blend->blend_enable_4bit |= 0xf << (i * 4);
+ blend->blend_enable_4bit |= 0xfu << (i * 4);
/* This is only important for formats without alpha. */
if (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA ||
@@ -537,7 +537,7 @@ static void *si_create_blend_state_mode(struct pipe_context *ctx,
dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE ||
srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA ||
dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA)
- blend->need_src_alpha_4bit |= 0xf << (i * 4);
+ blend->need_src_alpha_4bit |= 0xfu << (i * 4);
}
if (blend->cb_target_mask) {