diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2011-10-12 15:36:42 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@keithp.com> | 2011-10-20 14:51:18 -0700 |
| commit | fe2aa635091b825769326005408dc2428f31da21 (patch) | |
| tree | 81e82189fa808933348519e45781ddd245b32cf7 | |
| parent | f8ccad212b1ededb2f07853b1b566b7e1dc266bb (diff) | |
drm/i915: set watermarks for third pipe on IVB
The watermark reg for the third pipe is in an unusual offset; add
support for it and set watermarks for 3 pipe configs.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com>
Signed-off-by: Keith Packard <keithp@keithp.com>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 0 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 14 |
2 files changed, 14 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index c7ef323d716e..5a09416e611f 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c1b0ebbdf2eb..0e8c5d280fe7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -4540,6 +4540,20 @@ static void sandybridge_update_wm(struct drm_device *dev) enabled |= 2; } + /* IVB has 3 pipes */ + if (IS_IVYBRIDGE(dev) && + g4x_compute_wm0(dev, 2, + &sandybridge_display_wm_info, latency, + &sandybridge_cursor_wm_info, latency, + &plane_wm, &cursor_wm)) { + I915_WRITE(WM0_PIPEC_IVB, + (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); + DRM_DEBUG_KMS("FIFO watermarks For pipe C -" + " plane %d, cursor: %d\n", + plane_wm, cursor_wm); + enabled |= 3; + } + /* * Calculate and update the self-refresh watermark only when one * display plane is used. |