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path: root/lib/intel_chipset.h
AgeCommit message (Expand)AuthorFilesLines
2015-05-18lib/bxt: Update the Broxton PCI IDsDamien Lespiau1-5/+3
2015-04-08lib/bxt: Add Broxton PCI idsDamien Lespiau1-1/+11
2015-04-08lib/intel_chipset: fix HAS_PCH_SPLIT on GEN9Imre Deak1-1/+1
2015-04-08lib/intel_chipset: fix HAS_PCH_SPLIT on CHVImre Deak1-1/+1
2015-03-24lib: Add i854 PCI IDVille Syrjälä1-0/+2
2014-09-30skl: Add SKL PCI idsDamien Lespiau1-6/+52
2014-04-29Add Cherryview PCI IDsVille Syrjälä1-1/+11
2014-03-22lib: remove uncessary #includes from headersDaniel Vetter1-1/+1
2014-03-22lib/intel_chipset: api docsDaniel Vetter1-0/+5
2014-03-22lib/intel_chipset: intel_ prefix for pch globalDaniel Vetter1-4/+4
2014-03-22lib: consolidate chipset helpers in intel_chipset.[hc]Daniel Vetter1-0/+21
2013-11-06bdw: Add gen8 to the IS_9XX() macroDamien Lespiau1-1/+2
2013-11-06pciid/bdw: Add Broadwell PCI idsBen Widawsky1-5/+28
2013-11-06chipset: IS_I9XX macroBen Widawsky1-0/+6
2013-06-05intel_chipset: Adding more reserved PCI IDs for Haswell.Rodrigo Vivi1-4/+51
2013-06-05intel_chipset: Fix Haswell GT3 names.Rodrigo Vivi1-26/+28
2013-05-08lib: Remove the execution bit of intel_chipset.hDamien Lespiau1-0/+0
2013-04-24tests: storedw on VEBOXXiang, Haihao1-0/+2
2013-03-22lib: fix HAS_PCH_SPLIT checkPaulo Zanoni1-1/+1
2013-03-03intel_chipset: Fix Haswell CRW PCI IDs.Kenneth Graunke1-9/+9
2013-02-19intel_chipset: Add multiple inclusion guards into intel_chipset.hVille Syrjälä1-0/+5
2013-02-19intel_chipset: Use parens around macro argumentsVille Syrjälä1-154/+154
2013-02-02add more VLV PCI IDsJesse Barnes1-4/+10
2012-08-21tools: Added intel_dpio_read and intel_dpio_writeVijay Purushothaman1-0/+2
2012-08-07lib: add more Haswell PCI IDsPaulo Zanoni1-3/+65
2012-06-11add VLV PCI IDJesse Barnes1-1/+4
2012-04-28chipset: accidentally left the old IS_GEN7 macroBen Widawsky1-6/+0
2012-04-25chipset updatesBen Widawsky1-2/+27
2011-12-06tests/gem_partial_pwrite_pread: don't trash gtt unnecessarilyDaniel Vetter1-1/+3
2011-09-12tests: basic ring<->cpu and ring<->ring testsDaniel Vetter1-0/+4
2011-07-28intel-gpu-tools/range handling: register range handlingBen Widawsky1-0/+8
2011-05-17Add Ivybridge support to intel_gpu_dump and the BLT tests.Eric Anholt1-1/+6
2011-05-10Add Ivybridge device IDsJesse Barnes1-3/+19
2011-02-14Remove confusing use of IS_9XXChris Wilson1-7/+2
2011-02-06Fix typo excluding Ironlake from IS_INTELChris Wilson1-1/+1
2011-02-01Search for the first Intel dri device.Chris Wilson1-6/+21
2010-09-27Add all sandybridge device idsZhenyu Wang1-4/+14
2010-06-30intel_reg_dumper: add some 945 MI reg dumpingJesse Barnes1-0/+3
2010-02-25Add support for Sandybridge mobile chipset.Eric Anholt1-1/+3
2010-02-25Add some initial definitions for Sandybridge.Eric Anholt1-3/+13
2009-09-08Add support for new chipsXiang, Haihao1-1/+9
2009-03-27Add intel_stepping from the 2D driver.Eric Anholt1-0/+106
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