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2023-05-11WIP: intel/fs: Fix shift counts for 8- and 16-bit typeswip/fix-shift-countsIan Romanick2-30/+37
2023-05-11dzn: Fix segmentation fault when Direct3D 12 user modeMouriNaruto1-11/+12
2023-05-11agx: Optimize multipliesAlyssa Rosenzweig3-0/+74
2023-05-11agx: Fix packing of imsub instructionsAlyssa Rosenzweig1-2/+4
2023-05-11agx: Handle imadshl_agx, imsubshl_agxAlyssa Rosenzweig1-0/+36
2023-05-11nir: Model AGX-specific multiply-shift-addAlyssa Rosenzweig1-0/+8
2023-05-11agx: Use nir_alu_src_as_uintAlyssa Rosenzweig1-1/+1
2023-05-11pan/bi: Use nir_alu_src_as_uintAlyssa Rosenzweig1-3/+3
2023-05-11nir: Add nir_alu_src_as_uint helperAlyssa Rosenzweig1-0/+7
2023-05-11anv: fixup workaround 16011411144Lionel Landwerlin2-2/+19
2023-05-11egl/loader: move crtc resource infrastructure as common helperTapani Pälli7-219/+235
2023-05-11aco: also reassign p_extract_vector post raGeorg Lehmann1-1/+6
2023-05-11aco: Assert that operands have the same byte offset when reassigning split ve...Georg Lehmann1-0/+5
2023-05-11vulkan/pipeline_cache: don't log warnings for internal cachesDaniel Schürmann7-21/+42
2023-05-11Revert "intel/compiler: make uses_pos_offset a tri-state"Lionel Landwerlin6-49/+17
2023-05-11v3d/ci: annotate failuresJuan A. Suarez Romero1-14/+18
2023-05-11amd/drm-shim: add amdgpu drm-shimChia-I Wu5-0/+1052
2023-05-11drm-shim: apply file overrides for openChia-I Wu1-6/+19
2023-05-10microsoft/compiler: Do basic I/O analysis for dependency tablesJesse Natalie3-0/+244
2023-05-10microsoft/compiler: Allocate space for I/O and viewID dependency tables befor...Jesse Natalie3-49/+112
2023-05-10tu: Re-enable bufferDeviceAddressCaptureReplayDanylo Piliaiev5-56/+167
2023-05-10tu: Move queue deletion to lastRob Clark1-7/+7
2023-05-10tu: Move VMA heap to the logical deviceDanylo Piliaiev3-27/+26
2023-05-10tu: Create drm fd per logical deviceDanylo Piliaiev6-32/+96
2023-05-10ci/zink+anv: Skip a couple more long tests pre-merge.Emma Anholt1-0/+2
2023-05-10ci: Re-enable some piglit tests that should be fast enough post-uprev.Emma Anholt4-8/+0
2023-05-10Uprev Piglit to 536975d94a40cf76a69fcfa786c2513eccd0c989Collabora's Gfx CI Team3-5/+4
2023-05-10zink: Don't flag legacy_shadow_mask for RED-only reads in the shader.Emma Anholt2-5/+16
2023-05-10zink: Fix silly void * type in rewrite_tex_dest.Emma Anholt1-3/+3
2023-05-10zink: Explain some of the current pathway for shadow sampling.Emma Anholt4-4/+25
2023-05-10mesa: Fix precompile of GLSL programs with shadow samplers.Emma Anholt2-3/+6
2023-05-10mesa: Fix debug logging of fp compile compare func.Emma Anholt1-1/+1
2023-05-10ac: enable SHADOW_GLOBAL_CONFIG for preemptible ibJiadong Zhu1-1/+2
2023-05-10nir/lower_io: Emit less iadd(x, 0)Konstantin Seurer1-0/+3
2023-05-10freedreno/a5xx+a6xx: Don't allocate LRZ for z32Rob Clark5-31/+17
2023-05-10freedreno/a6xx: Actually use LRZ for msRob Clark1-3/+13
2023-05-10freedreno/a6xx: Move LRZ clears to gmemRob Clark5-37/+96
2023-05-10freedreno/a6xx: New subpass on mid-frame clearsRob Clark3-13/+63
2023-05-10freedreno/a6xx: Per-subpass LRZRob Clark3-15/+65
2023-05-10freedreno/a6xx: Introduce batch subpassesRob Clark5-51/+145
2023-05-10freedreno/a6xx: Split tile loads and clearsRob Clark7-66/+105
2023-05-10freedreno/a6xx: Switch to batch->clearedRob Clark2-3/+3
2023-05-10freedreno/a6xx: Simplify per-tile conditional IBsRob Clark1-13/+17
2023-05-10freedreno/a6xx: Add ctx->emit_sysmem()Rob Clark4-12/+28
2023-05-10freedreno/a6xx: Move LRZ clear to blitterRob Clark3-113/+77
2023-05-10freedreno/batch: Add helper to set fb stateRob Clark4-1/+12
2023-05-10zink: disable always zs feedback loop on radvMike Blumenkrantz1-1/+0
2023-05-10anv: apply ANV_BO_ALLOC_IMPLICIT_SYNC for external memoryYiwei Zhang1-2/+5
2023-05-10ci: bump bin/ci/ deps to support python 3.11Eric Engestrom1-2/+2
2023-05-10pvr: add GUARD_SIZE_DEFAULT for CDM and VDM control stream links 1 and 2Luigi Santivetti3-11/+22
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