diff options
author | Georg Lehmann <dadschoorse@gmail.com> | 2023-05-03 11:24:19 +0200 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2023-05-11 10:26:24 +0000 |
commit | c1cf40da8a59c29542ac1e7988b4579c4aa89d6c (patch) | |
tree | efba32a35b159a4e4a752c91a8d40a2a4d896d90 | |
parent | d3f06cf5ce0764b37a03a0f2bfbb109a4d75884d (diff) |
aco: Assert that operands have the same byte offset when reassigning split vectors
This can not happen because the post-RA optimizer doesn't support sub dword
writes at the moment, but everytime I look at this I wonder if there might
be a bug here.
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22821>
-rw-r--r-- | src/amd/compiler/aco_optimizer_postRA.cpp | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/amd/compiler/aco_optimizer_postRA.cpp b/src/amd/compiler/aco_optimizer_postRA.cpp index a05f216c97f..b9dd52a87cb 100644 --- a/src/amd/compiler/aco_optimizer_postRA.cpp +++ b/src/amd/compiler/aco_optimizer_postRA.cpp @@ -657,6 +657,11 @@ try_reassign_split_vector(pr_opt_ctx& ctx, aco_ptr<Instruction>& instr) if (op.regClass() == s2 && reg.reg() % 2 != 0) break; + /* Sub dword operands might need updates to SDWA/opsel, + * but we only track full register writes at the moment. + */ + assert(op.physReg().byte() == reg.byte()); + /* If there is only one use (left), recolor the split_vector definition */ if (ctx.uses[op.tempId()] == 1) def.setFixed(reg); |