diff options
author | Jiadong Zhu <Jiadong.Zhu@amd.com> | 2023-05-06 17:35:05 +0800 |
---|---|---|
committer | Marge Bot <emma+marge@anholt.net> | 2023-05-10 17:11:19 +0000 |
commit | 3cfdcabc781a6ee1b9221190ae577ae57c50b729 (patch) | |
tree | 9facfb92d4eac57424715195789270bf002905ac | |
parent | 0e679e80a96ce916b9c2e0da993878ce512c9621 (diff) |
ac: enable SHADOW_GLOBAL_CONFIG for preemptible ib
SHADOW_GLOBAL_CONFIG is mandatory for mid command buffer preemmption.
Fixes: 69014d8c94f (radeonsi: implement CP register shadowing)
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22916>
-rw-r--r-- | src/amd/common/ac_shadowed_regs.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/amd/common/ac_shadowed_regs.c b/src/amd/common/ac_shadowed_regs.c index 834bda34bc5..c14541efaa8 100644 --- a/src/amd/common/ac_shadowed_regs.c +++ b/src/amd/common/ac_shadowed_regs.c @@ -4286,7 +4286,8 @@ void ac_create_shadowing_ib_preamble(const struct radeon_info *info, CC1_SHADOW_PER_CONTEXT_STATE(1) | CC1_SHADOW_CS_SH_REGS(1) | CC1_SHADOW_GFX_SH_REGS(1) | - CC1_SHADOW_GLOBAL_UCONFIG(1)); + CC1_SHADOW_GLOBAL_UCONFIG(1) | + CC1_SHADOW_GLOBAL_CONFIG(1)); if (!info->has_fw_based_shadowing) { for (unsigned i = 0; i < SI_NUM_SHADOWED_REG_RANGES; i++) |