diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/drm/i915_drm.h | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h index 7e9e9bd0..b40cb9c9 100644 --- a/include/drm/i915_drm.h +++ b/include/drm/i915_drm.h @@ -198,6 +198,7 @@ typedef struct _drm_i915_sarea { #define DRM_I915_GEM_SET_CACHEING 0x2f #define DRM_I915_GEM_GET_CACHEING 0x30 #define DRM_I915_REG_READ 0x31 +#define DRM_I915_GEM_CONTEXT_GET_RESET_STATUS 0x32 #define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) #define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) @@ -247,6 +248,7 @@ typedef struct _drm_i915_sarea { #define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) #define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) #define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) +#define DRM_IOCTL_I915_GEM_CONTEXT_GET_RESET_STATUS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_GET_RESET_STATUS, struct drm_i915_gem_context_create) /* Allow drivers to submit batchbuffers directly to hardware, relying * on the security mechanisms provided by hardware. @@ -303,6 +305,7 @@ typedef struct drm_i915_irq_wait { #define I915_PARAM_HAS_LLC 17 #define I915_PARAM_HAS_ALIASING_PPGTT 18 #define I915_PARAM_HAS_WAIT_TIMEOUT 19 +#define I915_PARAM_HAS_RESET_QUERY 23 typedef struct drm_i915_getparam { int param; @@ -941,4 +944,27 @@ struct drm_i915_reg_read { __u64 offset; __u64 val; /* Return value */ }; + +struct drm_i915_gem_context_get_reset_status { + __u32 ctx_id; + +#define INTEL_RESET_BATCH_PENDING (1U << 0) /**< A reset occured while a + * batch from this context was + * in-flight but not + * executing. + */ +#define INTEL_RESET_BATCH_ACTIVE (1U << 1) /**< A reset occured while a + * batch from this context was + * executing. + */ +#define INTEL_RESET_BATCH_UNKNOWN (1U << 2) /**< A reset occured while a + * batch from this context was + * was it an unknown state. + * It may or may not have been + * executing at the time of + * the reset. + */ + __u32 status; +}; + #endif /* _I915_DRM_H_ */ |