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authorZhao Yakui <yakui.zhao@intel.com>2016-11-20 14:41:45 -0500
committerXiang, Haihao <haihao.xiang@intel.com>2016-11-21 22:22:04 +0800
commit83da9f12b8aeddb2aae71e9d08490018fd71b752 (patch)
treed5b2facc12e246212ab1be9b819dc24d014cfc56
parentf5a9331acb971ee68843ede0dba73555ebb6fdf7 (diff)
Add the 10bit-scaling conversion for I010 format
I010 format is another kind of 10-bit surface. And its layout is similar to I420. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
-rw-r--r--src/gen75_picture_process.c45
1 files changed, 42 insertions, 3 deletions
diff --git a/src/gen75_picture_process.c b/src/gen75_picture_process.c
index 8097e02..46c4ed5 100644
--- a/src/gen75_picture_process.c
+++ b/src/gen75_picture_process.c
@@ -201,10 +201,49 @@ gen75_proc_picture(VADriverContextP ctx,
}
if (pipeline_param->num_filters == 0 || pipeline_param->filters == NULL ) {
- if ((obj_src_surf->fourcc == VA_FOURCC_P010) &&
+/* The Bit 2 is used to indicate that it is 10bit or 8bit.
+ * The Bit 0/1 is used to indicate the 420/422/444 format
+ */
+#define SRC_10BIT_420 (5 << 0)
+#define SRC_10BIT_422 (6 << 0)
+#define SRC_10BIT_444 (7 << 0)
+
+/* The Bit 6 is used to indicate that it is 10bit or 8bit.
+ * The Bit 5/4 is used to indicate the 420/422/444 format
+ */
+#define DST_10BIT_420 (5 << 4)
+#define DST_10BIT_422 (6 << 4)
+#define DST_10BIT_444 (7 << 4)
+
+/* This is mainly for YUY2/RGBA. It is reserved for further */
+#define SRC_YUV_PACKED (1 << 3)
+#define DST_YUV_PACKED (1 << 7)
+
+#define MASK_CSC (0xFF)
+#define SCALE_10BIT_420 (SRC_10BIT_420 | DST_10BIT_420)
+
+ unsigned int scale_flag;
+
+ scale_flag = 0;
+ if (obj_src_surf->fourcc == VA_FOURCC_P010 ||
+ obj_src_surf->fourcc == VA_FOURCC_I010)
+ scale_flag |= SRC_10BIT_420;
+
+ if (obj_dst_surf->fourcc == VA_FOURCC_P010 ||
+ obj_dst_surf->fourcc == VA_FOURCC_I010)
+ scale_flag |= DST_10BIT_420;
+
+ /* If P010 is converted without resolution change,
+ * fall back to VEBOX
+ */
+ if (i965->intel.has_vebox &&
+ (obj_src_surf->fourcc == VA_FOURCC_P010) &&
(obj_dst_surf->fourcc == VA_FOURCC_P010) &&
- (src_rect.width != dst_rect.width ||
- src_rect.height != dst_rect.height) &&
+ (src_rect.width == dst_rect.width) &&
+ (src_rect.height == dst_rect.height))
+ scale_flag = 0;
+
+ if (((scale_flag & MASK_CSC) == SCALE_10BIT_420) &&
intel_gpe_support_10bit_scaling(proc_ctx)) {
struct i965_proc_context *gpe_proc_ctx;
struct i965_surface src_surface, dst_surface;