diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2016-11-29 13:22:18 +0800 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2016-11-30 12:43:35 +0800 |
commit | 50c304245d5e07b61473579301cdabda76328e10 (patch) | |
tree | 1f65ec60834773b2c32700c8d35498a944bea0f0 | |
parent | 525a20d9363cd8ed56c75c5782c10aa28d480cdf (diff) |
Rename gen9_gpe_mi_load_register_xxx() to gen8_gpe_mi_load_register_xxx()
xxx is mem/imm/reg and the 3 functions can be used for GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-rw-r--r-- | src/gen9_vp9_encoder.c | 2 | ||||
-rw-r--r-- | src/i965_gpe_utils.c | 6 | ||||
-rw-r--r-- | src/i965_gpe_utils.h | 6 |
3 files changed, 7 insertions, 7 deletions
diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c index 537b390..3ea1537 100644 --- a/src/gen9_vp9_encoder.c +++ b/src/gen9_vp9_encoder.c @@ -5921,7 +5921,7 @@ gen9_vp9_pak_pipeline(VADriverContextP ctx, memset(&mi_load_reg_imm, 0, sizeof(mi_load_reg_imm)); mi_load_reg_imm.mmio_offset = status_buffer->vp9_image_ctrl_reg_offset; mi_load_reg_imm.data = 0; - gen9_gpe_mi_load_register_imm(ctx, batch, &mi_load_reg_imm); + gen8_gpe_mi_load_register_imm(ctx, batch, &mi_load_reg_imm); } gen9_vp9_pak_picture_level(ctx, encode_state, encoder_context); gen9_vp9_read_mfc_status(ctx, encoder_context); diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c index 1e2f9f3..d0eab7f 100644 --- a/src/i965_gpe_utils.c +++ b/src/i965_gpe_utils.c @@ -1548,7 +1548,7 @@ gen8_gpe_mi_store_register_mem(VADriverContextP ctx, } void -gen9_gpe_mi_load_register_mem(VADriverContextP ctx, +gen8_gpe_mi_load_register_mem(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_load_register_mem_parameter *params) { @@ -1561,7 +1561,7 @@ gen9_gpe_mi_load_register_mem(VADriverContextP ctx, } void -gen9_gpe_mi_load_register_imm(VADriverContextP ctx, +gen8_gpe_mi_load_register_imm(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_load_register_imm_parameter *params) { @@ -1571,7 +1571,7 @@ gen9_gpe_mi_load_register_imm(VADriverContextP ctx, } void -gen9_gpe_mi_load_register_reg(VADriverContextP ctx, +gen8_gpe_mi_load_register_reg(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_load_register_reg_parameter *params) { diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h index f8ee228..667ebf2 100644 --- a/src/i965_gpe_utils.h +++ b/src/i965_gpe_utils.h @@ -388,15 +388,15 @@ void gen8_gpe_mi_store_register_mem(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_store_register_mem_parameter *params); -void gen9_gpe_mi_load_register_mem(VADriverContextP ctx, +void gen8_gpe_mi_load_register_mem(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_load_register_mem_parameter *params); -void gen9_gpe_mi_load_register_imm(VADriverContextP ctx, +void gen8_gpe_mi_load_register_imm(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_load_register_imm_parameter *params); -void gen9_gpe_mi_load_register_reg(VADriverContextP ctx, +void gen8_gpe_mi_load_register_reg(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_load_register_reg_parameter *params); |