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AgeCommit message (Expand)AuthorFilesLines
2015-04-23R600/SI: Fix indirect addressing with a negative constant offsetTom Stellard1-0/+72
2015-04-23Thumb2: When applying branch optimizations, visit branches in reverse order.Peter Collingbourne1-0/+54
2015-04-23ARM: When re-creating a branch via InsertBranch, preserve CPSR flags.Peter Collingbourne2-3/+2
2015-04-23Thumb2: When optimizing for size, do not if-convert branches involving compar...Peter Collingbourne3-5/+52
2015-04-23ARM: When spilling extra registers for alignment, prefer low registers on all...Peter Collingbourne10-40/+40
2015-04-23ARM: Only enforce 4-byte alignment on Thumb-2 functions with constant pools.Peter Collingbourne2-2/+17
2015-04-23[getUnderlyingOjbects] Analyze loop PHIs further to remove false positivesAdam Nemet2-0/+138
2015-04-23[NVPTX] run SeparateConstOffsetFromGEP before SLSRJingyue Wu2-0/+76
2015-04-23R600/SI: Add missing -mcpu=SI to assembler testTom Stellard1-1/+1
2015-04-23R600/SI: Add assembler support for all CI and VI VOP1 instructionsTom Stellard1-62/+237
2015-04-23R600/SI: Improve AsmParser support for forced e64 encodingTom Stellard2-0/+16
2015-04-23Revert "[SEH] Remove the old __C_specific_handler code now that WinEHPrepare ...Reid Kleckner11-9/+185
2015-04-23[PowerPC] Enable printing instructions using aliasesHal Finkel53-1278/+1265
2015-04-23[AArch64] Add nvcast patterns for v4f16 and v8f16Pirama Arumuga Nainar1-0/+89
2015-04-23[AArch64] Handle vec4, vec8, vec16 *itofp for halfPirama Arumuga Nainar3-2/+303
2015-04-23Re-commit r235560: Switch lowering: extract jump tables and bit tests before ...Hans Wennborg10-147/+420
2015-04-23use update_llc_test_checks.py to tighten checking; remove unnecessary CPU paramSanjay Patel1-54/+43
2015-04-23[Hexagon] Shrink-wrap stack frame (Hexagon-specific)Krzysztof Parzyszek1-0/+36
2015-04-23[Hexagon] Add testcases for stack alignment and variable-sized objectsKrzysztof Parzyszek4-0/+89
2015-04-23Revert r235560; this commit was causing several failed assertions in Debug bu...Aaron Ballman10-420/+147
2015-04-23Be more strict about the operand for the array type in BitcodeReaderFilipe Cabecinhas2-0/+5
2015-04-23Verify sizes when trying to read a BitcodeAbbrevOpFilipe Cabecinhas3-0/+7
2015-04-23[DAGCombiner] Remove extra bitcasts surrounding vector shuffles Simon Pilgrim1-0/+64
2015-04-23Add support to interchange loops with reductions.Karthik Bhat1-0/+235
2015-04-23[WinEH] Removing seh-filter.ll until I can determine its validityAndrew Kaylor1-21/+0
2015-04-23[WinEH] Don't skip landing pads that end with an unreachable instruction.Andrew Kaylor2-0/+2
2015-04-22Switch lowering: extract jump tables and bit tests before building binary tre...Hans Wennborg10-147/+420
2015-04-22[InstCombine] Use a more targeted fix instead of r235544David Majnemer1-0/+12
2015-04-22[SEH] Remove the old __C_specific_handler code now that WinEHPrepare worksReid Kleckner11-185/+9
2015-04-22Unxfail passing test on HexagonKrzysztof Parzyszek1-2/+0
2015-04-22[Hexagon] Some cleanup of instruction selection codeKrzysztof Parzyszek6-16/+17
2015-04-22[WinEH] Demote values and phis live across exception handlers up frontReid Kleckner5-62/+190
2015-04-22[InstCombine] Clear out nsw/nuw if we modify computation in the chainDavid Majnemer1-0/+12
2015-04-22[Hexagon] Use A2_tfrsi for constant pool and jump table addressesKrzysztof Parzyszek2-3/+4
2015-04-22Fix correctness check for test_vec_fpextend_doublePirama Arumuga Nainar1-7/+9
2015-04-22R600: Fix always inline pass breaking noinline functionsMatt Arsenault1-10/+9
2015-04-22[x86] Add store-folded memop patterns for vcvtps2phSanjay Patel1-8/+52
2015-04-22Support arm32 R_ARM_V4BX relocation formatAdhemerval Zanella1-0/+77
2015-04-22Fix a type mismatch assert in SCEV divisionBrendon Cahoon1-0/+29
2015-04-22[X86][AVX] Fix failure due to a missing ISel pattern to select VBROADCAST nod...Andrea Di Biagio1-0/+14
2015-04-22[DAGCombine] Disable select(c, load,load) for indexed loadsHal Finkel1-0/+63
2015-04-22Revert "[mips][FastISel] Implement shift ops for Mips fast-isel."Vasileios Kalintiris1-122/+0
2015-04-22[AArch64] Disable complex GEP optimization by default.James Molloy1-3/+3
2015-04-22Have more strict type checks when creating BinOp nodes in BitcodeReaderFilipe Cabecinhas2-0/+5
2015-04-22[patchpoint] Add support for symbolic patchpoint targets to SelectionDAG and theLang Hames1-0/+16
2015-04-22Linker: Add flag to override linkage rulesDuncan P. N. Exon Smith8-0/+100
2015-04-22[x86] allow 64-bit extracted vector element integer stores on a 32-bit systemSanjay Patel1-1/+40
2015-04-22[WinEH] Correctly handle inlined __finally blocks with capturesReid Kleckner1-0/+48
2015-04-21Remove a zero-length file of llvm/test/Transforms/InstCombine/descale-zero.ll.NAKAMURA Takumi1-0/+0
2015-04-21Limiting gep merging to fix the performance problem described inWei Mi2-22/+2
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