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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-04-23 19:33:52 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-04-23 19:33:52 +0000 |
| commit | f0924551e6b27c6b65e61a7235fd1bafb79ab171 (patch) | |
| tree | 0e4ffd65f5002fb5418ab89a03ddfa80a76aff62 | |
| parent | bf02414898e8dddc93cb3cce123ba90bc0af5cd5 (diff) | |
R600/SI: v_mov_fed_b32 does not exist on VI
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235628 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/R600/SIInstructions.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstructions.td b/lib/Target/R600/SIInstructions.td index 91e8c8c236..dbd24d33a5 100644 --- a/lib/Target/R600/SIInstructions.td +++ b/lib/Target/R600/SIInstructions.td @@ -1272,7 +1272,6 @@ defm V_CVT_U32_F32 : VOP1Inst <vop1<0x7>, "v_cvt_u32_f32", defm V_CVT_I32_F32 : VOP1Inst <vop1<0x8>, "v_cvt_i32_f32", VOP_I32_F32, fp_to_sint >; -defm V_MOV_FED_B32 : VOP1Inst <vop1<0x9>, "v_mov_fed_b32", VOP_I32_I32>; defm V_CVT_F16_F32 : VOP1Inst <vop1<0xa>, "v_cvt_f16_f32", VOP_I32_F32, fp_to_f16 >; @@ -1408,6 +1407,7 @@ let SubtargetPredicate = isSICI in { let SchedRW = [WriteQuarterRate32] in { +defm V_MOV_FED_B32 : VOP1InstSI <vop1<0x9>, "v_mov_fed_b32", VOP_I32_I32>; defm V_LOG_CLAMP_F32 : VOP1InstSI <vop1<0x26>, "v_log_clamp_f32", VOP_F32_F32>; defm V_RCP_CLAMP_F32 : VOP1InstSI <vop1<0x28>, "v_rcp_clamp_f32", VOP_F32_F32>; defm V_RCP_LEGACY_F32 : VOP1InstSI <vop1<0x29>, "v_rcp_legacy_f32", VOP_F32_F32>; |