diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-06-08 15:54:13 +0200 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-06-08 15:55:50 +0200 |
commit | ac123b7ed1f7331e76f9a152aa564428fc20ea4a (patch) | |
tree | ae331856860c785c6c57162123aaf2b9c40fa507 | |
parent | dcad701ea7f7d3af9da4fd1b83b0c98d43ca6f26 (diff) |
radeondb: add r600 support to register dump tools
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
-rw-r--r-- | json/r600.json | 42247 | ||||
-rw-r--r-- | src/Makefile.am | 5 | ||||
-rw-r--r-- | src/r100_reg.c | 2 | ||||
-rw-r--r-- | src/radeon_reg.c | 37 | ||||
-rw-r--r-- | src/radeon_reg.h | 12 | ||||
-rw-r--r-- | tools/rdb.c | 2 |
6 files changed, 42302 insertions, 3 deletions
diff --git a/json/r600.json b/json/r600.json new file mode 100644 index 0000000..d2da672 --- /dev/null +++ b/json/r600.json @@ -0,0 +1,42247 @@ +{ + "block": [ + { + "0x00000000": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "SEQ_RST0B", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "SEQ_RST1B", + "value": [] + } + ], + "name": "SEQ00", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000001": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "SEQ_DOT8", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "SEQ_SHIFT2", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "SEQ_PCLKBY2", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "SEQ_SHIFT4", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "SEQ_MAXBW", + "value": [] + } + ], + "name": "SEQ01", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000002": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "SEQ_MAP0_EN", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "SEQ_MAP1_EN", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "SEQ_MAP2_EN", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "SEQ_MAP3_EN", + "value": [] + } + ], + "name": "SEQ02", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000003": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "SEQ_FONT_B1", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "SEQ_FONT_B2", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "SEQ_FONT_A1", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "SEQ_FONT_A2", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "SEQ_FONT_B0", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "SEQ_FONT_A0", + "value": [] + } + ], + "name": "SEQ03", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000004": { + "field": [ + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "SEQ_256K", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "SEQ_ODDEVEN", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "SEQ_CHAIN", + "value": [] + }, + { + "access": "RW", + "bf": 0, + "bl": 5, + "description": "", + "name": "VCRTC_IDX", + "value": [] + }, + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "VCRTC_DATA", + "value": [] + } + ], + "name": "SEQ04", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000005": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 4, + "description": "", + "name": "H_SYNC_END", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 6, + "description": "", + "name": "H_SYNC_SKEW", + "value": [] + }, + { + "access": "RW", + "bf": 7, + "bl": 7, + "description": "", + "name": "H_BLANK_END_B5", + "value": [] + } + ], + "name": "CRT05", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000006": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "V_TOTAL", + "value": [] + } + ], + "name": "CRT06", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000007": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "V_TOTAL_B8", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "V_DISP_END_B8", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "V_SYNC_START_B8", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "V_BLANK_START_B8", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "LINE_CMP_B8", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "V_TOTAL_B9", + "value": [] + }, + { + "access": "RW", + "bf": 6, + "bl": 6, + "description": "", + "name": "V_DISP_END_B9", + "value": [] + }, + { + "access": "RW", + "bf": 7, + "bl": 7, + "description": "", + "name": "V_SYNC_START_B9", + "value": [] + } + ], + "name": "CRT07", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000008": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 4, + "description": "", + "name": "ROW_SCAN_START", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 6, + "description": "", + "name": "BYTE_PAN", + "value": [] + } + ], + "name": "CRT08", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000009": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 4, + "description": "", + "name": "MAX_ROW_SCAN", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "V_BLANK_START_B9", + "value": [] + }, + { + "access": "RW", + "bf": 6, + "bl": 6, + "description": "", + "name": "LINE_CMP_B9", + "value": [] + }, + { + "access": "RW", + "bf": 7, + "bl": 7, + "description": "", + "name": "DOUBLE_CHAR_HEIGHT", + "value": [] + } + ], + "name": "CRT09", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x0000000A": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 4, + "description": "", + "name": "CURSOR_START", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "CURSOR_DISABLE", + "value": [] + } + ], + "name": "CRT0A", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x0000000B": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 4, + "description": "", + "name": "CURSOR_END", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 6, + "description": "", + "name": "CURSOR_SKEW", + "value": [] + } + ], + "name": "CRT0B", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x0000000C": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "DISP_START", + "value": [] + } + ], + "name": "CRT0C", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x0000000D": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "DISP_START", + "value": [] + } + ], + "name": "CRT0D", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x0000000E": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "CURSOR_LOC_HI", + "value": [] + } + ], + "name": "CRT0E", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x0000000F": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "CURSOR_LOC_LO", + "value": [] + } + ], + "name": "CRT0F", + "size": 8, + "unit": [ + "VGA" + ] + }, + "0x00000010": { + "field": [ + { + "access": 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"description": "", + "name": "LVTMA_SYNC_CHAR_PATTERN2", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 25, + "description": "", + "name": "LVTMA_SYNC_CHAR_PATTERN3", + "value": [] + } + ], + "name": "LVTMA_SYNC_CHAR_PATTERN_2_3", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AB0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_CRC_EN", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "LVTMA_CRC_CONT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_CRC_ONLY_BLANKb", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "LVTMA_CRC_FIELD", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "LVTMA_2ND_CRC_EN", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 20, + "description": "", + "name": "LVTMA_2ND_CRC_LINK_SEL", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 25, + "description": "", + "name": "LVTMA_2ND_CRC_DATA_SEL", + "value": [] + } + ], + "name": "LVTMA_CRC_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AB4": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "LVTMA_CRC_SIG_BLUE_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 15, + "description": "", + "name": "LVTMA_CRC_SIG_GREEN_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 23, + "description": "", + "name": "LVTMA_CRC_SIG_RED_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 26, + "description": "", + "name": "LVTMA_CRC_SIG_CONTROL_MASK", + "value": [] + } + ], + "name": "LVTMA_CRC_SIG_MASK", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AB8": { + "field": [], + "name": "LVTMA_CRC_SIG_RGB", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007ABC": { + "field": [], + "name": "LVTMA_2ND_CRC_RESULT", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AC0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_TEST_PATTERN_OUT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "LVTMA_HALF_CLOCK_PATTERN_SEL", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "LVTMA_LVTM_TEST_CLOCK_DATA", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "LVTMA_RANDOM_PATTERN_OUT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "LVTMA_RANDOM_PATTERN_RESET", + "value": [] + }, + { + "access": "RW", + "bf": 6, + "bl": 6, + "description": "", + "name": "LVTMA_TEST_PATTERN_EXTERNAL_R", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_LVTM_EYE_PATTERN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 25, + "description": "", + "name": "LVTMA_STATIC_TEST_PATTERN", + "value": [] + } + ], + "name": "LVTMA_TEST_PATTERN", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AC4": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 23, + "description": "", + "name": "LVTMA_RANDOM_PATTERN_SEED", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "LVTMA_RAN_PAT_DURING_DE_ONLY", + "value": [] + } + ], + "name": "LVTMA_RANDOM_PATTERN_SEED", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AC8": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_DEBUG_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_DEBUG_HSYNC", + "value": [] + }, + { + "access": "RW", + "bf": 9, + "bl": 9, + "description": "", + "name": "LVTMA_DEBUG_HSYNC_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "LVTMA_DEBUG_VSYNC", + "value": [] + }, + { + "access": "RW", + "bf": 17, + "bl": 17, + "description": "", + "name": "LVTMA_DEBUG_VSYNC_EN", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "LVTMA_DEBUG_DE", + "value": [] + }, + { + "access": "RW", + "bf": 25, + "bl": 25, + "description": "", + "name": "LVTMA_DEBUG_DE_EN", + "value": [] + } + ], + "name": "LVTMA_DEBUG", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007ACC": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_CTL0", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_CTL1", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "LVTMA_CTL2", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "LVTMA_CTL3", + "value": [] + } + ], + "name": "LVTMA_CTL_BITS", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AD0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_DCBALANCER_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_DCBALANCER_TEST_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 19, + "description": "", + "name": "LVTMA_DCBALANCER_TEST_IN", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "LVTMA_DCBALANCER_FORCE", + "value": [] + } + ], + "name": "LVTMA_DCBALANCER_CONTROL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AD4": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_RB_SWITCH_EN", + "value": [] + } + ], + "name": "LVTMA_RED_BLUE_SWITCH", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007ADC": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_DSYNSEL", + "value": [] + } + ], + "name": "LVTMA_DATA_SYNCHRONIZATION", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AE0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 3, + "description": "", + "name": "LVTMA_CTL0_DATA_SEL", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 6, + "description": "", + "name": "LVTMA_CTL0_DATA_DELAY", + "value": [] + }, + { + "access": "RW", + "bf": 7, + "bl": 7, + "description": "", + "name": "LVTMA_CTL0_DATA_INVERT", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 9, + "description": "", + "name": "LVTMA_CTL0_DATA_MODULATION", + "value": [] + }, + { + "access": "RW", + "bf": 10, + "bl": 10, + "description": "", + "name": "LVTMA_CTL0_USE_FEEDBACK_PATH", + "value": [] + }, + { + "access": "RW", + "bf": 11, + "bl": 11, + "description": "", + "name": "LVTMA_CTL0_FB_SYNC_CONT", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "LVTMA_CTL0_PATTERN_OUT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 19, + "description": "", + "name": "LVTMA_CTL1_DATA_SEL", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 22, + "description": "", + "name": "LVTMA_CTL1_DATA_DELAY", + "value": [] + }, + { + "access": "RW", + "bf": 23, + "bl": 23, + "description": "", + "name": "LVTMA_CTL1_DATA_INVERT", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 25, + "description": "", + "name": "LVTMA_CTL1_DATA_MODULATION", + "value": [] + }, + { + "access": "RW", + "bf": 26, + "bl": 26, + "description": "", + "name": "LVTMA_CTL1_USE_FEEDBACK_PATH", + "value": [] + }, + { + "access": "RW", + "bf": 27, + "bl": 27, + "description": "", + "name": "LVTMA_CTL1_FB_SYNC_CONT", + "value": [] + }, + { + "access": "RW", + "bf": 28, + "bl": 28, + "description": "", + "name": "LVTMA_CTL1_PATTERN_OUT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 31, + "bl": 31, + "description": "", + "name": "LVTMA_2BIT_COUNTER_EN", + "value": [] + } + ], + "name": "LVTMA_CTL0_1_GEN_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AE4": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 3, + "description": "", + "name": "LVTMA_CTL2_DATA_SEL", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 6, + "description": "", + "name": "LVTMA_CTL2_DATA_DELAY", + "value": [] + }, + { + "access": "RW", + "bf": 7, + "bl": 7, + "description": "", + "name": "LVTMA_CTL2_DATA_INVERT", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 9, + "description": "", + "name": "LVTMA_CTL2_DATA_MODULATION", + "value": [] + }, + { + "access": "RW", + "bf": 10, + "bl": 10, + "description": "", + "name": "LVTMA_CTL2_USE_FEEDBACK_PATH", + "value": [] + }, + { + "access": "RW", + "bf": 11, + "bl": 11, + "description": "", + "name": "LVTMA_CTL2_FB_SYNC_CONT", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "LVTMA_CTL2_PATTERN_OUT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 19, + "description": "", + "name": "LVTMA_CTL3_DATA_SEL", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 22, + "description": "", + "name": "LVTMA_CTL3_DATA_DELAY", + "value": [] + }, + { + "access": "RW", + "bf": 23, + "bl": 23, + "description": "", + "name": "LVTMA_CTL3_DATA_INVERT", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 25, + "description": "", + "name": "LVTMA_CTL3_DATA_MODULATION", + "value": [] + }, + { + "access": "RW", + "bf": 26, + "bl": 26, + "description": "", + "name": "LVTMA_CTL3_USE_FEEDBACK_PATH", + "value": [] + }, + { + "access": "RW", + "bf": 27, + "bl": 27, + "description": "", + "name": "LVTMA_CTL3_FB_SYNC_CONT", + "value": [] + }, + { + "access": "RW", + "bf": 28, + "bl": 28, + "description": "", + "name": "LVTMA_CTL3_PATTERN_OUT_EN", + "value": [] + } + ], + "name": "LVTMA_CTL2_3_GEN_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AE8": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 11, + "description": "", + "name": "LVTMA_PWRSEQ_REF_DIV", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 27, + "description": "", + "name": "LVTMA_BL_MOD_REF_DIV", + "value": [] + } + ], + "name": "LVTMA_PWRSEQ_REF_DIV", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AEC": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "LVTMA_PWRUP_DELAY1", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 15, + "description": "", + "name": "LVTMA_PWRUP_DELAY2", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 23, + "description": "", + "name": "LVTMA_PWRDN_DELAY1", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 31, + "description": "", + "name": "LVTMA_PWRDN_DELAY2", + "value": [] + } + ], + "name": "LVTMA_PWRSEQ_DELAY1", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AF0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "LVTMA_PWRDN_MIN_LENGTH", + "value": [] + } + ], + "name": "LVTMA_PWRSEQ_DELAY2", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AF4": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_PWRSEQ_EN", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "LVTMA_PWRSEQ_DISABLE_SYNCEN_", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "LVTMA_PLL_ENABLE_PWRSEQ_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "LVTMA_PLL_RESET_PWRSEQ_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "LVTMA_PWRSEQ_TARGET_STATE", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_SYNCEN", + "value": [] + }, + { + "access": "RW", + "bf": 9, + "bl": 9, + "description": "", + "name": "LVTMA_SYNCEN_OVRD", + "value": [] + }, + { + "access": "RW", + "bf": 10, + "bl": 10, + "description": "", + "name": "LVTMA_SYNCEN_POL", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "LVTMA_DIGON", + "value": [] + }, + { + "access": "RW", + "bf": 17, + "bl": 17, + "description": "", + "name": "LVTMA_DIGON_OVRD", + "value": [] + }, + { + "access": "RW", + "bf": 18, + "bl": 18, + "description": "", + "name": "LVTMA_DIGON_POL", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "LVTMA_BLON", + "value": [] + }, + { + "access": "RW", + "bf": 25, + "bl": 25, + "description": "", + "name": "LVTMA_BLON_OVRD", + "value": [] + }, + { + "access": "RW", + "bf": 26, + "bl": 26, + "description": "", + "name": "LVTMA_BLON_POL", + "value": [] + } + ], + "name": "LVTMA_PWRSEQ_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AF8": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_PWRSEQ_TARGET_STATE_R", + "value": [] + } + ], + "name": "LVTMA_PWRSEQ_STATE", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007AFC": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_BL_MOD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 15, + "description": "", + "name": "LVTMA_BL_MOD_LEVEL", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 23, + "description": "", + "name": "LVTMA_BL_MOD_RES", + "value": [] + } + ], + "name": "LVTMA_BL_MOD_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007B00": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_LVTM_24BIT_ENABLE", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "LVTMA_LVTM_24BIT_FORMAT", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "LVTMA_LVTM_2ND_CHAN_DE", + "value": [] + }, + { + "access": "RW", + "bf": 9, + "bl": 9, + "description": "", + "name": "LVTMA_LVTM_2ND_CHAN_VS", + "value": [] + }, + { + "access": "RW", + "bf": 10, + "bl": 10, + "description": "", + "name": "LVTMA_LVTM_2ND_CHAN_HS", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 14, + "description": "", + "name": "LVTMA_LVTM_2ND_LINK_CNTL_BITS", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "LVTMA_LVTM_FP_POL", + "value": [] + }, + { + "access": "RW", + "bf": 17, + "bl": 17, + "description": "", + "name": "LVTMA_LVTM_LP_POL", + "value": [] + }, + { + "access": "RW", + "bf": 18, + "bl": 18, + "description": "", + "name": "LVTMA_LVTM_DTMG_POL", + "value": [] + } + ], + "name": "LVTMA_LVTM_DATA_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007B04": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_TMDS_LVTMb", + "value": [] + } + ], + "name": "LVTMA_MODE", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007B08": { + "field": [ + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "LVTMA_LNKC0EN", + "value": [] + }, + { + "access": "RW", + "bf": 2, + "bl": 2, + "description": "", + "name": "LVTMA_LNKD00EN", + "value": [] + }, + { + "access": "RW", + "bf": 3, + "bl": 3, + "description": "", + "name": "LVTMA_LNKD01EN", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "LVTMA_LNKD02EN", + "value": [] + }, + { + "access": "RW", + "bf": 5, + "bl": 5, + "description": "", + "name": "LVTMA_LNKD03EN", + "value": [] + }, + { + "access": "RW", + "bf": 9, + "bl": 9, + "description": "", + "name": "LVTMA_LNKC1EN", + "value": [] + }, + { + "access": "RW", + "bf": 10, + "bl": 10, + "description": "", + "name": "LVTMA_LNKD10EN", + "value": [] + }, + { + "access": "RW", + "bf": 11, + "bl": 11, + "description": "", + "name": "LVTMA_LNKD11EN", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "LVTMA_LNKD12EN", + "value": [] + }, + { + "access": "RW", + "bf": 13, + "bl": 13, + "description": "", + "name": "LVTMA_LNKD13EN", + "value": [] + }, + { + "access": "RW", + "bf": 17, + "bl": 17, + "description": "", + "name": "LVTMA_LNKCEN_HPD_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 18, + "bl": 18, + "description": "", + "name": "LVTMA_LNKDEN_HPD_MASK", + "value": [] + } + ], + "name": "LVTMA_TRANSMITTER_ENABLE", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007B0C": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "LVTMA_LOAD_DETECT_ENABLE", + "value": [] + } + ], + "name": "LVTMA_LOAD_DETECT", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007B10": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 5, + "description": "", + "name": "LVTMA_PLL_CP_GAIN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 13, + "description": "", + "name": "LVTMA_PLL_VCO_GAIN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 19, + "description": "", + "name": "LVTMA_PLL_DUTY_CYCLE", + "value": [] + }, + { + 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"", + "name": "DC_GPIO_DDC3CLK_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_DDC3DATA_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "DC_GPIO_DDC3DATA_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 14, + "bl": 14, + "description": "", + "name": "DC_GPIO_DDC3DATA_PU_EN", + "value": [] + } + ], + "name": "DC_GPIO_DDC3_MASK", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E64": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_DDC3CLK_A", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_DDC3DATA_A", + "value": [] + } + ], + "name": "DC_GPIO_DDC3_A", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E68": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_DDC3CLK_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_DDC3DATA_EN", + "value": [] + } + ], + "name": "DC_GPIO_DDC3_EN", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E6C": { + "field": [], + "name": "DC_GPIO_DDC3_Y", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E70": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HSYNCA_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "DC_GPIO_HSYNCA_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 6, + "bl": 6, + "description": "", + "name": "DC_GPIO_HSYNCA_PU_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_VSYNCA_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "DC_GPIO_VSYNCA_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 14, + "bl": 14, + "description": "", + "name": "DC_GPIO_VSYNCA_PU_EN", + "value": [] + } + ], + "name": "DC_GPIO_SYNCA_MASK", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E74": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HSYNCA_A", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_VSYNCA_A", + "value": [] + } + ], + "name": "DC_GPIO_SYNCA_A", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E78": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HSYNCA_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_VSYNCA_EN", + "value": [] + } + ], + "name": "DC_GPIO_SYNCA_EN", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E7C": { + "field": [], + "name": "DC_GPIO_SYNCA_Y", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E80": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HSYNCB_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_VSYNCB_MASK", + "value": [] + } + ], + "name": "DC_GPIO_SYNCB_MASK", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E84": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HSYNCB_A", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_VSYNCB_A", + "value": [] + } + ], + "name": "DC_GPIO_SYNCB_A", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E88": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HSYNCB_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_VSYNCB_EN", + "value": [] + } + ], + "name": "DC_GPIO_SYNCB_EN", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E8C": { + "field": [], + "name": "DC_GPIO_SYNCB_Y", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E90": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HPD1_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "DC_GPIO_HPD1_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 6, + "bl": 6, + "description": "", + "name": "DC_GPIO_HPD1_PU_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_HPD2_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DC_GPIO_HPD3_MASK", + "value": [] + } + ], + "name": "DC_GPIO_HPD_MASK", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E94": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HPD1_A", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_HPD2_A", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DC_GPIO_HPD3_A", + "value": [] + } + ], + "name": "DC_GPIO_HPD_A", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E98": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_HPD1_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_HPD2_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DC_GPIO_HPD3_EN", + "value": [] + } + ], + "name": "DC_GPIO_HPD_EN", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007E9C": { + "field": [], + "name": "DC_GPIO_HPD_Y", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EA0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_BLON_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "DC_GPIO_BLON_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 6, + "bl": 6, + "description": "", + "name": "DC_GPIO_BLON_PU_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_DIGON_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "DC_GPIO_DIGON_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 14, + "bl": 14, + "description": "", + "name": "DC_GPIO_DIGON_PU_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DC_GPIO_ENA_BL_MASK", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 20, + "description": "", + "name": "DC_GPIO_ENA_BL_PD_EN", + "value": [] + }, + { + "access": "RW", + "bf": 22, + "bl": 22, + "description": "", + "name": "DC_GPIO_ENA_BL_PU_EN", + "value": [] + } + ], + "name": "DC_GPIO_PWRSEQ_MASK", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EA4": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_BLON_A", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_DIGON_A", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DC_GPIO_ENA_BL_A", + "value": [] + } + ], + "name": "DC_GPIO_PWRSEQ_A", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EA8": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "DC_GPIO_BLON_EN", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "DC_GPIO_DIGON_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DC_GPIO_ENA_BL_EN", + "value": [] + } + ], + "name": "DC_GPIO_PWRSEQ_EN", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EAC": { + "field": [], + "name": "DC_GPIO_PWRSEQ_Y", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007ED0": { + "field": [ + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "DACA_CAPTURE_START_INT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 13, + "bl": 13, + "description": "", + "name": "DACB_CAPTURE_START_INT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 14, + "bl": 14, + "description": "", + "name": "TMDSA_CAPTURE_START_INT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 15, + "bl": 15, + "description": "", + "name": "LVTMA_CAPTURE_START_INT_EN", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "DVOA_CAPTURE_START_INT_EN", + "value": [] + } + ], + "name": "CAPTURE_START_STATUS", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007ED4": { + "field": [ + { + "access": "RW", + "bf": 24, + "bl": 27, + "description": "", + "name": "SYNC_STRENGTH_SN", + "value": [] + }, + { + "access": "RW", + "bf": 28, + "bl": 31, + "description": "", + "name": "SYNC_STRENGTH_SP", + "value": [] + } + ], + "name": "DC_GPIO_PAD_STRENGTH_1", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007ED8": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 3, + "description": "", + "name": "STRENGTH_SN", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 7, + "description": "", + "name": "STRENGTH_SP", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 19, + "description": "", + "name": "PWRSEQ_STRENGTH_SN", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 23, + "description": "", + "name": "PWRSEQ_STRENGTH_SP", + "value": [] + } + ], + "name": "DC_GPIO_PAD_STRENGTH_2", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EDC": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "SCL_DISP1_MODE_CHANGE_INTERRU", + "value": [] + }, + { + "access": "RW", + "bf": 1, + "bl": 1, + "description": "", + "name": "SCL_DISP2_MODE_CHANGE_INTERRU", + "value": [] + }, + { + "access": "RW", + "bf": 7, + "bl": 7, + "description": "", + "name": "CRTC1_FORCE_VSYNC_NEXT_LINE_I", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "CRTC1_FORCE_COUNT_NOW_INTERR", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "CRTC2_FORCE_VSYNC_NEXT_LINE_I", + "value": [] + }, + { + "access": "RW", + "bf": 13, + "bl": 13, + "description": "", + "name": "CRTC2_FORCE_COUNT_NOW_INTERR", + "value": [] + }, + { + "access": "RW", + "bf": 18, + "bl": 18, + "description": "", + "name": "DC_HOT_PLUG_DETECT1_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 19, + "bl": 19, + "description": "", + "name": "DC_HOT_PLUG_DETECT2_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 23, + "bl": 23, + "description": "", + "name": "DACA_CAPTURE_START_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "DACB_CAPTURE_START_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 25, + "bl": 25, + "description": "", + "name": "TMDSA_CAPTURE_START_INTERRUP", + "value": [] + }, + { + "access": "RW", + "bf": 26, + "bl": 26, + "description": "", + "name": "LVTMA_CAPTURE_START_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 27, + "bl": 27, + "description": "", + "name": "DVOA_CAPTURE_START_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 31, + "bl": 31, + "description": "", + "name": "DISP_INTERRUPT_STATUS_CONTINU", + "value": [] + } + ], + "name": "DISP_INTERRUPT_STATUS", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EE0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "PWRDN_WAIT_BUSY_OFF", + "value": [] + }, + { + "access": "RW", + "bf": 4, + "bl": 4, + "description": "", + "name": "PWRDN_WAIT_PWRSEQ_OFF", + "value": [] + }, + { + "access": "RW", + "bf": 8, + "bl": 8, + "description": "", + "name": "PWRDN_WAIT_PPLL_OFF", + "value": [] + }, + { + "access": "RW", + "bf": 12, + "bl": 12, + "description": "", + "name": "PWRUP_WAIT_PPLL_ON", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "PWRUP_WAIT_MEM_INIT_DONE", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 20, + "description": "", + "name": "PM_ASSERT_RESET", + "value": [] + }, + { + "access": "RW", + "bf": 24, + "bl": 24, + "description": "", + "name": "PM_PWRDN_PPLL", + "value": [] + } + ], + "name": "DOUT_POWER_MANAGEMENT_CNTL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EE8": { + "field": [ + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + "name": "D1MODE_DATA_UNDERFLOW_INTERR", + "value": [] + }, + { + "access": "RW", + "bf": 17, + "bl": 17, + "description": "", + "name": "D1MODE_REQUEST_UNDERFLOW_IN", + "value": [] + }, + { + "access": "RW", + "bf": 18, + "bl": 18, + "description": "", + "name": "D1SCL_DATA_UNDERFLOW_INTERRU", + "value": [] + }, + { + "access": "RW", + "bf": 19, + "bl": 19, + "description": "", + "name": "D1SCL_HOST_CONFLICT_INTERRUPT", + "value": [] + }, + { + "access": "RW", + "bf": 20, + "bl": 20, + "description": "", + "name": "D2MODE_DATA_UNDERFLOW_INTERR", + "value": [] + }, + { + "access": "RW", + "bf": 21, + "bl": 21, + "description": "", + "name": "D2MODE_REQUEST_UNDERFLOW_IN", + "value": [] + }, + { + "access": "RW", + "bf": 22, + "bl": 22, + "description": "", + "name": "D2SCL_DATA_UNDERFLOW_INTERRU", + "value": [] + }, + { + "access": "RW", + "bf": 23, + "bl": 23, + "description": "", + "name": "D2SCL_HOST_CONFLICT_INTERRUPT", + "value": [] + } + ], + "name": "DISP_INTERRUPT_STATUS_CONTINUE", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00007EF0": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 24, + "description": "", + "name": "DISP_TIMER_INT_COUNT", + "value": [] + }, + { + "access": "RW", + "bf": 27, + "bl": 27, + "description": "", + "name": "DISP_TIMER_INT_MSK", + "value": [] + } + ], + "name": "DISP_TIMER_CONTROL", + "size": 32, + "unit": [ + "DISP" + ] + }, + "0x00008000": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 7, + "description": "", + "name": "GRBM_READ_TIMEOUT", + "value": [] + } + ], + "name": "GRBM_CNTL", + "size": 32, + "unit": [ + "GRBM" + ] + }, + "0x00008010": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 4, + "description": "", + "name": "CMDFIFO_AVAIL", + "value": [] + } + ], + "name": "GRBM_STATUS", + "size": 32, + "unit": [ + "GRBM" + ] + }, + "0x00008014": { + "field": [], + "name": "GRBM_STATUS2", + "size": 32, + "unit": [ + "GRBM" + ] + }, + "0x00008020": { + "field": [ + { + "access": "RW", + "bf": 0, + "bl": 0, + "description": "", + "name": "SOFT_RESET_CP", + "value": [] + } + ], + "name": "GRBM_SOFT_RESET", + "size": 32, + "unit": [ + "GRBM" + ] + }, + "0x00008040": { + "field": [ + { + "access": "RW", + "bf": 14, + "bl": 14, + "description": "", + "name": "WAIT_2D_IDLE", + "value": [] + }, + { + "access": "RW", + "bf": 15, + "bl": 15, + "description": "", + "name": "WAIT_3D_IDLE", + "value": [] + }, + { + "access": "RW", + "bf": 16, + "bl": 16, + "description": "", + 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\ No newline at end of file diff --git a/src/Makefile.am b/src/Makefile.am index 706d031..18ee294 100644 --- a/src/Makefile.am +++ b/src/Makefile.am @@ -30,7 +30,7 @@ noinst_HEADER = radeon.h radeon_priv.h r600_states.h mode.h radeondb_SOURCES = radeondb.c bof.c radeon_pciid.c radeon_ctx.c radeon_bof.c\ radeon_json.c r600_state.c r600_ctx.c mode.c radeon.c radeon_state.c\ radeon_draw.c radeon_bo.c radeon_pci.c radeon_reg.c rs600_reg.c\ - r600_disassembler.c r100_reg.c + r600_disassembler.c r100_reg.c r600_reg.c radeondb_LDADD = $(LIBJANSSON_LIBS) $(LIBDRM_LIBS) $(LIBDRM_RADEON_LIBS) $(PCIACCESS_LIBS) rs600_reg.c: ../json/rs600.json ../tools/rdb.c @@ -38,3 +38,6 @@ rs600_reg.c: ../json/rs600.json ../tools/rdb.c r100_reg.c: ../json/r100.json ../tools/rdb.c ../tools/rdb -j ../json/r100.json -h r100 > r100_reg.c + +r600_reg.c: ../json/r600.json ../tools/rdb.c + ../tools/rdb -j ../json/r600.json -h r600 > r600_reg.c diff --git a/src/r100_reg.c b/src/r100_reg.c index 28ba1af..d6fac63 100644 --- a/src/r100_reg.c +++ b/src/r100_reg.c @@ -5,7 +5,7 @@ struct reg_block r100_block[] = { {0x00000001, "DISP"}, }; -unsigned r100_nblock = 2; +unsigned r100_nblock = 1; struct reg r100_reg[] = { {0x00000001, 0x00000001, "CLK_PIN_CNTL", r100_CLK_rreg, r100_CLK_wreg}, diff --git a/src/radeon_reg.c b/src/radeon_reg.c index a2aef70..a992752 100644 --- a/src/radeon_reg.c +++ b/src/radeon_reg.c @@ -70,6 +70,11 @@ void radeon_register_dump(const char *bname) case CHIP_RV635: case CHIP_RS780: case CHIP_RS880: + block = r600_block; + reg = r600_reg; + nblock = r600_nblock; + nreg = r600_nreg; + break; case CHIP_RV770: case CHIP_RV730: case CHIP_RV710: @@ -202,3 +207,35 @@ void rs600_MC_wreg(struct radeon *radeon, u32 offset, u32 value) radeon_mmio_wr32(radeon, 0x0070, (offset & 0xFFFF) | (1 << 21) | (1 << 23)); radeon_mmio_wr32(radeon, 0x0074, value); } + +/* R600 */ +u32 r600_MMIO_rreg(struct radeon *radeon, u32 offset) +{ + return radeon_mmio_rd32(radeon, offset); +} + +void r600_MMIO_wreg(struct radeon *radeon, u32 offset, u32 value) +{ + radeon_mmio_wr32(radeon, offset, value); +} + +u32 r600_VGA_rreg(struct radeon *radeon, u32 offset) +{ + return 0xFFFFF; +} + +void r600_VGA_wreg(struct radeon *radeon, u32 offset, u32 value) +{ +} + +u32 r600_PCIE_rreg(struct radeon *radeon, u32 offset) +{ + radeon_mmio_wr32(radeon, 0x0030, offset & 0xFF); + return radeon_mmio_rd32(radeon, 0x0034); +} + +void r600_PCIE_wreg(struct radeon *radeon, u32 offset, u32 value) +{ + radeon_mmio_wr32(radeon, 0x0030, offset & 0xFF); + radeon_mmio_wr32(radeon, 0x0034, value); +} diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 62f80b6..4a69df3 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -67,4 +67,16 @@ extern struct reg rs600_reg[]; extern unsigned rs600_nblock; extern unsigned rs600_nreg; +/* R600 */ +u32 r600_MMIO_rreg(struct radeon *radeon, u32 offset); +void r600_MMIO_wreg(struct radeon *radeon, u32 offset, u32 value); +u32 r600_VGA_rreg(struct radeon *radeon, u32 offset); +void r600_VGA_wreg(struct radeon *radeon, u32 offset, u32 value); +u32 r600_PCIE_rreg(struct radeon *radeon, u32 offset); +void r600_PCIE_wreg(struct radeon *radeon, u32 offset, u32 value); +extern struct reg_block r600_block[]; +extern struct reg r600_reg[]; +extern unsigned r600_nblock; +extern unsigned r600_nreg; + #endif diff --git a/tools/rdb.c b/tools/rdb.c index b34321e..37bb45f 100644 --- a/tools/rdb.c +++ b/tools/rdb.c @@ -143,7 +143,7 @@ int main(int argc, char *argv[]) printf("\t{0x%08X, \"%s\"},\n", 1 << i, json_string_value(tmp)); } printf("};\n\n"); - printf("unsigned %s_nblock = %d;\n\n", param.header_name, json_array_size(rdb->block)); + printf("unsigned %s_nblock = %d;\n\n", param.header_name, json_array_size(rdb->unit)); printf("struct reg %s_reg[] = {\n", param.header_name); for (i = 0, c = 0; i < json_array_size(rdb->block); i++) { |