diff options
Diffstat (limited to 'r600_atom.c')
-rw-r--r-- | r600_atom.c | 62 |
1 files changed, 30 insertions, 32 deletions
diff --git a/r600_atom.c b/r600_atom.c index 12417d1..930490b 100644 --- a/r600_atom.c +++ b/r600_atom.c @@ -17,9 +17,6 @@ #include "r600.h" #include "r600d.h" -/* FIXME delete */ -void r600_tflat(struct r600_atom *atom); - /* * drm_r600_framebuffer */ @@ -159,7 +156,6 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo atom->pkts[atom->npkts++] = 0x0000008E; atom->pkts[atom->npkts++] = cb_target_mask; atom->pkts[atom->npkts++] = cb_shader_mask; - r600_tflat(atom); fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -540,8 +536,7 @@ int r600_fs_shader_emit(struct r600_winsys *rdev, int r; atom->pkts[4] = radeon_ib_reloc(ib, atom->bo[0], RADEON_GEM_DOMAIN_GTT); - r = radeon_ib_copy(ib, atom->pkts, atom->npkts); - return r; + return radeon_ib_copy(ib, atom->pkts, atom->npkts); } int r600_fs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) @@ -592,31 +587,34 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } -#define WPKT(a) (atom->pkts[atom->npkts++] = (a)) -#define WPKT_RELOC(s)\ - do {\ - WPKT(PKT3(PKT3_NOP, 0));\ - if (!strcmp("bo", s)) {\ - fprintf(stderr, "cb->pkts[%d] = radeon_ib_reloc(ib, cb->"s", cb->placements[0] | cb->placements[1]);\n", atom->npkts);\ - } else {\ - fprintf(stderr, "cb->pkts[%d] = radeon_ib_reloc(ib, cb->"s", RADEON_GEM_DOMAIN_GTT);\n", atom->npkts);\ - }\ - WPKT(0x00000000);\ - } while (0) -void r600_tflat(struct r600_atom *atom) +int r600_draw_cmd_size(struct drm_r600_batch *batch) +{ + switch (G_0287F0_SOURCE_SELECT(batch->vgt_draw_initiator)) { + case 2: + return 10; + default: + return 0; + } +} + +int r600_draw_cmd_emit(struct radeon_ib *ib, struct drm_r600_batch *batch) { - WPKT(PKT3(PKT3_SET_CONTEXT_REG, 2)); - WPKT(0x00000094); - WPKT(0x80000000); - WPKT(0x00FA00FA); - WPKT(PKT3(PKT3_SET_CONFIG_REG, 1)); - WPKT(0x00000256); - WPKT(0x00000005); - WPKT(PKT3(PKT3_INDEX_TYPE, 0)); - WPKT(0x00000000); - WPKT(PKT3(PKT3_NUM_INSTANCES, 0)); - WPKT(0x00000001); - WPKT(PKT3(PKT3_DRAW_INDEX_AUTO, 1)); - WPKT(0x00000004); - WPKT(0x00000002); + u32 pkts[32], i = 0; + + switch (G_0287F0_SOURCE_SELECT(batch->vgt_draw_initiator)) { + case 2: + pkts[i++] = PKT3(PKT3_SET_CONFIG_REG, 1); + pkts[i++] = 0x00000256; + pkts[i++] = batch->vgt_primitive_type; + pkts[i++] = PKT3(PKT3_INDEX_TYPE, 0); + pkts[i++] = batch->vgt_dma_index_type; + pkts[i++] = PKT3(PKT3_NUM_INSTANCES, 0); + pkts[i++] = batch->vgt_dma_num_instances; + pkts[i++] = PKT3(PKT3_DRAW_INDEX_AUTO, 1); + pkts[i++] = batch->vgt_num_indices; + pkts[i++] = batch->vgt_draw_initiator; + return radeon_ib_copy(ib, pkts, i); + default: + return 0; + } } |