diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-01-25 22:24:11 +0100 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-01-25 22:32:36 +0100 |
commit | df1953f38bf6fcc3af88dcd841d7e1d685ae784f (patch) | |
tree | 4f36b520c00d09c36d228f61ac805d37fb9f54fd | |
parent | 71f2f62d650a3accfb8dc484822c3a08e442baec (diff) |
atomize viewport
-rw-r--r-- | r600_atom.c | 114 | ||||
-rw-r--r-- | r600_atom_api.h | 14 | ||||
-rw-r--r-- | radeon_atom.h | 5 | ||||
-rw-r--r-- | test.c | 21 |
4 files changed, 126 insertions, 28 deletions
diff --git a/r600_atom.c b/r600_atom.c index 16499bd..4f5df7b 100644 --- a/r600_atom.c +++ b/r600_atom.c @@ -84,17 +84,18 @@ static int r600_cb_emit(struct radeon_device *rdev, cb->pkts[16] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]); cb->pkts[21] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]); cb->pkts[26] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]); - cb->pkts[271] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[276] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[289] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[294] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[310] = radeon_ib_reloc(ib, cb->psshader1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[315] = radeon_ib_reloc(ib, cb->psshader1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[358] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[369] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[376] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[387] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); - cb->pkts[409] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]); + cb->pkts[259] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[264] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[277] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[282] = radeon_ib_reloc(ib, cb->vsshader1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[298] = radeon_ib_reloc(ib, cb->psshader1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[303] = radeon_ib_reloc(ib, cb->psshader1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[346] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[357] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[364] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[375] = radeon_ib_reloc(ib, cb->vbo1, RADEON_GEM_DOMAIN_GTT); + cb->pkts[397] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]); + r = radeon_ib_copy(ib, cb->pkts, atom->npkts); return r; } @@ -590,6 +591,71 @@ out_err: } /* + * r600_vport + */ +struct r600_vport { + struct radeon_atom atom; + u32 pkts[16]; + struct r600_atoms *atoms; +}; + +static void r600_vport_release(struct kref *kref) +{ + struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref); + struct r600_vport *vport = container_of(atom, struct r600_vport, atom); + + mutex_lock(&vport->atoms->mutex); + list_del_init(&vport->atom.list); + mutex_unlock(&vport->atoms->mutex); + kfree(vport); +} + +static int r600_vport_create(struct radeon_device *rdev, + struct r600_atoms *atoms, + struct drm_radeon_atom *patom, + struct radeon_atom **atom) +{ + struct drm_r600_vport pvport; + struct r600_vport *vport; + int r; + + vport = kmalloc(sizeof(*vport), GFP_KERNEL); + if (vport == NULL) + return -ENOMEM; + /* make sure structure properly initialized */ + memset(vport, 0, sizeof(*vport)); + r = radeon_atom_init(&vport->atom, &atoms->idr, &r600_vport_release, + &radeon_atom_emit_default, &r600_atom_process_default, + vport->pkts); + if (r) + goto out_err; + /* KERNEL use get user data */ + memcpy(&pvport, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_vport)); + /* PA_SC_VPORT_ZMIN_0 */ + vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2); + vport->pkts[vport->atom.npkts++] = 0x000000B4; + vport->pkts[vport->atom.npkts++] = pvport.pa_sc_vport_zmin_0; + vport->pkts[vport->atom.npkts++] = pvport.pa_sc_vport_zmax_0; + /* PA_CL_VPORT_XSCALE_0 */ + vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 6); + vport->pkts[vport->atom.npkts++] = 0x0000010F; + vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_xscale_0; + vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_xoffset_0; + vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_yscale_0; + vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_yoffset_0; + vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_zscale_0; + vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_zoffset_0; + *atom = &vport->atom; +fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts); + return 0; +out_err: + radeon_atom_put(&vport->atom); + *atom = NULL; + return r; +} + + +/* * r600 atom core functions */ int r600_atom_create(struct radeon_device *rdev, @@ -630,6 +696,13 @@ int r600_atom_create(struct radeon_device *rdev, atom->type = patom->type; list_add_tail(&atom->list, &atoms->tp_atoms); break; + case R600_ATOM_VPORT: + r = r600_vport_create(rdev, atoms, patom, &atom); + if (r) + return r; + atom->type = patom->type; + list_add_tail(&atom->list, &atoms->vport_atoms); + break; default: dev_err(rdev->dev, "unknown R600 atom type 0x%08X\n", patom->type); return -EINVAL; @@ -723,6 +796,10 @@ int r600_batches_queue(struct radeon_device *rdev, R600_ATOM_TP, &rbatch->atoms[i++]); if (r) goto out_err; + r = radeon_atom_find_locked(&atoms->vport_atoms, batch->vport_id, + R600_ATOM_VPORT, &rbatch->atoms[i++]); + if (r) + goto out_err; r = radeon_atom_find_locked(&atoms->cb_atoms, batch->cb_id, R600_ATOM_CB, &rbatch->atoms[i++]); if (r) @@ -798,11 +875,12 @@ int r600_atoms_init(struct radeon_device *rdev, struct r600_atoms *atoms) { mutex_init(&atoms->mutex); INIT_LIST_HEAD(&atoms->cb_atoms); + INIT_LIST_HEAD(&atoms->cb_cntl_atoms); INIT_LIST_HEAD(&atoms->pa_atoms); INIT_LIST_HEAD(&atoms->sq_atoms); INIT_LIST_HEAD(&atoms->tp_atoms); INIT_LIST_HEAD(&atoms->vgt_atoms); - INIT_LIST_HEAD(&atoms->cb_cntl_atoms); + INIT_LIST_HEAD(&atoms->vport_atoms); idr_init(&atoms->idr); atoms->npipes = 2; atoms->nbanks = 4; @@ -1061,18 +1139,6 @@ void r600_tflat(struct radeon_atom *atom) WPKT(0x00000094); WPKT(0x80000000); WPKT(0x00FA00FA); - WPKT(PKT3(PKT3_SET_CONTEXT_REG, 2)); - WPKT(0x000000B4); - WPKT(0x00000000); - WPKT(0x3F800000); - WPKT(PKT3(PKT3_SET_CONTEXT_REG, 6)); - WPKT(0x0000010F); - WPKT(0x42FA0000); - WPKT(0x42FA0000); - WPKT(0xC2FA0000); - WPKT(0x42FA0000); - WPKT(0x3F000000); - WPKT(0x3F000000); WPKT(PKT3(PKT3_SURFACE_SYNC, 3)); WPKT(0x08000000); WPKT(0x00000001); diff --git a/r600_atom_api.h b/r600_atom_api.h index 5a309f8..a471826 100644 --- a/r600_atom_api.h +++ b/r600_atom_api.h @@ -31,6 +31,7 @@ struct drm_radeon_atom { #define R600_ATOM_TP 2 #define R600_ATOM_PA 3 #define R600_ATOM_CB_CNTL 4 +#define R600_ATOM_VPORT 5 struct drm_r600_cb { u32 pitch; @@ -101,11 +102,24 @@ struct drm_r600_pa { u32 pa_su_poly_offset_back_offset; }; +/* vport - viewport */ +struct drm_r600_vport { + u32 pa_sc_vport_zmin_0; + u32 pa_sc_vport_zmax_0; + u32 pa_cl_vport_xscale_0; + u32 pa_cl_vport_xoffset_0; + u32 pa_cl_vport_yscale_0; + u32 pa_cl_vport_yoffset_0; + u32 pa_cl_vport_zscale_0; + u32 pa_cl_vport_zoffset_0; +}; + struct drm_r600_batch { u32 cb_id; u32 cb_cntl_id; u32 pa_id; u32 tp_id; + u32 vport_id; }; diff --git a/radeon_atom.h b/radeon_atom.h index 0acea79..2491113 100644 --- a/radeon_atom.h +++ b/radeon_atom.h @@ -53,7 +53,7 @@ struct radeon_atom { }; /* R600 */ -#define R600_BATCH_NATOMS 4 +#define R600_BATCH_NATOMS 5 struct r600_batch { struct list_head list; struct list_head pre_flushes; @@ -71,11 +71,12 @@ struct r600_batches { struct r600_atoms { struct list_head cb_atoms; + struct list_head cb_cntl_atoms; struct list_head pa_atoms; struct list_head sq_atoms; struct list_head tp_atoms; struct list_head vgt_atoms; - struct list_head cb_cntl_atoms; + struct list_head vport_atoms; struct idr idr; struct mutex mutex; struct r600_batches batches; @@ -48,9 +48,10 @@ int r600_tri_flat(struct radeon *radeon) { struct radeon_device *rdev; struct drm_r600_cb cb; - struct drm_r600_tp tp; - struct drm_r600_pa pa; struct drm_r600_cb_cntl cb_cntl; + struct drm_r600_pa pa; + struct drm_r600_tp tp; + struct drm_r600_vport vport; struct drm_r600_batch batch; struct drm_radeon_atom atom; int r; @@ -146,6 +147,22 @@ int r600_tri_flat(struct radeon *radeon) if (r) return r; batch.cb_cntl_id = atom.id; + /* viewport */ + vport.pa_sc_vport_zmin_0 = 0x00000000; + vport.pa_sc_vport_zmax_0 = 0x3f800000; + vport.pa_cl_vport_xscale_0 = 0x42fa0000; + vport.pa_cl_vport_xoffset_0 = 0x42fa0000; + vport.pa_cl_vport_yscale_0 = 0xc2fa0000; + vport.pa_cl_vport_yoffset_0 = 0x42fa0000; + vport.pa_cl_vport_zscale_0 = 0x3f000000; + vport.pa_cl_vport_zoffset_0 = 0x3f000000; + atom.type = R600_ATOM_VPORT; + atom.id = 0; + atom.data = (uint64_t)(uintptr_t)&vport; + r = radeon_atom_create(rdev, &atom); + if (r) + return r; + batch.vport_id = atom.id; r = radeon_batches_queue(rdev, &batch); if (r) |