cleanup

9 files changed, 855 insertions, 1221 deletions

diff --git a/r600_atom.c b/r600_atom.c
index 4aff639..751f40d 100644
--- a/r600_atom.c
+++ b/r600_atom.c
@@ -21,19 +21,6 @@
 /*
  * helpers functions
  */
-static int r600_atom_process_default(struct radeon_device *rdev,
-					struct radeon_atom *atom,
-					u32 last_id,
-					void *data)
-{
-	struct r600_batch *batch = data;
-
-	if (atom->id != last_id) {
-		batch->npkts += atom->npkts;
-	}
-	return 0;
-}
-
 static void r600_emit_flush(struct radeon_device *rdev,
 				struct radeon_ib *ib,
 				struct radeon_bo *bo,
@@ -80,92 +67,50 @@ static void r600_emit_resources(struct radeon_device *rdev,
 /*
  * r600_cb
  */
-struct r600_cb {
-	struct radeon_atom	atom;
-	u32			pkts[64];
-	u32			placements[2];
-	struct radeon_bo	*bo;
-	struct r600_atoms	*atoms;
-};
-
-static void r600_cb_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_cb *cb = container_of(atom, struct r600_cb, atom);
-
-	mutex_lock(&cb->atoms->mutex);
-	list_del_init(&cb->atom.list);
-	mutex_unlock(&cb->atoms->mutex);
-	if (cb->bo)
-		radeon_bo_unref(cb->bo);
-	kfree(cb);
-}
-
 static int r600_cb_emit(struct radeon_device *rdev,
 			struct radeon_atom *atom,
 			void *data,
 			struct radeon_ib *ib)
 {
-	struct r600_cb *cb = (struct r600_cb *)atom;
+	struct drm_r600_cb *cb = atom->state;
 	int r;
 
-	cb->pkts[16] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);
-	cb->pkts[21] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);
-	cb->pkts[26] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);
-	r = radeon_ib_copy(ib, cb->pkts, atom->npkts);
+	atom->pkts[16] = radeon_ib_reloc(ib, atom->bo[0], cb->placements[0] | cb->placements[1]);
+	atom->pkts[21] = radeon_ib_reloc(ib, atom->bo[0], cb->placements[0] | cb->placements[1]);
+	atom->pkts[26] = radeon_ib_reloc(ib, atom->bo[0], cb->placements[0] | cb->placements[1]);
+	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
 	return r;
 }
 
-static int r600_cb_process(struct radeon_device *rdev,
-				struct radeon_atom *atom,
-				u32 last_id,
-				void *data)
-{
-	struct r600_batch *batch = data;
-	struct r600_cb *cb = (struct r600_cb *)atom;
-	int r;
-
-	if (atom->id != last_id) {
-		batch->npkts += atom->npkts;
-	}
-	r = radeon_atom_flush_add(&batch->post_flushes, cb->bo, 0x02000040);
-	if (r < 0)
-		return r;
-	return 0;
-}
-
 /* FIXME delete */
 void r600_tflat(struct radeon_atom *atom);
 static int r600_cb_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_cb pcb;
-	struct r600_cb *cb;
+	struct drm_r600_cb *cb;
 	u32 bpe, tmp;
 	int r;
 
-	cb = kmalloc(sizeof(*cb), GFP_KERNEL);
+	cb = kmalloc(sizeof(struct drm_r600_cb), GFP_KERNEL);
 	if (cb == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(cb, 0, sizeof(*cb));
-	r = radeon_atom_init(&cb->atom, &atoms->idr,
-				&r600_cb_release, &r600_cb_emit,
-				&r600_cb_process, cb->pkts);
+	memcpy(cb, data, sizeof(struct drm_r600_cb));
+	atom->state = cb;
+	r = radeon_atom_init(atom, &atoms->idr, &r600_cb_emit);
 	if (r)
-		goto out_err;
-	cb->placements[0] = pcb.placements[0];
-	cb->placements[1] = pcb.placements[1];
-	cb->atom.nflushes = 1;
-	/* KERNEL use get user data */
-	memcpy(&pcb, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_cb));
+		return r;
+	atom->nflushes = 1;
 	/* take a references on the bo */
-	cb->bo = pcb.bo;
-	radeon_bo_ref(cb->bo);
+	atom->bo[0] = radeon_bo_lookup(rdev, cb->handle);
+	atom->flags[0] = 0x02000040;
+	if (atom->bo[0] == NULL) {
+		return -EINVAL;
+	}
+	atom->nbo = 1;
 	/* check cb configuration */
-	switch (G_0280A0_FORMAT(pcb.color_info)) {
+	switch (G_0280A0_FORMAT(cb->color_info)) {
 	case V_0280A0_COLOR_8:
 	case V_0280A0_COLOR_4_4:
 	case V_0280A0_COLOR_3_3_2:
@@ -212,638 +157,450 @@ static int r600_cb_create(struct radeon_device *rdev,
 	case V_0280A0_COLOR_INVALID:
 	default:
 		dev_err(rdev->dev, "%s cb invalid format %d\n", __func__,
-			S_0280A0_FORMAT(pcb.color_info));
-		r = -EINVAL;
-		goto out_err;
+			S_0280A0_FORMAT(cb->color_info));
+		return -EINVAL;
 	}
-	switch (G_0280A0_ARRAY_MODE(pcb.color_info)) {
+	switch (G_0280A0_ARRAY_MODE(cb->color_info)) {
 	case V_0280A0_ARRAY_LINEAR_GENERAL:
 	case V_0280A0_ARRAY_LINEAR_ALIGNED:
-		if ((pcb.pitch) & 0x3f) {
+		if ((cb->pitch) & 0x3f) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, pcb.pitch);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->pitch);
+			return -EINVAL;
 		}
-		if ((pcb.pitch * bpe) & (atoms->group_bytes - 1)) {
+		if ((cb->pitch * bpe) & (atoms->group_bytes - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, pcb.pitch);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->pitch);
+			return -EINVAL;
 		}
 		break;
 	case V_0280A0_ARRAY_1D_TILED_THIN1:
-		if ((pcb.pitch) & 0x7) {
+		if ((cb->pitch) & 0x7) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, pcb.pitch);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->pitch);
+			return -EINVAL;
 		}
-		if ((pcb.pitch * 8 * bpe * pcb.nsamples) & (atoms->group_bytes - 1)) {
+		if ((cb->pitch * 8 * bpe * cb->nsamples) & (atoms->group_bytes - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, pcb.pitch);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->pitch);
+			return -EINVAL;
 		}
-		if (pcb.height & 0x7) {
+		if (cb->height & 0x7) {
 			dev_err(rdev->dev, "%s:%d cb height (%d) invalid\n",
-				__func__, __LINE__, pcb.height);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->height);
+			return -EINVAL;
 		}
 		break;
 	case V_0280A0_ARRAY_2D_TILED_THIN1:
-		if ((pcb.pitch) & ((8 * atoms->nbanks) - 1)) {
+		if ((cb->pitch) & ((8 * atoms->nbanks) - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, pcb.pitch);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->pitch);
+			return -EINVAL;
 		}
-		tmp = pcb.pitch * 8 * bpe * pcb.nsamples;
+		tmp = cb->pitch * 8 * bpe * cb->nsamples;
 		tmp = tmp / atoms->nbanks;
 		if (tmp & (atoms->group_bytes - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, pcb.pitch);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->pitch);
+			return -EINVAL;
 		}
-		if (pcb.height & ((8 * atoms->npipes) - 1)) {
+		if (cb->height & ((8 * atoms->npipes) - 1)) {
 			dev_err(rdev->dev, "%s:%d cb height (%d) invalid\n",
-				__func__, __LINE__, pcb.height);
-			r = -EINVAL;
-			goto out_err;
+				__func__, __LINE__, cb->height);
+			return -EINVAL;
 		}
 		break;
 	default:
 		dev_err(rdev->dev, "%s invalid tiling %d\n", __func__,
-			G_0280A0_ARRAY_MODE(pcb.color_info));
-		r = -EINVAL;
-		goto out_err;
+			G_0280A0_ARRAY_MODE(cb->color_info));
+		return -EINVAL;
 	}
-	/* cb require a buffer of at list pcb.size */
-	if (radeon_bo_size(pcb.bo) < pcb.pitch * pcb.height * bpe) {
+	/* cb require a buffer of at list cb->size */
+	if (radeon_bo_size(atom->bo[0]) < cb->pitch * cb->height * bpe) {
 		dev_err(rdev->dev, "%s bo too small (%d) need (%d) %d %d %d\n",
-			__func__, radeon_bo_size(pcb.bo),
-			pcb.pitch * pcb.height * bpe, pcb.pitch, pcb.height, bpe);
-		r = -EINVAL;
-		goto out_err;
+			__func__, radeon_bo_size(atom->bo[0]),
+			cb->pitch * cb->height * bpe, cb->pitch, cb->height, bpe);
+		return -EINVAL;
 	}
 	/* CB_COLOR0_INFO */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000028;
-	cb->pkts[cb->atom.npkts++] = pcb.color_info;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000028;
+	atom->pkts[atom->npkts++] = cb->color_info;
 	/* CB_COLOR0_SIZE */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000018;
-	cb->pkts[cb->atom.npkts++] =
-		S_028060_PITCH_TILE_MAX((pcb.pitch >> 3) - 1) |
-		S_028060_SLICE_TILE_MAX(((pcb.pitch * pcb.height) >> 6) - 1);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000018;
+	atom->pkts[atom->npkts++] =
+		S_028060_PITCH_TILE_MAX((cb->pitch >> 3) - 1) |
+		S_028060_SLICE_TILE_MAX(((cb->pitch * cb->height) >> 6) - 1);
 	/* CB_COLOR0_VIEW */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000020;
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000020;
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* CB_COLOR0_MASK */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000040;
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000040;
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* CB_COLOR0_TILE */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000030;
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "cb->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", cb->atom.npkts);
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000030;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* CB_COLOR0_FRAG */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000038;
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "cb->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", cb->atom.npkts);
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000038;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* CB_COLOR0_BASE */
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb->pkts[cb->atom.npkts++] = 0x00000010;
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
-	cb->pkts[cb->atom.npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "cb->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", cb->atom.npkts);
-	cb->pkts[cb->atom.npkts++] = 0x00000000;
-	r600_tflat(&cb->atom);
-	*atom = &cb->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000010;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
+	atom->pkts[atom->npkts++] = 0x00000000;
+	r600_tflat(atom);
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&cb->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_cb_cntl
  */
-struct r600_cb_cntl {
-	struct radeon_atom	atom;
-	u32			pkts[32];
-	struct r600_atoms	*atoms;
-};
-
-static void r600_cb_cntl_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_cb_cntl *cb_cntl = container_of(atom, struct r600_cb_cntl, atom);
-
-	mutex_lock(&cb_cntl->atoms->mutex);
-	list_del_init(&cb_cntl->atom.list);
-	mutex_unlock(&cb_cntl->atoms->mutex);
-	kfree(cb_cntl);
-}
-
 static int r600_cb_cntl_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_cb_cntl pcb_cntl;
-	struct r600_cb_cntl *cb_cntl;
+	struct drm_r600_cb_cntl *cb_cntl;
 	int r;
 
-	cb_cntl = kmalloc(sizeof(*cb_cntl), GFP_KERNEL);
+	cb_cntl = kmalloc(sizeof(struct drm_r600_cb_cntl), GFP_KERNEL);
 	if (cb_cntl == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(cb_cntl, 0, sizeof(*cb_cntl));
-	r = radeon_atom_init(&cb_cntl->atom, &atoms->idr, &r600_cb_cntl_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			cb_cntl->pkts);
+	memcpy(cb_cntl, data, sizeof(struct drm_r600_cb_cntl));
+	atom->state = cb_cntl;
+	r = radeon_atom_init(atom, &atoms->idr, &radeon_atom_emit_default);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pcb_cntl, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_cb_cntl));
+		return r;
 	/* CB_TARGET_MASK */
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = 0x0000008E;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_target_mask;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_shader_mask;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000008E;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_target_mask;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_shader_mask;
 	/* CB_CLRCMP_CONTROL */
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = 0x0000030C;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clrcmp_control;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clrcmp_src;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clrcmp_dst;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clrcmp_msk;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
+	atom->pkts[atom->npkts++] = 0x0000030C;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clrcmp_control;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clrcmp_src;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clrcmp_dst;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clrcmp_msk;
 	/* CB_COLOR_CONTROL */
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = 0x00000202;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_color_control;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000202;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_color_control;
 	/* CB_CLEAR_RED */
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = 0x00000048;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clear_red;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clear_green;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clear_blue;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_clear_alpha;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
+	atom->pkts[atom->npkts++] = 0x00000048;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clear_red;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clear_green;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clear_blue;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_clear_alpha;
 	/* CB_BLEND_RED */
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = 0x00000105;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_blend_red;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_blend_green;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_blend_blue;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_blend_alpha;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
+	atom->pkts[atom->npkts++] = 0x00000105;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_blend_red;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_blend_green;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_blend_blue;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_blend_alpha;
 	/* CB_FOG_RED */
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 3);
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = 0x00000109;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_fog_red;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_fog_green;
-	cb_cntl->pkts[cb_cntl->atom.npkts++] = pcb_cntl.cb_fog_blue;
-	*atom = &cb_cntl->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 3);
+	atom->pkts[atom->npkts++] = 0x00000109;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_fog_red;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_fog_green;
+	atom->pkts[atom->npkts++] = cb_cntl->cb_fog_blue;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&cb_cntl->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_pa
  */
-struct r600_pa {
-	struct radeon_atom	atom;
-	u32			pkts[128];
-	struct r600_atoms	*atoms;
-};
-
-static void r600_pa_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_pa *pa = container_of(atom, struct r600_pa, atom);
-
-	mutex_lock(&pa->atoms->mutex);
-	list_del_init(&pa->atom.list);
-	mutex_unlock(&pa->atoms->mutex);
-	kfree(pa);
-}
-
 static int r600_pa_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_pa ppa;
-	struct r600_pa *pa;
+	struct drm_r600_pa *pa;
 	int r;
 
-	pa = kmalloc(sizeof(*pa), GFP_KERNEL);
+	pa = kmalloc(sizeof(struct drm_r600_pa), GFP_KERNEL);
 	if (pa == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(pa, 0, sizeof(*pa));
-	r = radeon_atom_init(&pa->atom, &atoms->idr, &r600_pa_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			pa->pkts);
+	memcpy(pa, data, sizeof(struct drm_r600_pa));
+	atom->state = pa;
+	r = radeon_atom_init(atom, &atoms->idr, &radeon_atom_emit_default);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&ppa, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_pa));
+		return r;
 	/* PA_SC_MPASS_PS_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000292;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_mpass_ps_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000292;
+	atom->pkts[atom->npkts++] = pa->pa_sc_mpass_ps_cntl;
 	/* PA_SC_MODE_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000293;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_mode_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000293;
+	atom->pkts[atom->npkts++] = pa->pa_sc_mode_cntl;
 	/* PA_SC_LINE_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000300;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_line_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000300;
+	atom->pkts[atom->npkts++] = pa->pa_sc_line_cntl;
 	/* PA_SC_AA_CONFIG */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000301;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_aa_config;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000301;
+	atom->pkts[atom->npkts++] = pa->pa_sc_aa_config;
 	/* PA_SC_AA_SAMPLE_LOCS_MCTX */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000307;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_aa_sample_locs_mctx;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000307;
+	atom->pkts[atom->npkts++] = pa->pa_sc_aa_sample_locs_mctx;
 	/* PA_SC_AA_MASK */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000312;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_aa_mask;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000312;
+	atom->pkts[atom->npkts++] = pa->pa_sc_aa_mask;
 	/* PA_CL_CLIP_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000204;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_clip_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000204;
+	atom->pkts[atom->npkts++] = pa->pa_cl_clip_cntl;
 	/* PA_CL_VTE_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000206;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_vte_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000206;
+	atom->pkts[atom->npkts++] = pa->pa_cl_vte_cntl;
 	/* PA_CL_VS_OUT_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000207;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_vs_out_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000207;
+	atom->pkts[atom->npkts++] = pa->pa_cl_vs_out_cntl;
 	/* PA_CL_NANINF_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000208;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_naninf_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000208;
+	atom->pkts[atom->npkts++] = pa->pa_cl_naninf_cntl;
 	/* PA_CL_GB_VERT_CLIP_ADJ */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
-	pa->pkts[pa->atom.npkts++] = 0x00000303;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_gb_vert_clip_adj;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_gb_vert_disc_adj;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_gb_horz_clip_adj;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_cl_gb_horz_disc_adj;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
+	atom->pkts[atom->npkts++] = 0x00000303;
+	atom->pkts[atom->npkts++] = pa->pa_cl_gb_vert_clip_adj;
+	atom->pkts[atom->npkts++] = pa->pa_cl_gb_vert_disc_adj;
+	atom->pkts[atom->npkts++] = pa->pa_cl_gb_horz_clip_adj;
+	atom->pkts[atom->npkts++] = pa->pa_cl_gb_horz_disc_adj;
 	/* PA_SU_SC_MODE_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	pa->pkts[pa->atom.npkts++] = 0x00000205;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_sc_mode_cntl;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000205;
+	atom->pkts[atom->npkts++] = pa->pa_su_sc_mode_cntl;
 	/* PA_SU_POINT_SIZE */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
-	pa->pkts[pa->atom.npkts++] = 0x00000280;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_point_size;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_point_minmax;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_line_cntl;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_sc_line_stipple;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
+	atom->pkts[atom->npkts++] = 0x00000280;
+	atom->pkts[atom->npkts++] = pa->pa_su_point_size;
+	atom->pkts[atom->npkts++] = pa->pa_su_point_minmax;
+	atom->pkts[atom->npkts++] = pa->pa_su_line_cntl;
+	atom->pkts[atom->npkts++] = pa->pa_sc_line_stipple;
 	/* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	pa->pkts[pa->atom.npkts++] = 0x0000037E;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_poly_offset_db_fmt_cntl;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_poly_offset_clamp;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000037E;
+	atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_db_fmt_cntl;
+	atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_clamp;
 	/* PA_SU_POLY_OFFSET_FRONT_SCALE */
-	pa->pkts[pa->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
-	pa->pkts[pa->atom.npkts++] = 0x00000380;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_poly_offset_front_scale;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_poly_offset_front_offset;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_poly_offset_back_scale;
-	pa->pkts[pa->atom.npkts++] = ppa.pa_su_poly_offset_back_offset;
-	*atom = &pa->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
+	atom->pkts[atom->npkts++] = 0x00000380;
+	atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_front_scale;
+	atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_front_offset;
+	atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_back_scale;
+	atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_back_offset;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&pa->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_vport
  */
-struct r600_vport {
-	struct radeon_atom	atom;
-	u32			pkts[64];
-	struct r600_atoms	*atoms;
-};
-
-static void r600_vport_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_vport *vport = container_of(atom, struct r600_vport, atom);
-
-	mutex_lock(&vport->atoms->mutex);
-	list_del_init(&vport->atom.list);
-	mutex_unlock(&vport->atoms->mutex);
-	kfree(vport);
-}
-
 static int r600_vport_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_vport pvport;
-	struct r600_vport *vport;
+	struct drm_r600_vport *vport;
 	int r;
 
-	vport = kmalloc(sizeof(*vport), GFP_KERNEL);
+	vport = kmalloc(sizeof(struct drm_r600_vport), GFP_KERNEL);
 	if (vport == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(vport, 0, sizeof(*vport));
-	r = radeon_atom_init(&vport->atom, &atoms->idr, &r600_vport_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			vport->pkts);
+	memcpy(vport, data, sizeof(struct drm_r600_vport));
+	atom->state = vport;
+	r = radeon_atom_init(atom, &atoms->idr, &radeon_atom_emit_default);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pvport, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_vport));
+		return r;
 	/* PA_SC_VPORT_ZMIN_0 */
-	vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vport->pkts[vport->atom.npkts++] = 0x000000B4;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_vport_zmin_0;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_vport_zmax_0;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x000000B4;
+	atom->pkts[atom->npkts++] = vport->pa_sc_vport_zmin_0;
+	atom->pkts[atom->npkts++] = vport->pa_sc_vport_zmax_0;
 	/* PA_CL_VPORT_XSCALE_0 */
-	vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 6);
-	vport->pkts[vport->atom.npkts++] = 0x0000010F;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_xscale_0;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_xoffset_0;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_yscale_0;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_yoffset_0;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_zscale_0;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_cl_vport_zoffset_0;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 6);
+	atom->pkts[atom->npkts++] = 0x0000010F;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vport_xscale_0;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vport_xoffset_0;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vport_yscale_0;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vport_yoffset_0;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vport_zscale_0;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vport_zoffset_0;
 	/* PA_SC_SCREEN_SCISSOR_TL */
-	vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vport->pkts[vport->atom.npkts++] = 0x0000000C;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_screen_scissor_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_screen_scissor_br;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000000C;
+	atom->pkts[atom->npkts++] = vport->pa_sc_screen_scissor_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_screen_scissor_br;
 	/* PA_SC_WINDOW_OFFSET */
-	vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 12);
-	vport->pkts[vport->atom.npkts++] = 0x00000080;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_window_offset;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_window_scissor_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_window_scissor_br;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_rule;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_0_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_0_br;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_1_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_1_br;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_2_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_2_br;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_3_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_cliprect_3_br;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 12);
+	atom->pkts[atom->npkts++] = 0x00000080;
+	atom->pkts[atom->npkts++] = vport->pa_sc_window_offset;
+	atom->pkts[atom->npkts++] = vport->pa_sc_window_scissor_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_window_scissor_br;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_rule;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_0_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_0_br;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_1_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_1_br;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_2_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_2_br;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_3_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_3_br;
 	/* PA_SC_GENERIC_SCISSOR_TL */
-	vport->pkts[vport->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vport->pkts[vport->atom.npkts++] = 0x00000090;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_generic_scissor_tl;
-	vport->pkts[vport->atom.npkts++] = pvport.pa_sc_generic_scissor_br;
-	*atom = &vport->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000090;
+	atom->pkts[atom->npkts++] = vport->pa_sc_generic_scissor_tl;
+	atom->pkts[atom->npkts++] = vport->pa_sc_generic_scissor_br;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&vport->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_blend
  */
-struct r600_blend {
-	struct radeon_atom	atom;
-	u32			pkts[16];
-	struct r600_atoms	*atoms;
-};
-
-static void r600_blend_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_blend *blend = container_of(atom, struct r600_blend, atom);
-
-	mutex_lock(&blend->atoms->mutex);
-	list_del_init(&blend->atom.list);
-	mutex_unlock(&blend->atoms->mutex);
-	kfree(blend);
-}
-
 static int r600_blend_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_blend pblend;
-	struct r600_blend *blend;
+	struct drm_r600_blend *blend;
 	int r;
 
-	blend = kmalloc(sizeof(*blend), GFP_KERNEL);
+	blend = kmalloc(sizeof(struct drm_r600_blend), GFP_KERNEL);
 	if (blend == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(blend, 0, sizeof(*blend));
-	r = radeon_atom_init(&blend->atom, &atoms->idr, &r600_blend_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			blend->pkts);
+	memcpy(blend, data, sizeof(struct drm_r600_blend));
+	atom->state = blend;
+	r = radeon_atom_init(atom, &atoms->idr, &radeon_atom_emit_default);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pblend, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_blend));
+		return r;
 	/* CB_BLEND0_CONTROL */
-	blend->pkts[blend->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 8);
-	blend->pkts[blend->atom.npkts++] = 0x000001E0;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend0_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend1_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend2_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend3_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend4_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend5_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend6_control;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend7_control;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 8);
+	atom->pkts[atom->npkts++] = 0x000001E0;
+	atom->pkts[atom->npkts++] = blend->cb_blend0_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend1_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend2_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend3_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend4_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend5_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend6_control;
+	atom->pkts[atom->npkts++] = blend->cb_blend7_control;
 	/* CB_BLEND_CONTROL */
-	blend->pkts[blend->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	blend->pkts[blend->atom.npkts++] = 0x00000201;
-	blend->pkts[blend->atom.npkts++] = pblend.cb_blend_control;
-	*atom = &blend->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000201;
+	atom->pkts[atom->npkts++] = blend->cb_blend_control;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&blend->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_constant
  */
-struct r600_constants {
-	struct radeon_atom	atom;
-	u32			pkts[1026];
-	struct r600_atoms	*atoms;
-};
-
-static void r600_constants_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_constants *constants = container_of(atom, struct r600_constants, atom);
-
-	mutex_lock(&constants->atoms->mutex);
-	list_del_init(&constants->atom.list);
-	mutex_unlock(&constants->atoms->mutex);
-	kfree(constants);
-}
-
 static int r600_constants_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_constants pconstants;
-	struct r600_constants *constants;
+	struct drm_r600_constants *constants;
 	int r;
 
-	constants = kmalloc(sizeof(*constants), GFP_KERNEL);
+	constants = kmalloc(sizeof(struct drm_r600_constants), GFP_KERNEL);
 	if (constants == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(constants, 0, sizeof(*constants));
-	r = radeon_atom_init(&constants->atom, &atoms->idr, &r600_constants_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			constants->pkts);
+	memcpy(constants, data, sizeof(struct drm_r600_constants));
+	atom->state = constants;
+	r = radeon_atom_init(atom, &atoms->idr, &radeon_atom_emit_default);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pconstants, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_constants));
-	if ((pconstants.nconstants & 0x3) || (pconstants.offset & 0x3)) {
+		return r;
+	if ((constants->nconstants & 0x3) || (constants->offset & 0x3)) {
 		dev_err(rdev->dev, "invalid offset or number of constants (0x%08X %d)\n",
-			pconstants.offset, pconstants.nconstants);
+			constants->offset, constants->nconstants);
 			return -EINVAL;
 	}
 	/* constants */
-	constants->pkts[constants->atom.npkts++] = PKT3(PKT3_SET_ALU_CONST, pconstants.nconstants * 4);
-	constants->pkts[constants->atom.npkts++] = pconstants.offset;
-	memcpy(&constants->pkts[constants->atom.npkts],
-		(void*)(unsigned long)pconstants.constants,
-		pconstants.nconstants * 4 * 4);
-	constants->atom.npkts += pconstants.nconstants * 4;
-	*atom = &constants->atom;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_ALU_CONST, constants->nconstants * 4);
+	atom->pkts[atom->npkts++] = constants->offset;
+	memcpy(&atom->pkts[atom->npkts],
+		(void*)(unsigned long)constants->constants,
+		constants->nconstants * 4 * 4);
+	atom->npkts += constants->nconstants * 4;
 	return 0;
-out_err:
-	radeon_atom_put(&constants->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_db
  */
-struct r600_db {
-	struct radeon_atom	atom;
-	u32			pkts[32];
-	struct r600_atoms	*atoms;
-	int			has_s;
-	int			has_h;
-	struct radeon_bo	*db;
-	struct radeon_bo	*hz;
-	u32			db_placements[2];
-	u32			hz_placements[2];
-};
-
-static void r600_db_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_db *db = container_of(atom, struct r600_db, atom);
-
-	mutex_lock(&db->atoms->mutex);
-	list_del_init(&db->atom.list);
-	mutex_unlock(&db->atoms->mutex);
-	if (db->db)
-		radeon_bo_unref(db->db);
-	if (db->hz)
-		radeon_bo_unref(db->hz);
-	kfree(db);
-}
-
 static int r600_db_emit(struct radeon_device *rdev,
 			struct radeon_atom *atom,
 			void *data,
 			struct radeon_ib *ib)
 {
-	struct r600_db *db = (struct r600_db *)atom;
+	struct drm_r600_db *db = atom->state;
 	int r;
 
-	db->pkts[4] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);
-	if (db->hz)
-		db->pkts[9] = radeon_ib_reloc(ib, db->hz, db->hz_placements[0] | db->hz_placements[1]);
-	r = radeon_ib_copy(ib, db->pkts, atom->npkts);
+	atom->pkts[4] = radeon_ib_reloc(ib, atom->bo[0], db->db_placements[0] | db->db_placements[1]);
+	if (atom->nbo > 1)
+		atom->pkts[9] = radeon_ib_reloc(ib, atom->bo[1], db->hz_placements[0] | db->hz_placements[1]);
+	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
 	return r;
 }
 
-static int r600_db_process(struct radeon_device *rdev,
-				struct radeon_atom *atom,
-				u32 last_id,
-				void *data)
-{
-	struct r600_batch *batch = data;
-	struct r600_db *db = (struct r600_db *)atom;
-	int r;
-
-	if (atom->id != last_id) {
-		batch->npkts += atom->npkts;
-	}
-	r = radeon_atom_flush_add(&batch->post_flushes, db->db, 0x04004000);
-	if (r < 0)
-		return r;
-	if (db->hz) {
-		r = radeon_atom_flush_add(&batch->post_flushes, db->hz, 0x04004000);
-		if (r < 0)
-			return r;
-	}
-	return 0;
-}
-
 static int r600_db_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_db pdb;
-	struct r600_db *db;
+	struct drm_r600_db *db;
 	u32 nslices, ntiles_per_slice, ntiles, bpe;
 	int has_s;
 	int r;
 
-	/* KERNEL use get user data */
-	memcpy(&pdb, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_db));
-	if (pdb.db == NULL) {
-		dev_err(rdev->dev, "no buffer object for depth\n");
+	db = kmalloc(sizeof(struct drm_r600_db), GFP_KERNEL);
+	if (db == NULL)
+		return -ENOMEM;
+	memcpy(db, data, sizeof(struct drm_r600_db));
+	atom->state = db;
+	r = radeon_atom_init(atom, &atoms->idr, &r600_db_emit);
+	if (r)
+		return r;
+	atom->bo[0] = radeon_bo_lookup(rdev, db->db_handle);
+	if (atom->bo[0] == NULL)
 		return -EINVAL;
+	atom->flags[0] = 0x04004000;
+	atom->nbo = 1;
+	if (db->hz_handle) {
+		atom->bo[1] = radeon_bo_lookup(rdev, db->hz_handle);
+		if (atom->bo[1] == NULL)
+			return -EINVAL;
+		atom->flags[1] = 0x04004000;
+		atom->nbo = 2;
 	}
-	switch (G_028010_FORMAT(pdb.db_depth_info)) {
+	switch (G_028010_FORMAT(db->db_depth_info)) {
 	case V_028010_DEPTH_16:
 		bpe = 2;
 		has_s = 0;
@@ -865,450 +622,288 @@ static int r600_db_create(struct radeon_device *rdev,
 		break;
 	case V_028010_DEPTH_INVALID:
 	default:
-		dev_err(rdev->dev, "invalid db format %d\n", G_028010_FORMAT(pdb.db_depth_info));
+		dev_err(rdev->dev, "invalid db format %d\n", G_028010_FORMAT(db->db_depth_info));
 		return -EINVAL;
 		break;
 	}
-	nslices = G_028004_SLICE_MAX(pdb.db_depth_view) + 1;
-	ntiles_per_slice = G_028000_SLICE_TILE_MAX(pdb.db_depth_size) + 1;
+	nslices = G_028004_SLICE_MAX(db->db_depth_view) + 1;
+	ntiles_per_slice = G_028000_SLICE_TILE_MAX(db->db_depth_size) + 1;
 	ntiles = nslices * ntiles_per_slice;
-	if ((ntiles * 64 * bpe) > radeon_bo_size(pdb.db)) {
+	if ((ntiles * 64 * bpe) > radeon_bo_size(atom->bo[0])) {
 		dev_err(rdev->dev, "db buffer too small %d need %d (%d %d)\n",
-			radeon_bo_size(pdb.db), ntiles * 64 * bpe,
+			radeon_bo_size(atom->bo[0]), ntiles * 64 * bpe,
 			nslices, ntiles_per_slice);
 		return -EINVAL;
 	}
-	if (pdb.hz) {
+	if (db->hz_handle) {
 		dev_err(rdev->dev, "we don't know how to compute hiz buffer size\n");
 		return -EINVAL;
 	}
-	if (pdb.hz == NULL && G_028010_TILE_SURFACE_ENABLE(pdb.db_depth_info)) {
+	if (!db->hz_handle && G_028010_TILE_SURFACE_ENABLE(db->db_depth_info)) {
 		dev_err(rdev->dev, "hyperz enabled but no buffer supplied\n");
 		return -EINVAL;
 	}
-	db = kmalloc(sizeof(*db), GFP_KERNEL);
-	if (db == NULL)
-		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(db, 0, sizeof(*db));
-	r = radeon_atom_init(&db->atom, &atoms->idr, &r600_db_release,
-			&r600_db_emit, &r600_db_process,
-			db->pkts);
-	if (r)
-		goto out_err;
-	db->has_s = has_s;
-	db->has_h = 0;
-	db->db = pdb.db;
-	db->hz = pdb.hz;
-	radeon_bo_ref(db->db);
-	if (db->hz)
-		radeon_bo_ref(db->hz);
-	db->db_placements[0] = pdb.db_placements[0];
-	db->db_placements[1] = pdb.db_placements[1];
-	db->hz_placements[0] = pdb.hz_placements[0];
-	db->hz_placements[1] = pdb.hz_placements[1];
-	db->atom.nflushes = 1;
-	if (db->has_h)
-		db->atom.nflushes += 1;
 	/* R_02800C_DB_DEPTH_BASE */
-	db->pkts[db->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db->pkts[db->atom.npkts++] = 0x00000003;
-	db->pkts[db->atom.npkts++] = 0x00000000;
-	db->pkts[db->atom.npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "db->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", db->atom.npkts);
-	db->pkts[db->atom.npkts++] = 0x00000000;
-	if (pdb.hz) {
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000003;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", atom->npkts);
+	atom->pkts[atom->npkts++] = 0x00000000;
+	if (db->hz_handle) {
 		/* R_028014_DB_HTILE_DATA_BASE */
-		db->pkts[db->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-		db->pkts[db->atom.npkts++] = 0x00000005;
-		db->pkts[db->atom.npkts++] = 0x00000000;
-		db->pkts[db->atom.npkts++] = PKT3(PKT3_NOP, 0);
-		fprintf(stderr, "db->pkts[%d] = radeon_ib_reloc(ib, db->hz, db->hz_placements[0] | db->hz_placements[1]);\n", db->atom.npkts);
-		db->pkts[db->atom.npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000005;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->hz, db->hz_placements[0] | db->hz_placements[1]);\n", atom->npkts);
+		atom->pkts[atom->npkts++] = 0x00000000;
 	}
 	/* R_028000_DB_DEPTH_SIZE */
-	db->pkts[db->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	db->pkts[db->atom.npkts++] = 0x00000000;
-	db->pkts[db->atom.npkts++] = pdb.db_depth_size;
-	db->pkts[db->atom.npkts++] = pdb.db_depth_view;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = db->db_depth_size;
+	atom->pkts[atom->npkts++] = db->db_depth_view;
 	/* R_028010_DB_DEPTH_INFO */
-	db->pkts[db->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db->pkts[db->atom.npkts++] = 0x00000004;
-	db->pkts[db->atom.npkts++] = pdb.db_depth_info;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000004;
+	atom->pkts[atom->npkts++] = db->db_depth_info;
 	/* R_028D24_DB_HTILE_SURFACE */
-	db->pkts[db->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db->pkts[db->atom.npkts++] = 0x00000349;
-	db->pkts[db->atom.npkts++] = pdb.db_htile_surface;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000349;
+	atom->pkts[atom->npkts++] = db->db_htile_surface;
 	/* R_028D34_DB_PREFETCH_LIMIT */
-	db->pkts[db->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db->pkts[db->atom.npkts++] = 0x0000034D;
-	db->pkts[db->atom.npkts++] = pdb.db_prefetch_limit;
-	*atom = &db->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x0000034D;
+	atom->pkts[atom->npkts++] = db->db_prefetch_limit;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&db->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_db_cntl
  */
-struct r600_db_cntl {
-	struct radeon_atom	atom;
-	u32			pkts[32];
-	struct r600_atoms	*atoms;
-	int			need_s;
-	int			need_z;
-	int			need_h;
-};
-
-static void r600_db_cntl_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_db_cntl *db_cntl = container_of(atom, struct r600_db_cntl, atom);
-
-	mutex_lock(&db_cntl->atoms->mutex);
-	list_del_init(&db_cntl->atom.list);
-	mutex_unlock(&db_cntl->atoms->mutex);
-	kfree(db_cntl);
-}
-
 static int r600_db_cntl_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_db_cntl pdb_cntl;
-	struct r600_db_cntl *db_cntl;
+	struct drm_r600_db_cntl *db_cntl;
 	int r;
 
-	db_cntl = kmalloc(sizeof(*db_cntl), GFP_KERNEL);
+	db_cntl = kmalloc(sizeof(struct drm_r600_db_cntl), GFP_KERNEL);
 	if (db_cntl == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(db_cntl, 0, sizeof(*db_cntl));
-	r = radeon_atom_init(&db_cntl->atom, &atoms->idr, &r600_db_cntl_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			db_cntl->pkts);
+	memcpy(db_cntl, data, sizeof(struct drm_r600_db_cntl));
+	atom->state = db_cntl;
+	r = radeon_atom_init(atom, &atoms->idr, &radeon_atom_emit_default);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pdb_cntl, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_db_cntl));
-	db_cntl->need_s = 0;
-	db_cntl->need_z = 0;
-	db_cntl->need_h = 0;
-	if (G_028800_STENCIL_ENABLE(pdb_cntl.db_depth_control) ||
-		G_028D10_FORCE_STENCIL_READ(pdb_cntl.db_render_override)) {
-		db_cntl->need_s = 1;
-	}
-	if (G_028800_Z_ENABLE(pdb_cntl.db_depth_control) ||
-		G_028800_Z_WRITE_ENABLE(pdb_cntl.db_depth_control) ||
-		G_028D10_FORCE_Z_READ(pdb_cntl.db_render_override)) {
-		db_cntl->need_z = 1;
-	}
-	if (G_028D10_FORCE_HIZ_ENABLE(pdb_cntl.db_render_override) == 1 ||
-		G_028D10_FORCE_HIS_ENABLE0(pdb_cntl.db_render_override) == 1 ||
-		G_028D10_FORCE_HIS_ENABLE1(pdb_cntl.db_render_override) == 1) {
-		db_cntl->need_h = 1;
-	}
+		return r;
 	/* DB_STENCIL_CLEAR */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x0000000A;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_stencil_clear;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_depth_clear;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000000A;
+	atom->pkts[atom->npkts++] = db_cntl->db_stencil_clear;
+	atom->pkts[atom->npkts++] = db_cntl->db_depth_clear;
 	/* DB_STENCILREFMASK */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x0000010C;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_stencilrefmask;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_stencilrefmask_bf;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000010C;
+	atom->pkts[atom->npkts++] = db_cntl->db_stencilrefmask;
+	atom->pkts[atom->npkts++] = db_cntl->db_stencilrefmask_bf;
 	/* DB_DEPTH_CONTROL */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x00000200;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_depth_control;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000200;
+	atom->pkts[atom->npkts++] = db_cntl->db_depth_control;
 	/* DB_SHADER_CONTROL */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x00000203;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_shader_control;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000203;
+	atom->pkts[atom->npkts++] = db_cntl->db_shader_control;
 	/* DB_RENDER_CONTROL */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x00000343;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_render_control;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_render_override;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000343;
+	atom->pkts[atom->npkts++] = db_cntl->db_render_control;
+	atom->pkts[atom->npkts++] = db_cntl->db_render_override;
 	/* DB_SRESULTS_COMPARE_STATE1 */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x0000034B;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_sresults_compare_state1;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_preload_control;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000034B;
+	atom->pkts[atom->npkts++] = db_cntl->db_sresults_compare_state1;
+	atom->pkts[atom->npkts++] = db_cntl->db_preload_control;
 	/* DB_ALPHA_TO_MASK */
-	db_cntl->pkts[db_cntl->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	db_cntl->pkts[db_cntl->atom.npkts++] = 0x00000351;
-	db_cntl->pkts[db_cntl->atom.npkts++] = pdb_cntl.db_alpha_to_mask;
-	*atom = &db_cntl->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000351;
+	atom->pkts[atom->npkts++] = db_cntl->db_alpha_to_mask;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&db_cntl->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_vs_shader
  */
-struct r600_vs_shader {
-	struct radeon_atom		atom;
-	u32				pkts[128];
-	struct drm_r600_vs_shader	vs;
-	struct r600_atoms		*atoms;
-};
-
-static void r600_vs_shader_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_vs_shader *vs_shader = container_of(atom, struct r600_vs_shader, atom);
-
-	mutex_lock(&vs_shader->atoms->mutex);
-	list_del_init(&vs_shader->atom.list);
-	mutex_unlock(&vs_shader->atoms->mutex);
-	kfree(vs_shader->vs.opcodes);
-	kfree(vs_shader);
-}
-
 static int r600_vs_shader_emit(struct radeon_device *rdev,
 			struct radeon_atom *atom,
 			void *data,
 			struct radeon_ib *ib)
 {
-	struct r600_vs_shader *vs_shader = (struct r600_vs_shader *)atom;
+	struct drm_r600_vs_shader *vs_shader = atom->state;
 	struct r600_batch *batch = (struct r600_batch *)data;
 	u32 *opcodes = batch->shaders->ptr, ndwords;
 	int r;
 
 	r = r600_shader_build_fs(rdev, &opcodes[batch->shaders_idx], &ndwords,
-				&batch->inputs, &vs_shader->vs);
+				&batch->inputs.drm, vs_shader);
 	if (r)
 		return r;
-	vs_shader->pkts[2] = batch->shaders_idx >> 6;
-	vs_shader->pkts[4] = radeon_ib_reloc(ib, batch->shaders, RADEON_GEM_DOMAIN_GTT);
+	atom->pkts[2] = batch->shaders_idx >> 6;
+	atom->pkts[4] = radeon_ib_reloc(ib, batch->shaders, RADEON_GEM_DOMAIN_GTT);
 	batch->shaders_idx += (ndwords + 63) & 0xFFFFFFC0;
-	memcpy(&opcodes[batch->shaders_idx], vs_shader->vs.opcodes, vs_shader->vs.ndwords * 4);
-	vs_shader->pkts[13] = batch->shaders_idx >> 6;
-	vs_shader->pkts[15] = radeon_ib_reloc(ib, batch->shaders, RADEON_GEM_DOMAIN_GTT);
-	batch->shaders_idx += (vs_shader->vs.ndwords + 63) & 0xFFFFFFC0;
-	r = radeon_ib_copy(ib, vs_shader->pkts, atom->npkts);
+	memcpy(&opcodes[batch->shaders_idx], vs_shader->opcodes, vs_shader->ndwords * 4);
+	atom->pkts[13] = batch->shaders_idx >> 6;
+	atom->pkts[15] = radeon_ib_reloc(ib, batch->shaders, RADEON_GEM_DOMAIN_GTT);
+	batch->shaders_idx += (vs_shader->ndwords + 63) & 0xFFFFFFC0;
+	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
 	return r;
 }
 
 static int r600_vs_shader_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_vs_shader pvs_shader;
-	struct r600_vs_shader *vs_shader;
+	struct drm_r600_vs_shader *vs_shader;
 	int r, i, j;
 	u32 tmp;
 
-	vs_shader = kmalloc(sizeof(*vs_shader), GFP_KERNEL);
+	vs_shader = kmalloc(sizeof(struct drm_r600_vs_shader), GFP_KERNEL);
 	if (vs_shader == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(vs_shader, 0, sizeof(*vs_shader));
-	r = radeon_atom_init(&vs_shader->atom, &atoms->idr, &r600_vs_shader_release,
-			&r600_vs_shader_emit, &r600_atom_process_default,
-			vs_shader->pkts);
+	memcpy(vs_shader, data, sizeof(struct drm_r600_vs_shader));
+	atom->state = vs_shader;
+	r = radeon_atom_init(atom, &atoms->idr, &r600_vs_shader_emit);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pvs_shader, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_vs_shader));
-	if (pvs_shader.ndwords > ((R600_SHADER_SIZE / 2) - 1024)) {
-		dev_err(rdev->dev, "shader too big\n");
-		r = -EINVAL;
-		goto out_err;
-	}
-	memcpy(&vs_shader->vs, &pvs_shader, sizeof(struct drm_r600_vs_shader));
-	vs_shader->vs.opcodes = kmalloc(4 * pvs_shader.ndwords, GFP_KERNEL);
-	if (vs_shader->vs.opcodes == NULL) {
-		dev_err(rdev->dev, "shader too big\n");
-		r = -ENOMEM;
-		goto out_err;
-	}
-	memcpy(vs_shader->vs.opcodes, pvs_shader.opcodes, 4 * pvs_shader.ndwords);
-	vs_shader->atom.npkts = 0;
+		return r;
 	/* SQ_PGM_START_FS */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000225;
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000000;
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_NOP, 0);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000225;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* SQ_PGM_RESOURCES_FS */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000229;
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000229;
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* SQ_PGM_CF_OFFSET_FS */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000237;
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000237;
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* SQ_PGM_START_VS */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000216;
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000000;
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_NOP, 0);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000216;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* SQ_PGM_RESOURCES_VS */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x0000021A;
-	vs_shader->pkts[vs_shader->atom.npkts++] = vs_shader->vs.sq_pgm_resources_vs;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x0000021A;
+	atom->pkts[atom->npkts++] = vs_shader->sq_pgm_resources_vs;
 	/* SQ_PGM_CF_OFFSET_VS */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000234;
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000234;
+	atom->pkts[atom->npkts++] = 0;
 	/* SPI_VS_OUT_CONFIG */
-	tmp = S_0286C4_VS_EXPORT_COUNT(vs_shader->vs.noutputs - 1);
-	if (vs_shader->vs.fog_output_id < 32) {
-		tmp |= S_0286C4_VS_OUT_FOG_VEC_ADDR(vs_shader->vs.fog_output_id);
+	tmp = S_0286C4_VS_EXPORT_COUNT(vs_shader->noutputs - 1);
+	if (vs_shader->fog_output_id < 32) {
+		tmp |= S_0286C4_VS_OUT_FOG_VEC_ADDR(vs_shader->fog_output_id);
 		tmp |= S_0286C4_VS_EXPORTS_FOG(1);
 	}
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x000001B1;
-	vs_shader->pkts[vs_shader->atom.npkts++] = tmp;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x000001B1;
+	atom->pkts[atom->npkts++] = tmp;
 	/* SPI_VS_OUT_ID_* */
-	vs_shader->pkts[vs_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 10);
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0x00000185;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 10);
+	atom->pkts[atom->npkts++] = 0x00000185;
 	/* set unused field to 255 */
-	for (i = vs_shader->vs.noutputs; i < 32; i++) {
-		vs_shader->vs.output_semantic[i] = 255;
+	for (i = vs_shader->noutputs; i < 32; i++) {
+		vs_shader->output_semantic[i] = 255;
 	}
 	for (i = 0; i < 8; i++) {
-		vs_shader->pkts[vs_shader->atom.npkts] = 0;
+		atom->pkts[atom->npkts] = 0;
 		for (j = 0; j < 4; j++) {
-			vs_shader->pkts[vs_shader->atom.npkts] |= vs_shader->vs.output_semantic[(i*4)+j] << (j * 8);
+			atom->pkts[atom->npkts] |= vs_shader->output_semantic[(i*4)+j] << (j * 8);
 		}
-		vs_shader->atom.npkts++;
+		atom->npkts++;
 	}
 	/* FIXME: why is their 10 vector if we only have 32 outputs ? */
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0xFFFFFFFF;
-	vs_shader->pkts[vs_shader->atom.npkts++] = 0xFFFFFFFF;
-	*atom = &vs_shader->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = 0xFFFFFFFF;
+	atom->pkts[atom->npkts++] = 0xFFFFFFFF;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&vs_shader->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
  * r600_ps_shader
  */
-struct r600_ps_shader {
-	struct radeon_atom		atom;
-	u32				pkts[64];
-	struct drm_r600_ps_shader	ps;
-	struct r600_atoms		*atoms;
-};
-
-static void r600_ps_shader_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_ps_shader *ps_shader = container_of(atom, struct r600_ps_shader, atom);
-
-	mutex_lock(&ps_shader->atoms->mutex);
-	list_del_init(&ps_shader->atom.list);
-	mutex_unlock(&ps_shader->atoms->mutex);
-	kfree(ps_shader->ps.opcodes);
-	kfree(ps_shader);
-}
-
 static int r600_ps_shader_emit(struct radeon_device *rdev,
 			struct radeon_atom *atom,
 			void *data,
 			struct radeon_ib *ib)
 {
-	struct r600_ps_shader *ps_shader = (struct r600_ps_shader *)atom;
+	struct drm_r600_ps_shader *ps_shader = atom->state;
 	struct r600_batch *batch = (struct r600_batch *)data;
 	u32 *opcodes = batch->shaders->ptr;
 	int r;
 
-	memcpy(&opcodes[batch->shaders_idx], ps_shader->ps.opcodes, ps_shader->ps.ndwords * 4);
-	ps_shader->pkts[2] = batch->shaders_idx >> 6;
-	ps_shader->pkts[4] = radeon_ib_reloc(ib, batch->shaders, RADEON_GEM_DOMAIN_GTT);
-	batch->shaders_idx += (ps_shader->ps.ndwords + 63) & 0xFFFFFFC0;
-	r = radeon_ib_copy(ib, ps_shader->pkts, atom->npkts);
+	memcpy(&opcodes[batch->shaders_idx], ps_shader->opcodes, ps_shader->ndwords * 4);
+	atom->pkts[2] = batch->shaders_idx >> 6;
+	atom->pkts[4] = radeon_ib_reloc(ib, batch->shaders, RADEON_GEM_DOMAIN_GTT);
+	batch->shaders_idx += (ps_shader->ndwords + 63) & 0xFFFFFFC0;
+	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
 	return r;
 }
 
 static int r600_ps_shader_create(struct radeon_device *rdev,
 				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
+				struct radeon_atom *atom,
+				void *data)
 {
-	struct drm_r600_ps_shader pps_shader;
-	struct r600_ps_shader *ps_shader;
+	struct drm_r600_ps_shader *ps_shader;
 	u32 ninputs;
 	int r, i;
 
-	ps_shader = kmalloc(sizeof(*ps_shader), GFP_KERNEL);
+	ps_shader = kmalloc(sizeof(struct drm_r600_ps_shader), GFP_KERNEL);
 	if (ps_shader == NULL)
 		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(ps_shader, 0, sizeof(*ps_shader));
-	r = radeon_atom_init(&ps_shader->atom, &atoms->idr, &r600_ps_shader_release,
-			&r600_ps_shader_emit, &r600_atom_process_default,
-			ps_shader->pkts);
+	memcpy(ps_shader, data, sizeof(struct drm_r600_ps_shader));
+	atom->state = ps_shader;
+	r = radeon_atom_init(atom, &atoms->idr, &r600_ps_shader_emit);
 	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pps_shader, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_ps_shader));
-	if (pps_shader.ndwords > ((R600_SHADER_SIZE / 2) - 1024)) {
-		dev_err(rdev->dev, "shader too big\n");
-		r = -EINVAL;
-		goto out_err;
-	}
-	memcpy(&ps_shader->ps, &pps_shader, sizeof(struct drm_r600_ps_shader));
-	ps_shader->ps.opcodes = kmalloc(4 * pps_shader.ndwords, GFP_KERNEL);
-	if (ps_shader->ps.opcodes == NULL) {
-		dev_err(rdev->dev, "shader too big\n");
-		r = -ENOMEM;
-		goto out_err;
-	}
-	memcpy(ps_shader->ps.opcodes, pps_shader.opcodes, 4 * pps_shader.ndwords);
-	ps_shader->atom.npkts = 0;
+		return r;
 	/* SQ_PGM_START_PS */
-	ps_shader->pkts[ps_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x00000210;
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x00000000;
-	ps_shader->pkts[ps_shader->atom.npkts++] = PKT3(PKT3_NOP, 0);
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000210;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+	atom->pkts[atom->npkts++] = 0x00000000;
 	/* SQ_PGM_RESOURCES_PS */
-	ps_shader->pkts[ps_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x00000214;
-	ps_shader->pkts[ps_shader->atom.npkts++] = pps_shader.sq_pgm_resources_ps;
-	ps_shader->pkts[ps_shader->atom.npkts++] = pps_shader.sq_pgm_exports_ps;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000214;
+	atom->pkts[atom->npkts++] = ps_shader->sq_pgm_resources_ps;
+	atom->pkts[atom->npkts++] = ps_shader->sq_pgm_exports_ps;
 	/* SQ_PGM_CF_OFFSET_PS */
-	ps_shader->pkts[ps_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x00000233;
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000233;
+	atom->pkts[atom->npkts++] = 0;
 	/* setup pixel shader input */
-	ninputs = G_0286CC_NUM_INTERP(ps_shader->ps.spi_ps_in_control_0) + 1;
-	ps_shader->pkts[ps_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, ninputs);
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x00000191;
+	ninputs = G_0286CC_NUM_INTERP(ps_shader->spi_ps_in_control_0) + 1;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, ninputs);
+	atom->pkts[atom->npkts++] = 0x00000191;
 	for (i = 0; i < ninputs; i++) {
-		ps_shader->pkts[ps_shader->atom.npkts++] = ps_shader->ps.spi_ps_input_cntl[i];
+		atom->pkts[atom->npkts++] = ps_shader->spi_ps_input_cntl[i];
 	}
-	ps_shader->pkts[ps_shader->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	ps_shader->pkts[ps_shader->atom.npkts++] = 0x000001B3;
-	ps_shader->pkts[ps_shader->atom.npkts++] = ps_shader->ps.spi_ps_in_control_0;
-	ps_shader->pkts[ps_shader->atom.npkts++] = ps_shader->ps.spi_ps_in_control_1;
-	*atom = &ps_shader->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x000001B3;
+	atom->pkts[atom->npkts++] = ps_shader->spi_ps_in_control_0;
+	atom->pkts[atom->npkts++] = ps_shader->spi_ps_in_control_1;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
-out_err:
-	radeon_atom_put(&ps_shader->atom);
-	*atom = NULL;
-	return r;
 }
 
 /*
@@ -1320,80 +915,70 @@ int r600_atom_create(struct radeon_device *rdev,
 			struct radeon_atom **atomptr)
 {
 	struct radeon_atom *atom;
+	struct r600_state_container *cont;
 	int r;
 
+	*atomptr = NULL;
+	atom = malloc(sizeof(struct radeon_atom));
+	if (atom == NULL)
+		return -ENOMEM;
+	memset(atom, 0, sizeof(struct radeon_atom));
+	cont = patom->data;
 	patom->id = 0;
+	atom->type = patom->type;
+	memcpy(rdev->bo, cont->bo, sizeof(void*) * cont->nbo);
+	rdev->nbo = cont->nbo;
 	mutex_lock(&atoms->mutex);
 	switch (patom->type) {
 	case R600_ATOM_CB:
-		r = r600_cb_create(rdev, atoms, patom, &atom);
+		r = r600_cb_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->cb_atoms);
 		break;
 	case R600_ATOM_CB_CNTL:
-		r = r600_cb_cntl_create(rdev, atoms, patom, &atom);
+		r = r600_cb_cntl_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->cb_cntl_atoms);
 		break;
 	case R600_ATOM_PA:
-		r = r600_pa_create(rdev, atoms, patom, &atom);
+		r = r600_pa_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->pa_atoms);
 		break;
 	case R600_ATOM_VPORT:
-		r = r600_vport_create(rdev, atoms, patom, &atom);
+		r = r600_vport_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->vport_atoms);
 		break;
 	case R600_ATOM_BLEND:
-		r = r600_blend_create(rdev, atoms, patom, &atom);
+		r = r600_blend_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->blend_atoms);
 		break;
 	case R600_ATOM_CONSTANTS:
-		r = r600_constants_create(rdev, atoms, patom, &atom);
+		r = r600_constants_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->constants_atoms);
 		break;
 	case R600_ATOM_DB:
-		r = r600_db_create(rdev, atoms, patom, &atom);
+		r = r600_db_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->db_atoms);
 		break;
 	case R600_ATOM_DB_CNTL:
-		r = r600_db_cntl_create(rdev, atoms, patom, &atom);
+		r = r600_db_cntl_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->db_cntl_atoms);
 		break;
 	case R600_ATOM_VS_SHADER:
-		r = r600_vs_shader_create(rdev, atoms, patom, &atom);
+		r = r600_vs_shader_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->vs_shader_atoms);
 		break;
 	case R600_ATOM_PS_SHADER:
-		r = r600_ps_shader_create(rdev, atoms, patom, &atom);
+		r = r600_ps_shader_create(rdev, atoms, atom, cont->data);
 		if (r)
 			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->ps_shader_atoms);
 		break;
 	default:
 		dev_err(rdev->dev, "unknown R600 atom type 0x%08X\n", patom->type);
@@ -1413,7 +998,7 @@ static int r600_batch_alloc(struct r600_batch **batch)
 	struct r600_batch *rbatch;
 
 	*batch = NULL;
-	rbatch = kmalloc(sizeof(*rbatch), GFP_KERNEL);
+	rbatch = malloc(sizeof(*rbatch));
 	if (rbatch == NULL)
 		return -ENOMEM;
 	INIT_LIST_HEAD(&rbatch->list);
@@ -1533,20 +1118,12 @@ int r600_batches_queue(struct radeon_device *rdev,
 {
 	struct r600_batch *rbatch;
 	struct r600_batches *batches =  &atoms->batches;
-	struct r600_db_cntl *db_cntl;
-	int r, i;
+	int r, i, j;
 
-	for (i = 0; i < batch->inputs.nbuffers; i++) {
-		if (batch->inputs.buffers[i].sq_vtx_constant_word0 >=
-			radeon_bo_size(batch->inputs.buffers[i].bo)) {
-			dev_err(rdev->dev, "offset for vertex buffer %d bigger than buffer\n", i);
-			return -EINVAL;
-		}
-	}
 	r = r600_batch_alloc(&rbatch);
 	if (r)
 		return r;
-	memcpy(&rbatch->inputs, &batch->inputs, sizeof(struct drm_r600_vs_input));
+	memcpy(&rbatch->inputs, &batch->inputs, sizeof(struct r600_vs_input));
 	mutex_lock(&atoms->mutex);
 	i = 0;
 	if (batch->blend == NULL || batch->cb_cntl == NULL ||
@@ -1554,7 +1131,7 @@ int r600_batches_queue(struct radeon_device *rdev,
 		batch->cb == NULL || batch->db_cntl == NULL ||
 		batch->vs_shader == NULL || batch->ps_shader == NULL) {
 		mutex_unlock(&atoms->mutex);
-		kfree(rbatch);
+		free(rbatch);
 		dev_err(rdev->dev, "invalid batch\n");
 		return -EINVAL;
 	}
@@ -1589,26 +1166,6 @@ int r600_batches_queue(struct radeon_device *rdev,
 	if (batch->db)
 		kref_get(&batch->db->kref);
 	rbatch->atoms[i++] = batch->cb; kref_get(&batch->cb->kref);
-	db_cntl = container_of(batch->db_cntl, struct r600_db_cntl, atom);
-	if (db_cntl->need_z || db_cntl->need_h || db_cntl->need_s) {
-		struct r600_db *db;
-		if (batch->db == NULL) {
-			dev_err(rdev->dev, "db control need a db buffer, none supplied\n");
-			r = -EINVAL;
-			goto out_err;
-		}
-		db = container_of(batch->db, struct r600_db, atom);
-		if (db_cntl->need_s && !db->has_s) {
-			dev_err(rdev->dev, "db control need a stencil buffer, none supplied\n");
-			r = -EINVAL;
-			goto out_err;
-		}
-		if (db_cntl->need_h && !db->has_h) {
-			dev_err(rdev->dev, "db control need a hyperz buffer, none supplied\n");
-			r = -EINVAL;
-			goto out_err;
-		}
-	}
 reprocess:
 	radeon_atom_flush_cleanup(&rbatch->pre_flushes);
 	radeon_atom_flush_cleanup(&rbatch->post_flushes);
@@ -1616,19 +1173,21 @@ reprocess:
 	rbatch->npkts = 0;
 	/* flush + wait until = 5dw */
 	rbatch->npkts += 5;
-	for (i = 0; i < rbatch->inputs.nbuffers; i++) {
-		if (!r600_batches_fs_resource_is_present(rdev, batches, &rbatch->inputs.buffers[i])) {
+	for (i = 0; i < rbatch->inputs.drm.nbuffers; i++) {
+		if (!r600_batches_fs_resource_is_present(rdev, batches, &rbatch->inputs.drm.buffers[i])) {
 			rbatch->nfs_resources += 1;
-			rbatch->inputs.buffers[i].resource_id = -1;
+			rbatch->inputs.drm.buffers[i].resource_id = -1;
 		}
 	}
 	rbatch->npkts += rbatch->nfs_resources * 18;
 	for (i = 0; i < R600_BATCH_NATOMS; i++) {
 		if (rbatch->atoms[i]) {
-			r = rbatch->atoms[i]->process(rdev, rbatch->atoms[i], batches->last_id[i], rbatch);
-			if (r)
-				goto out_err;
-			rbatch->nflushes += rbatch->atoms[i]->nflushes;
+			for (j = 0; j < rbatch->atoms[i]->nbo; j++) {
+				r = radeon_atom_flush_add(&rbatch->pre_flushes, rbatch->atoms[i]->bo[j],  rbatch->atoms[i]->flags[j]);
+				if (r < 0)
+					goto out_err;
+			}
+			rbatch->nflushes += rbatch->atoms[i]->nbo;
 			if (batches->last_id[i] != rbatch->atoms[i]->id)
 				rbatch->emit_atoms[rbatch->nemit_atoms++] = rbatch->atoms[i];
 		}
@@ -1658,9 +1217,9 @@ reprocess:
 			batches->last_id[i] = rbatch->atoms[i]->id;
 		}
 	}
-	for (i = 0; i < rbatch->inputs.nbuffers; i++) {
-		if (rbatch->inputs.buffers[i].resource_id == -1) {
-			r600_batches_fs_resource_add(rdev, batches, &rbatch->inputs.buffers[i]);
+	for (i = 0; i < rbatch->inputs.drm.nbuffers; i++) {
+		if (rbatch->inputs.drm.buffers[i].resource_id == -1) {
+			r600_batches_fs_resource_add(rdev, batches, &rbatch->inputs.drm.buffers[i]);
 		}
 	}
 	batches->npkts += rbatch->npkts;
@@ -1675,7 +1234,7 @@ out_err:
 	mutex_unlock(&rdev->asic.r700.atom.mutex);
 	radeon_bo_unmap(rbatch->shaders);
 	radeon_bo_unref(rbatch->shaders);
-	kfree(rbatch);
+	free(rbatch);
 	return r;
 }
 
diff --git a/r600_atom.h b/r600_atom.h
new file mode 100644
index 0000000..5fafaf5
--- /dev/null
+++ b/r600_atom.h
@@ -0,0 +1,59 @@
+/*
+ * Copyright © 2010 Jerome Glisse <glisse@freedesktop.org>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+ */
+#ifndef R600_ATOM_H
+#define R600_ATOM_H
+
+#include "r600_atom_kernel.h"
+
+
+struct radeon_device;
+
+/* public API */
+struct drm_radeon_atom {
+	u32			type;
+	u32			id;
+	void			*data;
+};
+
+struct r600_state_container {
+	void			*data;
+	u32			nbo;
+	struct radeon_bo	*bo[32];
+};
+
+struct r600_vs_input {
+	struct drm_r600_vs_input	drm;
+	struct radeon_bo		*bo[32];
+};
+
+struct drm_r600_batch {
+	struct radeon_atom		*vs_constants;
+	struct radeon_atom		*ps_constants;
+	struct radeon_atom		*blend;
+	struct radeon_atom		*cb;
+	struct radeon_atom		*cb_cntl;
+	struct radeon_atom		*pa;
+	struct radeon_atom		*vport;
+	struct radeon_atom		*db;
+	struct radeon_atom		*db_cntl;
+	struct radeon_atom		*vs_shader;
+	struct radeon_atom		*ps_shader;
+	struct r600_vs_input		inputs;
+};
+
+
+#endif
diff --git a/r600_atom_api.h b/r600_atom_api.h
index a7bf68e..0ee7208 100644
--- a/r600_atom_api.h
+++ b/r600_atom_api.h
@@ -17,227 +17,4 @@
 #ifndef R600_ATOM_API_H
 #define R600_ATOM_API_H
 
-struct radeon_device;
-
-/* public API */
-struct drm_radeon_atom {
-	u32			type;
-	u32			id;
-	u64			data;
-};
-
-/* R700 public API */
-#define R600_ATOM_CB		1
-#define R600_ATOM_PA		2
-#define R600_ATOM_CB_CNTL	3
-#define R600_ATOM_VPORT		4
-#define R600_ATOM_BLEND		5
-#define R600_ATOM_CONSTANTS	6
-#define R600_ATOM_DB		7
-#define R600_ATOM_DB_CNTL	8
-#define R600_ATOM_VS_SHADER	9
-#define R600_ATOM_PS_SHADER	10
-
-struct drm_r600_cb {
-	u32			pitch;
-	u32			height;
-	u32			color_info;
-	u32			nsamples;
-	u32			placements[2];
-	struct radeon_bo	*bo;
-};
-
-struct drm_r600_cb_cntl {
-	u32			cb_target_mask;
-	u32			cb_shader_mask;
-	u32			cb_clrcmp_control;
-	u32			cb_clrcmp_src;
-	u32			cb_clrcmp_dst;
-	u32			cb_clrcmp_msk;
-	u32			cb_color_control;
-	u32			cb_blend_alpha;
-	u32			cb_blend_blue;
-	u32			cb_blend_green;
-	u32			cb_blend_red;
-	u32			cb_clear_alpha;
-	u32			cb_clear_blue;
-	u32			cb_clear_green;
-	u32			cb_clear_red;
-	u32			cb_fog_blue;
-	u32			cb_fog_green;
-	u32			cb_fog_red;
-};
-
-/* tp - texture pipe */
-struct drm_r600_tp {
-	u32			ta_cntl_aux;
-};
-
-/* pa - primitive assembly */
-struct drm_r600_pa {
-	u32			pa_sc_mpass_ps_cntl;
-	u32			pa_sc_mode_cntl;
-	u32			pa_sc_line_cntl;
-	u32			pa_sc_aa_config;
-	u32			pa_sc_aa_sample_locs_mctx;
-	u32			pa_sc_aa_mask;
-	u32			pa_cl_clip_cntl;
-	u32			pa_cl_vte_cntl;
-	u32			pa_cl_vs_out_cntl;
-	u32			pa_cl_naninf_cntl;
-	u32			pa_cl_gb_vert_clip_adj;
-	u32			pa_cl_gb_vert_disc_adj;
-	u32			pa_cl_gb_horz_clip_adj;
-	u32			pa_cl_gb_horz_disc_adj;
-	u32			pa_su_sc_mode_cntl;
-	u32			pa_su_point_size;
-	u32			pa_su_point_minmax;
-	u32			pa_su_line_cntl;
-	u32			pa_sc_line_stipple;
-	u32			pa_su_poly_offset_db_fmt_cntl;
-	u32			pa_su_poly_offset_clamp;
-	u32			pa_su_poly_offset_front_scale;
-	u32			pa_su_poly_offset_front_offset;
-	u32			pa_su_poly_offset_back_scale;
-	u32			pa_su_poly_offset_back_offset;
-};
-
-/* vport - viewport */
-struct drm_r600_vport {
-	u32			pa_sc_vport_zmin_0;
-	u32			pa_sc_vport_zmax_0;
-	u32			pa_cl_vport_xscale_0;
-	u32			pa_cl_vport_xoffset_0;
-	u32			pa_cl_vport_yscale_0;
-	u32			pa_cl_vport_yoffset_0;
-	u32			pa_cl_vport_zscale_0;
-	u32			pa_cl_vport_zoffset_0;
-	u32			pa_sc_screen_scissor_tl;
-	u32			pa_sc_screen_scissor_br;
-	u32			pa_sc_window_offset;
-	u32			pa_sc_window_scissor_tl;
-	u32			pa_sc_window_scissor_br;
-	u32			pa_sc_cliprect_rule;
-	u32			pa_sc_cliprect_0_tl;
-	u32			pa_sc_cliprect_0_br;
-	u32			pa_sc_cliprect_1_tl;
-	u32			pa_sc_cliprect_1_br;
-	u32			pa_sc_cliprect_2_tl;
-	u32			pa_sc_cliprect_2_br;
-	u32			pa_sc_cliprect_3_tl;
-	u32			pa_sc_cliprect_3_br;
-	u32			pa_sc_generic_scissor_tl;
-	u32			pa_sc_generic_scissor_br;
-};
-
-/* blend - blending */
-struct drm_r600_blend {
-	u32			cb_blend0_control;
-	u32			cb_blend1_control;
-	u32			cb_blend2_control;
-	u32			cb_blend3_control;
-	u32			cb_blend4_control;
-	u32			cb_blend5_control;
-	u32			cb_blend6_control;
-	u32			cb_blend7_control;
-	u32			cb_blend_control;
-};
-
-/* constant */
-struct drm_r600_constants {
-	u32			offset;
-	u32			nconstants;
-	u64			constants;
-};
-
-/* db - depth buffer */
-struct drm_r600_db {
-	u32			db_depth_size;
-	u32			db_depth_view;
-	u32			db_depth_info;
-	u32			db_htile_surface;
-	u32			db_prefetch_limit;
-	u32			db_placements[2];
-	u32			hz_placements[2];
-	struct radeon_bo	*db;
-	struct radeon_bo	*hz;
-};
-
-/* db_cntl - depth buffer control */
-struct drm_r600_db_cntl {
-	u32			db_stencil_clear;
-	u32			db_depth_clear;
-	u32			db_stencilrefmask;
-	u32			db_stencilrefmask_bf;
-	u32			db_depth_control;
-	u32			db_shader_control;
-	u32			db_render_control;
-	u32			db_render_override;
-	u32			db_sresults_compare_state1;
-	u32			db_preload_control;
-	u32			db_alpha_to_mask;
-};
-
-/* vs_shader - vertex shader */
-struct drm_r600_vs_shader {
-	u32			sq_pgm_resources_vs;
-	u8			input_semantic[32];
-	u8			input_gpr[32];
-	u8			ninputs;
-	u8			output_semantic[32];
-	u8			fog_output_id;
-	u8			noutputs;
-	u32			ndwords;
-	u32			*opcodes;
-};
-
-/* ps_shader - pixel shader */
-struct drm_r600_ps_shader {
-	u32			spi_ps_in_control_0;
-	u32			spi_ps_in_control_1;
-	u32			spi_ps_input_cntl[32];
-	u32			sq_pgm_resources_ps;
-	u32			sq_pgm_exports_ps;
-	u32			ndwords;
-	u32			*opcodes;
-};
-
-struct drm_r600_vs_buffer {
-	struct radeon_bo	*bo;
-	u32			resource_id;
-	u32			sq_vtx_constant_word0;
-	u32			sq_vtx_constant_word2;
-	u32			sq_vtx_constant_word3;
-};
-
-struct drm_r600_vs_element {
-	u32			buffer_id;
-	u32			semantic;
-	u32			sq_vtx_word0;
-	u32			sq_vtx_word1;
-	u32			sq_vtx_word2;
-};
-
-struct drm_r600_vs_input {
-	u32				nelements;
-	u32				nbuffers;
-	struct drm_r600_vs_element	elements[32];
-	struct drm_r600_vs_buffer	buffers[32];
-};
-
-struct drm_r600_batch {
-	struct radeon_atom		*vs_constants;
-	struct radeon_atom		*ps_constants;
-	struct radeon_atom		*blend;
-	struct radeon_atom		*cb;
-	struct radeon_atom		*cb_cntl;
-	struct radeon_atom		*pa;
-	struct radeon_atom		*vport;
-	struct radeon_atom		*db;
-	struct radeon_atom		*db_cntl;
-	struct radeon_atom		*vs_shader;
-	struct radeon_atom		*ps_shader;
-	struct drm_r600_vs_input	inputs;
-};
-
 #endif
diff --git a/r600_atom_kernel.h b/r600_atom_kernel.h
new file mode 100644
index 0000000..9b3f729
--- /dev/null
+++ b/r600_atom_kernel.h
@@ -0,0 +1,213 @@
+/*
+ * Copyright © 2010 Jerome Glisse <glisse@freedesktop.org>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of version 2 of the GNU General Public License
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
+ */
+#ifndef R600_ATOM_KERNEL_H
+#define R600_ATOM_KERNEL_H
+
+#define R600_ATOM_CB		1
+#define R600_ATOM_PA		2
+#define R600_ATOM_CB_CNTL	3
+#define R600_ATOM_VPORT		4
+#define R600_ATOM_BLEND		5
+#define R600_ATOM_CONSTANTS	6
+#define R600_ATOM_DB		7
+#define R600_ATOM_DB_CNTL	8
+#define R600_ATOM_VS_SHADER	9
+#define R600_ATOM_PS_SHADER	10
+
+struct drm_r600_cb {
+	u32			pitch;
+	u32			height;
+	u32			color_info;
+	u32			nsamples;
+	u32			placements[2];
+	u32			handle;
+};
+
+struct drm_r600_cb_cntl {
+	u32			cb_target_mask;
+	u32			cb_shader_mask;
+	u32			cb_clrcmp_control;
+	u32			cb_clrcmp_src;
+	u32			cb_clrcmp_dst;
+	u32			cb_clrcmp_msk;
+	u32			cb_color_control;
+	u32			cb_blend_alpha;
+	u32			cb_blend_blue;
+	u32			cb_blend_green;
+	u32			cb_blend_red;
+	u32			cb_clear_alpha;
+	u32			cb_clear_blue;
+	u32			cb_clear_green;
+	u32			cb_clear_red;
+	u32			cb_fog_blue;
+	u32			cb_fog_green;
+	u32			cb_fog_red;
+};
+
+/* pa - primitive assembly */
+struct drm_r600_pa {
+	u32			pa_sc_mpass_ps_cntl;
+	u32			pa_sc_mode_cntl;
+	u32			pa_sc_line_cntl;
+	u32			pa_sc_aa_config;
+	u32			pa_sc_aa_sample_locs_mctx;
+	u32			pa_sc_aa_mask;
+	u32			pa_cl_clip_cntl;
+	u32			pa_cl_vte_cntl;
+	u32			pa_cl_vs_out_cntl;
+	u32			pa_cl_naninf_cntl;
+	u32			pa_cl_gb_vert_clip_adj;
+	u32			pa_cl_gb_vert_disc_adj;
+	u32			pa_cl_gb_horz_clip_adj;
+	u32			pa_cl_gb_horz_disc_adj;
+	u32			pa_su_sc_mode_cntl;
+	u32			pa_su_point_size;
+	u32			pa_su_point_minmax;
+	u32			pa_su_line_cntl;
+	u32			pa_sc_line_stipple;
+	u32			pa_su_poly_offset_db_fmt_cntl;
+	u32			pa_su_poly_offset_clamp;
+	u32			pa_su_poly_offset_front_scale;
+	u32			pa_su_poly_offset_front_offset;
+	u32			pa_su_poly_offset_back_scale;
+	u32			pa_su_poly_offset_back_offset;
+};
+
+/* vport - viewport */
+struct drm_r600_vport {
+	u32			pa_sc_vport_zmin_0;
+	u32			pa_sc_vport_zmax_0;
+	u32			pa_cl_vport_xscale_0;
+	u32			pa_cl_vport_xoffset_0;
+	u32			pa_cl_vport_yscale_0;
+	u32			pa_cl_vport_yoffset_0;
+	u32			pa_cl_vport_zscale_0;
+	u32			pa_cl_vport_zoffset_0;
+	u32			pa_sc_screen_scissor_tl;
+	u32			pa_sc_screen_scissor_br;
+	u32			pa_sc_window_offset;
+	u32			pa_sc_window_scissor_tl;
+	u32			pa_sc_window_scissor_br;
+	u32			pa_sc_cliprect_rule;
+	u32			pa_sc_cliprect_0_tl;
+	u32			pa_sc_cliprect_0_br;
+	u32			pa_sc_cliprect_1_tl;
+	u32			pa_sc_cliprect_1_br;
+	u32			pa_sc_cliprect_2_tl;
+	u32			pa_sc_cliprect_2_br;
+	u32			pa_sc_cliprect_3_tl;
+	u32			pa_sc_cliprect_3_br;
+	u32			pa_sc_generic_scissor_tl;
+	u32			pa_sc_generic_scissor_br;
+};
+
+/* blend - blending */
+struct drm_r600_blend {
+	u32			cb_blend0_control;
+	u32			cb_blend1_control;
+	u32			cb_blend2_control;
+	u32			cb_blend3_control;
+	u32			cb_blend4_control;
+	u32			cb_blend5_control;
+	u32			cb_blend6_control;
+	u32			cb_blend7_control;
+	u32			cb_blend_control;
+};
+
+/* constant */
+struct drm_r600_constants {
+	u32			offset;
+	u32			nconstants;
+	u32			constants[512];
+};
+
+/* db - depth buffer */
+struct drm_r600_db {
+	u32			db_depth_size;
+	u32			db_depth_view;
+	u32			db_depth_info;
+	u32			db_htile_surface;
+	u32			db_prefetch_limit;
+	u32			db_placements[2];
+	u32			hz_placements[2];
+	u32			db_handle;
+	u32			hz_handle;
+};
+
+/* db_cntl - depth buffer control */
+struct drm_r600_db_cntl {
+	u32			db_stencil_clear;
+	u32			db_depth_clear;
+	u32			db_stencilrefmask;
+	u32			db_stencilrefmask_bf;
+	u32			db_depth_control;
+	u32			db_shader_control;
+	u32			db_render_control;
+	u32			db_render_override;
+	u32			db_sresults_compare_state1;
+	u32			db_preload_control;
+	u32			db_alpha_to_mask;
+};
+
+/* vs_shader - vertex shader */
+struct drm_r600_vs_shader {
+	u32			sq_pgm_resources_vs;
+	u8			input_semantic[32];
+	u8			input_gpr[32];
+	u8			ninputs;
+	u8			output_semantic[32];
+	u8			fog_output_id;
+	u8			noutputs;
+	u32			ndwords;
+	u32			opcodes[512];
+};
+
+/* ps_shader - pixel shader */
+struct drm_r600_ps_shader {
+	u32			spi_ps_in_control_0;
+	u32			spi_ps_in_control_1;
+	u32			spi_ps_input_cntl[32];
+	u32			sq_pgm_resources_ps;
+	u32			sq_pgm_exports_ps;
+	u32			ndwords;
+	u32			opcodes[512];
+};
+
+struct drm_r600_vs_buffer {
+	struct radeon_bo	*bo;
+	u32			resource_id;
+	u32			sq_vtx_constant_word0;
+	u32			sq_vtx_constant_word2;
+	u32			sq_vtx_constant_word3;
+};
+
+struct drm_r600_vs_element {
+	u32			buffer_id;
+	u32			semantic;
+	u32			sq_vtx_word0;
+	u32			sq_vtx_word1;
+	u32			sq_vtx_word2;
+};
+
+struct drm_r600_vs_input {
+	u32				nelements;
+	u32				nbuffers;
+	struct drm_r600_vs_element	elements[32];
+	struct drm_r600_vs_buffer	buffers[32];
+};
+
+#endif
diff --git a/r600_winsys.h b/r600_winsys.h
index 616be8a..42096d1 100644
--- a/r600_winsys.h
+++ b/r600_winsys.h
@@ -17,7 +17,7 @@
 #ifndef R600_WINSYS_H
 #define R600_WINSYS_H
 
-#include "r600_atom_api.h"
+#include "r600_atom.h"
 
 /* opaque structure */
 struct radeon_device *rdev;
diff --git a/radeon_atom.c b/radeon_atom.c
index 989d18c..b46002e 100644
--- a/radeon_atom.c
+++ b/radeon_atom.c
@@ -18,19 +18,13 @@
 
 int radeon_atom_init(struct radeon_atom *atom,
 			struct idr *idp,
-			radeon_atom_release_t release,
-			radeon_atom_emit_t emit,
-			radeon_atom_process_t process,
-			u32 *pkts)
+			radeon_atom_emit_t emit)
 {
 	int r;
 
 	INIT_LIST_HEAD(&atom->list);
 	kref_init(&atom->kref);
-	atom->release = release;
 	atom->emit = emit;
-	atom->process = process;
-	atom->pkts = pkts;
 	atom->nflushes = 0;
 	r = idr_pre_get(idp, GFP_KERNEL);
 	if (r)
@@ -118,3 +112,14 @@ int radeon_batches_flush(struct radeon_device *rdev)
 {
 	return r600_batches_flush(rdev, &rdev->asic.r700.atoms);
 }
+
+struct radeon_bo *radeon_bo_lookup(struct radeon_device *rdev, u32 handle)
+{
+	int i;
+
+	for (i = 0; i < rdev->nbo; i++) {
+		if (rdev->bo[i] && rdev->bo[i]->handle == handle)
+			return rdev->bo[i];
+	}
+	return NULL;
+}
diff --git a/radeon_atom.h b/radeon_atom.h
index 9caeb73..0c57287 100644
--- a/radeon_atom.h
+++ b/radeon_atom.h
@@ -33,23 +33,20 @@ typedef int (*radeon_atom_emit_t)(struct radeon_device*,
 					struct radeon_atom*,
 					void *data,
 					struct radeon_ib*);
-typedef int (*radeon_atom_process_t)(struct radeon_device*,
-					struct radeon_atom*,
-					u32 last_id,
-					void*);
-typedef void (*radeon_atom_release_t)(struct kref *kref);
 
 struct radeon_atom {
-	struct list_head	list;
-	struct kref		kref;
-	u32			type;
-	u32			id;
-	u32			nflushes;
-	u32			npkts;
-	u32			*pkts;
-	radeon_atom_emit_t	emit;
-	radeon_atom_process_t	process;
-	radeon_atom_release_t	release;
+	struct list_head		list;
+	struct kref			kref;
+	u32				type;
+	u32				id;
+	u32				nflushes;
+	u32				npkts;
+	u32				nbo;
+	u32				pkts[256];
+	struct radeon_bo		*bo[32];
+	u32				flags[32];
+	void				*state;
+	radeon_atom_emit_t		emit;
 };
 
 /* R600 */
@@ -65,7 +62,7 @@ struct r600_batch {
 	u32				npkts;
 	struct radeon_bo		*shaders;
 	u32				shaders_idx;
-	struct drm_r600_vs_input	inputs;
+	struct r600_vs_input		inputs;
 	u32				nfs_resources;
 };
 
@@ -102,10 +99,7 @@ struct r600_atoms {
 
 extern int radeon_atom_init(struct radeon_atom *atom,
 				struct idr *idp,
-				radeon_atom_release_t release,
-				radeon_atom_emit_t emit,
-				radeon_atom_process_t process,
-				u32 *pkts);
+				radeon_atom_emit_t emit);
 extern void radeon_atom_flush_cleanup(struct list_head *flushes);
 extern int radeon_atom_flush_add(struct list_head *flushes, struct radeon_bo *bo, u32 flags);
 extern int radeon_atom_find_locked(struct list_head *atoms, u32 id,
@@ -114,10 +108,23 @@ extern int radeon_atom_emit_default(struct radeon_device *rdev,
 					struct radeon_atom *atom,
 					void *data,
 					struct radeon_ib *ib);
+static void radeon_atom_release(struct kref *kref)
+{
+	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
+	int i;
+
+	for (i = 0; i < atom->nbo; i++) {
+		radeon_bo_unref(atom->bo[i]);
+	}
+	free(atom->state);
+	free(atom);
+}
+
 static inline void radeon_atom_put(struct radeon_atom *atom)
 {
-	kref_put(&atom->kref, atom->release);
+	kref_put(&atom->kref, radeon_atom_release);
 }
+struct radeon_bo *radeon_bo_lookup(struct radeon_device *rdev, u32 handle);
 
 /* R600 */
 extern void r600_shader_disassemble(u32 *bytecode, u32 ndwords);
diff --git a/radeon_device.h b/radeon_device.h
index e860324..e84f69d 100644
--- a/radeon_device.h
+++ b/radeon_device.h
@@ -41,6 +41,8 @@ struct radeon_device {
 	struct radeon			*radeon;
 	int				fd;
 	union radeon_asic		asic;
+	struct radeon_bo		*bo[32];
+	u32				nbo;
 };
 
 struct radeon_ib {
diff --git a/test.c b/test.c
index 25dad5d..0b5c0a8 100644
--- a/test.c
+++ b/test.c
@@ -93,6 +93,7 @@ static float rvbo1[32] = {
 int r600_tri_flat(struct radeon *radeon)
 {
 	struct radeon_device *rdev;
+	struct r600_state_container cont;
 	struct drm_r600_blend blend;
 	struct drm_r600_cb cb;
 	struct drm_r600_cb_cntl cb_cntl;
@@ -126,10 +127,13 @@ int r600_tri_flat(struct radeon *radeon)
 	cb.color_info = 0x08110068;
 	cb.placements[0] = RADEON_GEM_DOMAIN_VRAM;
 	cb.placements[1] = 0;
-	cb.bo = radeon->mode.bo;
+	cb.handle = radeon->mode.bo->handle;
 	atom.type = R600_ATOM_CB;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&cb;
+	cont.bo[0] = radeon->mode.bo;
+	cont.nbo = 1;
+	cont.data = &cb;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.cb);
 	if (r)
 		return r;
@@ -161,7 +165,8 @@ int r600_tri_flat(struct radeon *radeon)
 	pa.pa_su_poly_offset_back_offset = 0x00000000;
 	atom.type = R600_ATOM_PA;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&pa;
+	cont.data = &pa;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.pa);
 	if (r)
 		return r;
@@ -186,7 +191,8 @@ int r600_tri_flat(struct radeon *radeon)
 	cb_cntl.cb_fog_red = 0x00000000;
 	atom.type = R600_ATOM_CB_CNTL;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&cb_cntl;
+	cont.data = &cb_cntl;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.cb_cntl);
 	if (r)
 		return r;
@@ -217,7 +223,8 @@ int r600_tri_flat(struct radeon *radeon)
 	vport.pa_sc_generic_scissor_br = 0x00fa00fa;
 	atom.type = R600_ATOM_VPORT;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&vport;
+	cont.data = &vport;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.vport);
 	if (r)
 		return r;
@@ -233,7 +240,8 @@ int r600_tri_flat(struct radeon *radeon)
 	blend.cb_blend_control = 0x00010001;
 	atom.type = R600_ATOM_BLEND;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&blend;
+	cont.data = &blend;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.blend);
 	if (r)
 		return r;
@@ -242,11 +250,12 @@ int r600_tri_flat(struct radeon *radeon)
 	/* vs constant */
 	vs_constants.nconstants = 4;
 	vs_constants.offset = 0x400;
-	vs_constants.constants = (uintptr_t)vsconstants;
+	memcpy(vs_constants.constants, vsconstants, vs_constants.nconstants * 4 * 4);
 	batch.vs_constants = NULL;
 	atom.type = R600_ATOM_CONSTANTS;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&vs_constants;
+	cont.data = &vs_constants;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.vs_constants);
 	if (r)
 		return r;
@@ -266,7 +275,8 @@ int r600_tri_flat(struct radeon *radeon)
 	db_cntl.db_preload_control = 0x00000000;
 	atom.type = R600_ATOM_DB_CNTL;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&db_cntl;
+	cont.data = &db_cntl;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.db_cntl);
 	if (r)
 		return r;
@@ -280,10 +290,11 @@ int r600_tri_flat(struct radeon *radeon)
 	vs_shader.output_semantic[0] = 4;
 	vs_shader.sq_pgm_resources_vs = 0x00000106;
 	vs_shader.ndwords = 64;
-	vs_shader.opcodes = vsshaders;
+	memcpy(vs_shader.opcodes, vsshaders, vs_shader.ndwords * 4);
 	atom.type = R600_ATOM_VS_SHADER;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&vs_shader;
+	cont.data = &vs_shader;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.vs_shader);
 	if (r)
 		return r;
@@ -295,35 +306,36 @@ int r600_tri_flat(struct radeon *radeon)
 	ps_shader.sq_pgm_resources_ps = 0x00000003;
 	ps_shader.sq_pgm_exports_ps = 0x00000002;
 	ps_shader.ndwords = 20;
-	ps_shader.opcodes = psshaders;
+	memcpy(ps_shader.opcodes, psshaders, ps_shader.ndwords * 4);
 	atom.type = R600_ATOM_PS_SHADER;
 	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&ps_shader;
+	cont.data = &ps_shader;
+	atom.data = &cont;
 	r = radeon_atom_create(rdev, &atom, &batch.ps_shader);
 	if (r)
 		return r;
 
 	/* inputs */
-	batch.inputs.nelements = 2;
-	batch.inputs.nbuffers = 2;
-	batch.inputs.buffers[0].bo = vbo1;
-	batch.inputs.buffers[0].sq_vtx_constant_word0 = 0x00000000;
-	batch.inputs.buffers[0].sq_vtx_constant_word2 = 0x03001C00;
-	batch.inputs.buffers[0].sq_vtx_constant_word3 = 0x00000001;
-	batch.inputs.buffers[1].bo = vbo1;
-	batch.inputs.buffers[1].sq_vtx_constant_word0 = 0x0000000C;
-	batch.inputs.buffers[1].sq_vtx_constant_word2 = 0x02301C00;
-	batch.inputs.buffers[1].sq_vtx_constant_word3 = 0x00000001;
-	batch.inputs.elements[0].buffer_id = 0;
-	batch.inputs.elements[0].semantic = 1;
-	batch.inputs.elements[0].sq_vtx_word0 = 0x7C000000;
-	batch.inputs.elements[0].sq_vtx_word1 = 0x1C351000;
-	batch.inputs.elements[0].sq_vtx_word2 = 0x00080000;
-	batch.inputs.elements[1].buffer_id = 1;
-	batch.inputs.elements[1].semantic = 2;
-	batch.inputs.elements[1].sq_vtx_word0 = 0x7C000000;
-	batch.inputs.elements[1].sq_vtx_word1 = 0x18ED1000;
-	batch.inputs.elements[1].sq_vtx_word2 = 0x00080000;
+	batch.inputs.drm.nelements = 2;
+	batch.inputs.drm.nbuffers = 2;
+	batch.inputs.drm.buffers[0].bo = vbo1;
+	batch.inputs.drm.buffers[0].sq_vtx_constant_word0 = 0x00000000;
+	batch.inputs.drm.buffers[0].sq_vtx_constant_word2 = 0x03001C00;
+	batch.inputs.drm.buffers[0].sq_vtx_constant_word3 = 0x00000001;
+	batch.inputs.drm.buffers[1].bo = vbo1;
+	batch.inputs.drm.buffers[1].sq_vtx_constant_word0 = 0x0000000C;
+	batch.inputs.drm.buffers[1].sq_vtx_constant_word2 = 0x02301C00;
+	batch.inputs.drm.buffers[1].sq_vtx_constant_word3 = 0x00000001;
+	batch.inputs.drm.elements[0].buffer_id = 0;
+	batch.inputs.drm.elements[0].semantic = 1;
+	batch.inputs.drm.elements[0].sq_vtx_word0 = 0x7C000000;
+	batch.inputs.drm.elements[0].sq_vtx_word1 = 0x1C351000;
+	batch.inputs.drm.elements[0].sq_vtx_word2 = 0x00080000;
+	batch.inputs.drm.elements[1].buffer_id = 1;
+	batch.inputs.drm.elements[1].semantic = 2;
+	batch.inputs.drm.elements[1].sq_vtx_word0 = 0x7C000000;
+	batch.inputs.drm.elements[1].sq_vtx_word1 = 0x18ED1000;
+	batch.inputs.drm.elements[1].sq_vtx_word2 = 0x00080000;
 
 	/* batch */
 	r =  radeon_batches_queue(rdev, &batch);