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authorAlexey Sotkin <alexey.sotkin@intel.com>2016-12-02 18:41:02 +0300
committerYaxun (Sam) Liu <yaxun.liu@amd.com>2016-12-02 10:41:02 -0500
commita430c8e4a8193ef1ef5979bf0bac82b033297fa4 (patch)
tree22fe73ef7bbfe9f100f027cf658eddb0149ec4f3
parent1772ae0a8517ac1d9df6790fdb622514d9244247 (diff)
Add declaration of Int8 capability (#198)
-rw-r--r--lib/SPIRV/libSPIRV/SPIRVType.h13
-rw-r--r--test/capability-integers.ll27
2 files changed, 38 insertions, 2 deletions
diff --git a/lib/SPIRV/libSPIRV/SPIRVType.h b/lib/SPIRV/libSPIRV/SPIRVType.h
index 23830b1..3b668e1 100644
--- a/lib/SPIRV/libSPIRV/SPIRVType.h
+++ b/lib/SPIRV/libSPIRV/SPIRVType.h
@@ -142,10 +142,19 @@ public:
bool isSigned() const { return IsSigned;}
SPIRVCapVec getRequiredCapability() const {
SPIRVCapVec CV;
- if (isTypeInt(16))
+ switch (BitWidth) {
+ case 8:
+ CV.push_back(CapabilityInt8);
+ break;
+ case 16:
CV.push_back(CapabilityInt16);
- else if (isTypeInt(64))
+ break;
+ case 64:
CV.push_back(CapabilityInt64);
+ break;
+ default:
+ break;
+ }
return std::move(CV);
}
diff --git a/test/capability-integers.ll b/test/capability-integers.ll
new file mode 100644
index 0000000..d5679e5
--- /dev/null
+++ b/test/capability-integers.ll
@@ -0,0 +1,27 @@
+; RUN: llvm-as < %s | llvm-spirv -spirv-text -o %t
+; RUN: FileCheck < %t %s
+
+; CHECK-DAG: Capability Int8
+; CHECK-DAG: Capability Int16
+; CHECK-DAG: Capability Int64
+
+; CHECK-DAG: TypeInt {{[0-9]+}} 8 0
+; CHECK-DAG: TypeInt {{[0-9]+}} 16 0
+; CHECK-DAG: TypeInt {{[0-9]+}} 64 0
+
+target datalayout = "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024"
+target triple = "spir"
+
+@a = addrspace(1) global i8 0, align 1
+@b = addrspace(1) global i16 0, align 2
+@c = addrspace(1) global i64 0, align 8
+
+!opencl.enable.FP_CONTRACT = !{}
+!opencl.ocl.version = !{!0}
+!opencl.spir.version = !{!0}
+!opencl.used.extensions = !{!1}
+!opencl.used.optional.core.features = !{!1}
+!opencl.compiler.options = !{!1}
+
+!0 = !{i32 2, i32 0}
+!1 = !{}