1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
|
/*
* Copyright (C) 2006-2012 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
* DEALINGS IN THE SOFTWARE.
*/
#ifndef I965_DECODER_UTILS_H
#define I965_DECODER_UTILS_H
#include "i965_decoder.h"
#include "intel_batchbuffer.h"
struct decode_state;
int
mpeg2_wa_slice_vertical_position(
struct decode_state *decode_state,
VAPictureParameterBufferMPEG2 *pic_param
);
void
mpeg2_set_reference_surfaces(
VADriverContextP ctx,
GenFrameStore ref_frames[MAX_GEN_REFERENCE_FRAMES],
struct decode_state *decode_state,
VAPictureParameterBufferMPEG2 *pic_param
);
void
avc_gen_default_iq_matrix(VAIQMatrixBufferH264 *iq_matrix);
unsigned int
avc_get_first_mb_bit_offset(
dri_bo *slice_data_bo,
VASliceParameterBufferH264 *slice_param,
unsigned int mode_flag
);
unsigned int
avc_get_first_mb_bit_offset_with_epb(
dri_bo *slice_data_bo,
VASliceParameterBufferH264 *slice_param,
unsigned int mode_flag
);
void
gen5_fill_avc_ref_idx_state(
uint8_t state[32],
const VAPictureH264 ref_list[32],
unsigned int ref_list_count,
const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
);
void
gen6_send_avc_ref_idx_state(
struct intel_batchbuffer *batch,
const VASliceParameterBufferH264 *slice_param,
const GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]
);
VAStatus
intel_decoder_sanity_check_input(VADriverContextP ctx,
VAProfile profile,
struct decode_state *decode_state);
void
intel_update_avc_frame_store_index(VADriverContextP ctx,
struct decode_state *decode_state,
VAPictureParameterBufferH264 *pic_param,
GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
void
intel_update_vc1_frame_store_index(VADriverContextP ctx,
struct decode_state *decode_state,
VAPictureParameterBufferVC1 *pic_param,
GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
VASliceParameterBufferMPEG2 *
intel_mpeg2_find_next_slice(struct decode_state *decode_state,
VAPictureParameterBufferMPEG2 *pic_param,
VASliceParameterBufferMPEG2 *slice_param,
int *group_idx,
int *element_idx);
void
intel_update_vp8_frame_store_index(VADriverContextP ctx,
struct decode_state *decode_state,
VAPictureParameterBufferVP8 *pic_param,
GenFrameStore frame_store[MAX_GEN_REFERENCE_FRAMES]);
bool
intel_ensure_vp8_segmentation_buffer(VADriverContextP ctx, GenBuffer *buf,
unsigned int mb_width, unsigned int mb_height);
#endif /* I965_DECODER_UTILS_H */
|
