diff options
| author | Gwenole Beauchesne <gwenole.beauchesne@intel.com> | 2014-05-06 20:22:31 +0200 |
|---|---|---|
| committer | Gwenole Beauchesne <gwenole.beauchesne@intel.com> | 2014-05-14 16:33:30 +0200 |
| commit | 039bf508badb9b153429fbe676fe1ce8cccdd61c (patch) | |
| tree | cf65e205886b0127b67c56f1963ed50804059c89 | |
| parent | 15e97bcafad572ed0e481036e75e4ece1aecc632 (diff) | |
batch: fix MI_FLUSH_DW for Broadwell.14.batch.MI_FLUSH_DW
The MI_FLUSH_DW command contains 5 dwords on Broadwell, i.e. one extra
dword for the high order bits of the Address field.
Signed-off-by: Gwenole Beauchesne <gwenole.beauchesne@intel.com>
| -rw-r--r-- | src/intel_batchbuffer.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/intel_batchbuffer.c b/src/intel_batchbuffer.c index bc564d5..01e04d5 100644 --- a/src/intel_batchbuffer.c +++ b/src/intel_batchbuffer.c @@ -247,13 +247,16 @@ intel_batchbuffer_emit_mi_flush(struct intel_batchbuffer *batch) } } else { + const uint32_t extra_dword = !!IS_GEN8(intel->device_id); uint32_t cmd = MI_FLUSH_DW; if (batch->flag == I915_EXEC_BSD) cmd |= MI_FLUSH_DW_VIDEO_PIPELINE_CACHE_INVALIDATE; - __BEGIN_BATCH(batch, 4, batch->flag); - __OUT_BATCH(batch, cmd); + __BEGIN_BATCH(batch, 4|extra_dword, batch->flag); + __OUT_BATCH(batch, cmd|extra_dword); __OUT_BATCH(batch, 0); + if (extra_dword) + __OUT_BATCH(batch, 0); __OUT_BATCH(batch, 0); __OUT_BATCH(batch, 0); __ADVANCE_BATCH(batch); |