diff options
| author | Edward O'Callaghan <funfunctor@folklore1984.net> | 2017-01-01 20:51:41 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <funfunctor@folklore1984.net> | 2017-01-01 20:51:41 +1100 |
| commit | aa8c0794a24e107e0dc45b9951eefaaeb60a67a7 (patch) | |
| tree | c8c91a41e6955630830fe3de8924d149c300ed6d | |
| parent | 0a1c10c7cb8e0ded3b1df6d6c0edc84b2bf96483 (diff) | |
Signed-off-by: Edward O'Callaghan <funfunctor@folklore1984.net>
| -rw-r--r-- | src/compiler/spirv/spirv_amd.h | 3 | ||||
| -rw-r--r-- | src/compiler/spirv/vtn_amd.c | 27 |
2 files changed, 28 insertions, 2 deletions
diff --git a/src/compiler/spirv/spirv_amd.h b/src/compiler/spirv/spirv_amd.h index abf7c3c08f..8105f96186 100644 --- a/src/compiler/spirv/spirv_amd.h +++ b/src/compiler/spirv/spirv_amd.h @@ -46,6 +46,7 @@ enum AMDSPVShaderBallot { SpvOpSwizzleInvocationsMaskedAMD = 2, SpvOpWriteInvocationAMD = 3, SpvOpMbcntAMD = 4, + SpvOpBallotAMD = 5, }; -#endif +#endif /* SPIRV_AMD_H */ diff --git a/src/compiler/spirv/vtn_amd.c b/src/compiler/spirv/vtn_amd.c index d632975117..b7f6d7587b 100644 --- a/src/compiler/spirv/vtn_amd.c +++ b/src/compiler/spirv/vtn_amd.c @@ -37,7 +37,7 @@ vtn_handle_amd_shader_trinary_minmax_instruction(struct vtn_builder *b, uint32_t unsigned num_inputs = count - 5; assert(num_inputs == 3); nir_ssa_def *src[3] = { NULL, }; - for (unsigned i = 0; i < num_inputs; i++) + for (unsigned i = 0; i < num_inputs; i++) src[i] = vtn_ssa_value(b, w[i + 5])->def; switch ((enum AMDSPVTrinaryMinmax)ext_opcode) { @@ -78,6 +78,31 @@ bool vtn_handle_amd_gcn_shader_instruction(struct vtn_builder *b, uint32_t ext_opcode, const uint32_t *w, unsigned count) { + struct nir_builder *nb = &b->nb; + const struct glsl_type *dest_type = + vtn_value(b, w[1], vtn_value_type_type)->type->type; + struct vtn_value *val = vtn_push_value(b, w[2], vtn_value_type_ssa); + val->ssa = vtn_create_ssa_value(b, dest_type); + + unsigned num_inputs = count - 5; + assert(num_inputs == 3); + + nir_ssa_def *src[3] = { NULL, }; + for (unsigned i = 0; i < num_inputs; i++) + src[i] = vtn_ssa_value(b, w[i + 5])->def; + + switch ((enum AMDSPVGCNShader )ext_opcode) { + case SpvOpFMin3AMD: + val->ssa->def = nir_fmin3(nb, src[0], src[1], src[2]); + break; + case SpvOpCubeFaceIndexAMD: + break; + case SpvOpCubeFaceCoordAMD: + break; + case SpvOpTimeAMD: + break; + } + return false; } |