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path: root/rnndb/nv40_pcounter.xml
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<?xml version="1.0" encoding="UTF-8"?>
<database xmlns="http://nouveau.freedesktop.org/"
	xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
	xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
<import file="copyright.xml"/>

<import file="nvchipsets.xml" />
<import file="g80_defs.xml" />

<domain name="NV_MMIO" bare="yes" prefix="chipset">

<array name="PCOUNTER" offset="0xa000" stride="0x1000" length="1" variants="NV40:GF100">
	<reg32 offset="0x400" name="PRE_SRC" length="8">
		<bitfield low="0" high="7" name="0"/>
		<bitfield low="8" high="15" name="1"/>
		<bitfield low="16" high="23" name="2"/>
		<bitfield low="24" high="31" name="3"/>
	</reg32>
	<reg32 offset="0x420" name="PRE_OP" length="8">
		<bitfield low="0" high="15" name="FUNC"/>
		<bitfield pos="16" name="ARG0_DELAY1"/>
		<bitfield pos="17" name="ARG1_DELAY1"/>
		<bitfield pos="18" name="ARG2" variants="G92-">
			<value value="0" name="SRC2"/>
			<value value="1" name="SRC0_DELAY1"/>
		</bitfield>
		<bitfield pos="19" name="ARG3" variants="G92-">
			<value value="0" name="SRC3"/>
			<value value="1" name="SRC1_DELAY1"/>
		</bitfield>
	</reg32>
	<reg32 offset="0x440" name="START_SRC" length="8">
		<bitfield low="0" high="7" name="0"/>
		<bitfield low="8" high="15" name="1"/>
		<bitfield low="16" high="23" name="2"/>
		<bitfield low="24" high="31" name="3"/>
	</reg32>
	<reg32 offset="0x460" name="START_OP" length="8">
		<bitfield low="0" high="15" name="FUNC"/>
		<bitfield pos="16" name="ARG0_DELAY1"/>
		<bitfield pos="17" name="ARG1_DELAY1"/>
		<bitfield pos="18" name="ARG2" variants="G92-">
			<value value="0" name="SRC2"/>
			<value value="1" name="SRC0_DELAY1"/>
		</bitfield>
		<bitfield pos="19" name="ARG3" variants="G92-">
			<value value="0" name="SRC3"/>
			<value value="1" name="SRC1_DELAY1"/>
		</bitfield>
	</reg32>
	<reg32 offset="0x480" name="EVENT_SRC" length="8">
		<bitfield low="0" high="7" name="0"/>
		<bitfield low="8" high="15" name="1"/>
		<bitfield low="16" high="23" name="2"/>
		<bitfield low="24" high="31" name="3"/>
	</reg32>
	<reg32 offset="0x4a0" name="EVENT_OP" length="8">
		<bitfield low="0" high="15" name="FUNC"/>
		<bitfield pos="16" name="ARG0_DELAY1"/>
		<bitfield pos="17" name="ARG1_DELAY1"/>
		<bitfield pos="18" name="ARG3">
			<value value="0" name="SRC"/>
			<value value="1" name="SETFLAG"/>
		</bitfield>
		<bitfield pos="19" name="ARG2" variants="G92-">
			<value value="0" name="SRC2"/>
			<value value="1" name="SRC0_DELAY1"/>
		</bitfield>
		<bitfield pos="20" name="ARG3_SRC" variants="G92-">
			<value value="0" name="SRC3"/>
			<value value="1" name="SRC1_DELAY1"/>
		</bitfield>
	</reg32>
	<reg32 offset="0x4c0" name="STOP_SRC" length="8">
		<bitfield low="0" high="7" name="0"/>
		<bitfield low="8" high="15" name="1"/>
		<bitfield low="16" high="23" name="2"/>
		<bitfield low="24" high="31" name="3"/>
	</reg32>
	<reg32 offset="0x4e0" name="STOP_OP" length="8">
		<bitfield low="0" high="15" name="FUNC"/>
		<bitfield pos="16" name="ARG0_DELAY1"/>
		<bitfield pos="17" name="ARG1_DELAY1"/>
		<bitfield pos="18" name="ARG3">
			<value value="0" name="SRC"/>
			<value value="1" name="SETFLAG"/>
		</bitfield>
		<bitfield pos="19" name="ARG2" variants="G92-">
			<value value="0" name="SRC2"/>
			<value value="1" name="SRC0_DELAY1"/>
		</bitfield>
		<bitfield pos="20" name="ARG3_SRC" variants="G92-">
			<value value="0" name="SRC3"/>
			<value value="1" name="SRC1_DELAY1"/>
		</bitfield>
	</reg32>
	<reg32 offset="0x500" name="SETFLAG_OP" length="8">
		<bitfield low="0" high="15" name="FUNC"/>
		<bitfield pos="16" name="ARG0_DELAY1"/>
		<bitfield pos="17" name="ARG1_DELAY1"/>
		<bitfield pos="18" name="ARG2" variants="G92-">
			<value value="0" name="SRC2"/>
			<value value="1" name="SRC0_DELAY1"/>
		</bitfield>
		<bitfield pos="19" name="ARG3" variants="G92-">
			<value value="0" name="SRC3"/>
			<value value="1" name="SRC1_DELAY1"/>
		</bitfield>
	</reg32>
	<reg32 offset="0x520" name="CLRFLAG_OP" length="8">
		<bitfield low="0" high="15" name="FUNC"/>
		<bitfield pos="16" name="ARG0_DELAY1"/>
		<bitfield pos="17" name="ARG1_DELAY1"/>
		<bitfield pos="18" name="ARG2" variants="G92-">
			<value value="0" name="SRC2"/>
			<value value="1" name="SRC0_DELAY1"/>
		</bitfield>
		<bitfield pos="19" name="ARG3" variants="G92-">
			<value value="0" name="SRC3"/>
			<value value="1" name="SRC1_DELAY1"/>
		</bitfield>
	</reg32>
	<reg32 offset="0x540" name="SRC_STATUS" length="8">
		<bitfield low="0" high="3" name="PRE"/>
		<bitfield low="4" high="7" name="START"/>
		<bitfield low="8" high="11" name="EVENT"/>
		<bitfield low="12" high="15" name="STOP"/>
	</reg32>
	<reg32 offset="0x560" name="SPEC_SRC" length="8" variants="G84-">
		<bitfield low="0" high="7" name="SWAP"/>
		<bitfield low="8" high="15" name="UNK8"/>
	</reg32>
	<reg32 offset="0x580" name="USER_TRIGGER" length="8" variants="GT215-" access="w">
		<bitfield pos="0" name="VAL_0"/>
		<bitfield pos="1" name="VAL_1"/>
		<bitfield pos="2" name="PULSE_0"/>
		<bitfield pos="3" name="PULSE_1"/>
	</reg32>
	<reg32 offset="0x600" name="CTR_CYCLES" length="8"/>
	<reg32 offset="0x640" name="CTR_CYCLES_ALT" length="8"/>
	<reg32 offset="0x680" name="CTR_EVENT" length="8"/>
	<reg32 offset="0x6a0" name="RECORD_ADDRESS_HIGH" length="8" variants="G92-"/>
	<reg32 offset="0x6c0" name="CTR_START" length="8"/>
	<reg32 offset="0x6e0" name="RECORD_STATUS" length="8" variants="G84-">
		<bitfield pos="0" name="FAULT"/>
		<bitfield low="4" high="31" name="POS" shr="4"/>
	</reg32>
	<reg32 offset="0x700" name="CTR_PRE" length="8"/>
	<reg32 offset="0x720" name="RECORD_LIMIT" length="8" variants="G84-"/>
	<reg32 offset="0x740" name="CTR_STOP" length="8"/>
	<reg32 offset="0x760" name="RECORD_START" length="8" variants="G84-"/>
	<reg32 offset="0x780" name="THRESHOLD" length="8"/>
	<reg32 offset="0x7a0" name="RECORD_CHAN" variants="G84-">
		<bitfield low="0" high="29" name="CHAN" type="g80_channel"/>
		<bitfield pos="31" name="VALID"/>
	</reg32>
	<reg32 offset="0x7a4" name="RECORD_DMA" variants="G84-"/>
	<reg32 offset="0x7a8" name="GCTRL" variants="G84-">
		<bitfield pos="0" name="RECORD_RESET"/>
		<bitfield pos="4" name="PERIODIC_RESET"/>
		<!-- the following are related to PM_TRIGGER / WRCACHE_FLUSH -->
		<bitfield pos="8" name="PGRAPH"/>
		<bitfield pos="9" name="PBSP" variants="G84:G98 G200:MCP77"/>
		<bitfield pos="9" name="PVLD" variants="G98:G200 MCP77-"/>
		<bitfield pos="10" name="PCIPHER" variants="G84:G98 G200:MCP77"/>
		<bitfield pos="10" name="PSEC" variants="G98:G200 MCP77:GT215"/>
		<bitfield pos="11" name="PVP2" variants="G84:G98 G200:MCP77"/>
		<bitfield pos="11" name="PPDEC" variants="G98:G200 MCP77-"/>
		<bitfield pos="12" name="PPPP" variants="G98:G200 MCP77-"/>
		<bitfield pos="18" name="PVCOMP" variants="MCP89-"/>
		<!-- PCOPY missing for some reason -->
	</reg32>
	<reg32 offset="0x7c0" name="CTRL" length="8">
		<bitfield low="0" high="1" name="MODE">
			<value value="0" name="SINGLE"/>
			<value value="1" name="QUAD"/>
			<value value="2" name="RECORD" variants="G84-"/>
		</bitfield>
		<bitfield low="4" high="6" name="CTR_MODE">
			<value value="0" name="SIMPLE"/>
			<value value="1" name="EVENT_B4"/>
			<value value="2" name="EVENT_B6"/>
			<value value="3" name="EXTRA_B4"/>
			<value value="4" name="EXTRA_B6_EVENT_B2"/>
		</bitfield>
		<bitfield pos="8" name="EVENT_CTR_PERIOD">
			<value value="0" name="ONE"/>
			<value value="1" name="ALL"/>
		</bitfield>
		<bitfield pos="11" name="EVENT_IMPORT_MODE">
			<value value="0" name="CONTINUOUS"/>
			<value value="1" name="PULSE"/>
		</bitfield>
		<bitfield pos="13" name="FLAG_IMPORT_MODE">
			<value value="0" name="CONTINUOUS"/>
			<value value="1" name="PULSE"/>
		</bitfield>
		<bitfield pos="16" name="UNK16"/>
		<bitfield pos="20" name="RECORD_FORMAT" variants="G84-">
			<value value="0" name="LONG"/>
			<value value="1" name="SHORT"/>
		</bitfield>
		<bitfield low="21" high="23" name="PERIODIC_PERIOD" variants="G84-">
			<value value="0" name="DISABLED"/>
			<value value="1" name="1K"/>
			<value value="2" name="2K"/>
			<value value="3" name="4K"/>
			<value value="4" name="8K"/>
			<value value="5" name="16K"/>
			<value value="6" name="32K"/>
			<value value="7" name="64K"/>
		</bitfield>
		<bitfield low="24" high="25" name="QUAD_STATE">
			<value value="0" name="EMPTY"/>
			<value value="1" name="VALID"/>
			<value value="3" name="OVERFLOW"/>
		</bitfield>
		<bitfield pos="27" name="FAULT_CLEAR"/>
		<bitfield low="28" high="29" name="SINGLE_STATE">
			<value value="0" name="INACTIVE"/>
			<value value="1" name="WAIT_PRE"/>
			<value value="2" name="WAIT_START"/>
			<value value="3" name="COUNTING"/>
		</bitfield>
		<bitfield pos="30" name="UNK30" variants="G92-"/>
	</reg32>
	<reg32 offset="0x7e0" name="QUAD_ACK_TRIGGER" length="8"/>
	<stripe offset="0x0800" stride="0x20" length="8">
		<reg32 offset="0" name="STATUS" length="8"/>
	</stripe>
</array>

</domain>

<domain name="G84_PCOUNTER_RECORD_PACKET" size="0x20">
	<reg16 offset="0x00" name="CYCLES_LOW"/>
	<reg16 offset="0x02" name="CYCLES_MID"/>
	<reg16 offset="0x04" name="CYCLES_HIGH"/>
	<reg16 offset="0x06" name="STOP"/>
	<reg16 offset="0x08" name="PRE_SRC0"/>
	<reg16 offset="0x0a" name="PRE_SRC1"/>
	<reg16 offset="0x0c" name="PRE_SRC2"/>
	<reg16 offset="0x0e" name="PRE_SRC3"/>
	<reg16 offset="0x10" name="START_SRC0"/>
	<reg16 offset="0x12" name="START_SRC1"/>
	<reg16 offset="0x14" name="START_SRC2"/>
	<reg16 offset="0x16" name="START_SRC3"/>
	<reg16 offset="0x18" name="EVENT_SRC0"/>
	<reg16 offset="0x1a" name="EVENT_SRC1"/>
	<reg16 offset="0x1c" name="EVENT_SRC2"/>
	<reg16 offset="0x1e" name="EVENT_SRC3"/>
</domain>

</database>