summaryrefslogtreecommitdiff
path: root/lib
AgeCommit message (Expand)AuthorFilesLines
2011-11-04Call Arrandale gen5 not gen4.Chris Wilson1-1/+1
2011-11-01cargo-cult the build system into shapeDaniel Vetter1-0/+1
2011-11-01always require libdrmDaniel Vetter1-8/+5
2011-10-30make distcheck fixesDaniel Vetter1-0/+4
2011-10-28intel_reg_dumper: handle 3 pipe configs when dumping HDMI configJesse Barnes1-0/+1
2011-10-15tests/gem_*_blits: reduce buffer count to not trash swapDaniel Vetter2-0/+18
2011-10-10Treat PPT like CPT as we do in the kernelJesse Barnes1-1/+2
2011-09-15drm_open_any: explain why we are abort()ingPaulo Zanoni1-0/+1
2011-09-12tools: add intel_genDaniel Vetter2-0/+19
2011-09-12tests: basic ring<->cpu and ring<->ring testsDaniel Vetter1-0/+4
2011-09-09lib/batch: hackish interface to run batches on specific ringsDaniel Vetter2-5/+11
2011-07-28tools/range handing: forgot the register map file :(Ben Widawsky1-0/+178
2011-07-28intel-gpu-tools/debugging: shader debuggerBen Widawsky1-0/+92
2011-07-28intel-gpu-tools/debugging: add important debug regsBen Widawsky1-0/+4
2011-07-28intel-gpu-tools/range handling: register range handlingBen Widawsky4-2/+69
2011-07-28forcewake: Add mmio code to do proper forcewake stuff for gen6Ben Widawsky2-1/+130
2011-05-24gem_stress: Add render copyfunc for SandyBridgeChris Wilson3-268/+12
2011-05-17Add Ivybridge support to intel_gpu_dump and the BLT tests.Eric Anholt2-2/+7
2011-05-10Add Ivybridge device IDsJesse Barnes1-3/+19
2011-04-04gem_stress: gen2 render copyDaniel Vetter1-0/+805
2011-03-29gem_stress: render copy on gen3Daniel Vetter2-0/+1463
2011-03-29lib: execbuffer2 supportDaniel Vetter2-6/+19
2011-03-25Move gen5 blitter work-around to libDaniel Vetter1-0/+9
2011-02-14Remove confusing use of IS_9XXChris Wilson3-11/+6
2011-02-06Fix typo excluding Ironlake from IS_INTELChris Wilson1-1/+1
2011-02-01Search for the first Intel dri device.Chris Wilson3-8/+50
2011-02-01Exercise the whole aperture with tiled blitsChris Wilson2-45/+15
2010-12-16intel_disable_clock_gating: New tool for turning off clock gating on ILK.Eric Anholt1-0/+7
2010-10-26Prepare for split BLT ring on Sandybridge.Chris Wilson2-7/+14
2010-09-27Add all sandybridge device idsZhenyu Wang1-4/+14
2010-09-20intel_reg_dumper: eDP port is on the CPU, not PCHJesse Barnes1-1/+1
2010-09-05reg dumper: Dump ILK panel fitting control debug registersChris Wilson1-0/+6
2010-06-30intel_reg_dumper: add some 945 MI reg dumpingJesse Barnes2-0/+5
2010-04-15reg dump update for SNB/CPTZhenyu Wang1-0/+103
2010-04-15Add PCH chipset type check for CougarpointZhenyu Wang2-0/+27
2010-04-08Enable compilation on non-Intel, non-DRM systems.Chris Wilson9-114/+213
2010-04-05intel_reg_dumper: Add support for reading register dumps from filesAdam Jackson2-0/+28
2010-03-24Fix INSTDONE1 bits on g4x, and use those on Ironlake too.Eric Anholt2-20/+102
2010-03-24Add Ironlake INSTDONE bits.Eric Anholt2-0/+64
2010-02-25Add support for Sandybridge INSTDONE regs.Eric Anholt2-1/+148
2010-02-25Add support for Sandybridge mobile chipset.Eric Anholt1-1/+3
2010-02-25Add some initial definitions for Sandybridge.Eric Anholt1-3/+13
2010-01-15reg_dump: Dump display port register on IronlakeZhao Yakui1-0/+4
2009-11-06Add: tools/intel_audio_dumpWu Fengguang2-0/+7
2009-10-06Add intel_gpu_dump from the 2D driver.Eric Anholt2-0/+550
2009-09-08Add support for new chipsXiang, Haihao1-1/+9
2009-09-04Add INSTDONE bits for 830-865.Eric Anholt2-0/+56
2009-06-30intel_gpu_top: Move instdone bit definitions to lib to share with _dump.Eric Anholt3-0/+182
2009-06-23Add more 965 INSTDONE bits.Eric Anholt1-0/+20
2009-06-18Four new tests for error handlingJesse Barnes1-0/+7
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-15 04:49:17 +0000