diff options
| author | Mark Kettenis <kettenis@openbsd.org> | 2011-02-20 22:51:04 +0100 |
|---|---|---|
| committer | Alex Deucher <alexdeucher@gmail.com> | 2011-02-21 10:54:33 -0500 |
| commit | acd54a48a6680956ed903fc890204c0c910b6712 (patch) | |
| tree | a10b178e3ee628aaf7f88b92db6fd4a3cbfcfb9c | |
| parent | d7c2ba4286ea32401c0026cb92ec167f7b5753d8 (diff) | |
Properly restore CLOCK_CNTL_INDEX register
RADEONRestore() restores the CLOCK_CNTL_INDEX register before calling
RADEONRestorePLLRegisters(), which modifies the CLOCK_CNTL_INDEX register
to access the PLL registers. As a result we may end up with the wrong clock
being selected when exiting X. This happens on platforms where the driver
doesn't save and restore the VGA state.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
| -rw-r--r-- | src/radeon_driver.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/radeon_driver.c b/src/radeon_driver.c index 20a81e6..35c2761 100644 --- a/src/radeon_driver.c +++ b/src/radeon_driver.c @@ -5825,8 +5825,6 @@ static void RADEONRestore(ScrnInfoPtr pScrn) RADEONRestoreMemMapRegisters(pScrn, restore); avivo_restore(pScrn, restore); } else { - OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index); - RADEONPllErrataAfterIndex(info); OUTREG(RADEON_RBBM_SOFT_RESET, restore->rbbm_soft_reset); OUTREG(RADEON_DP_DATATYPE, restore->dp_datatype); OUTREG(RADEON_GRPH_BUFFER_CNTL, restore->grph_buffer_cntl); @@ -5852,6 +5850,9 @@ static void RADEONRestore(ScrnInfoPtr pScrn) RADEONRestoreTVRegisters(pScrn, restore); } + OUTREG(RADEON_CLOCK_CNTL_INDEX, restore->clock_cntl_index); + RADEONPllErrataAfterIndex(info); + RADEONRestoreBIOSRegisters(pScrn, restore); } |