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| author | Francisco Jerez <currojerez@riseup.net> | 2019-08-05 18:12:15 -0700 |
|---|---|---|
| committer | Francisco Jerez <currojerez@riseup.net> | 2019-09-03 12:16:51 -0700 |
| commit | 886fe2fd7ee06b92e91e01376e3b93c7d6f5f902 (patch) | |
| tree | 796de726e2cdb8bb611b429ecfd517bf02d4e296 | |
| parent | 4020ded10c3cea8b5f10936864e147293564b866 (diff) | |
intel/ir: Represent physical edge of ELSE instruction.
This edge doesn't exist in the original scalar program, but it
represents a potential control flow path the EU will take in cases
where the condition isn't uniform across channels of the same SIMD
thread.
| -rw-r--r-- | src/intel/compiler/brw_cfg.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_cfg.cpp b/src/intel/compiler/brw_cfg.cpp index 0a1c84a2994..69bcf8b531e 100644 --- a/src/intel/compiler/brw_cfg.cpp +++ b/src/intel/compiler/brw_cfg.cpp @@ -212,6 +212,7 @@ cfg_t::cfg_t(exec_list *instructions) next = new_block(); assert(cur_if != NULL); cur_if->add_successor(mem_ctx, next, bblock_link_logical); + cur_else->add_successor(mem_ctx, next, bblock_link_physical); set_next_block(&cur, next, ip); break; |