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Diffstat (limited to 'src/radeon.h')
-rw-r--r--src/radeon.h188
1 files changed, 30 insertions, 158 deletions
diff --git a/src/radeon.h b/src/radeon.h
index ea9e451..9ce251a 100644
--- a/src/radeon.h
+++ b/src/radeon.h
@@ -75,7 +75,6 @@
#include "dri.h"
#include "GL/glxint.h"
#include "xf86drm.h"
-#include "radeon_drm.h"
#ifdef DAMAGE
#include "damage.h"
@@ -86,15 +85,6 @@
#include "xf86Crtc.h"
#include "X11/Xatom.h"
-#ifdef XF86DRM_MODE
-#include "radeon_bo.h"
-#include "radeon_cs.h"
-#include "radeon_dri2.h"
-#include "drmmode_display.h"
-#else
-#include "radeon_dummy_bufmgr.h"
-#endif
-
/* Render support */
#ifdef RENDER
#include "picturestr.h"
@@ -272,7 +262,6 @@ typedef struct {
#define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
#define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
#define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
-#define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11)
typedef struct {
uint16_t reference_freq;
@@ -344,7 +333,6 @@ typedef enum {
CHIP_FAMILY_RV770,
CHIP_FAMILY_RV730,
CHIP_FAMILY_RV710,
- CHIP_FAMILY_RV740,
CHIP_FAMILY_LAST
} RADEONChipFamily;
@@ -460,11 +448,6 @@ typedef struct {
typedef struct _atomBiosHandle *atomBiosHandlePtr;
-struct radeon_exa_pixmap_priv {
- struct radeon_bo *bo;
- int flags;
-};
-
typedef struct {
uint32_t pci_device_id;
RADEONChipFamily chip_family;
@@ -475,25 +458,6 @@ typedef struct {
int singledac;
} RADEONCardInfo;
-#define RADEON_2D_EXA_COPY 1
-#define RADEON_2D_EXA_SOLID 2
-
-struct radeon_2d_state {
- int op; //
- uint32_t dst_pitch_offset;
- uint32_t src_pitch_offset;
- uint32_t dp_gui_master_cntl;
- uint32_t dp_cntl;
- uint32_t dp_write_mask;
- uint32_t dp_brush_frgd_clr;
- uint32_t dp_brush_bkgd_clr;
- uint32_t dp_src_frgd_clr;
- uint32_t dp_src_bkgd_clr;
- uint32_t default_sc_bottom_right;
- struct radeon_bo *dst_bo;
- struct radeon_bo *src_bo;
-};
-
#ifdef XF86DRI
struct radeon_cp {
Bool CPRuns; /* CP is running */
@@ -672,15 +636,9 @@ struct radeon_accel_state {
#define EXA_ENGINEMODE_2D 1
#define EXA_ENGINEMODE_3D 2
- int composite_op;
- PicturePtr dst_pic;
- PicturePtr msk_pic;
- PicturePtr src_pic;
- PixmapPtr dst_pix;
- PixmapPtr msk_pix;
- PixmapPtr src_pix;
Bool is_transform[2];
PictTransform *transform[2];
+ Bool has_mask;
/* Whether we are tiling horizontally and vertically */
Bool need_src_tile_x;
Bool need_src_tile_y;
@@ -692,10 +650,6 @@ struct radeon_accel_state {
drmBufPtr ib;
int vb_index;
- uint64_t vb_mc_addr;
- int vb_total;
- void *vb_ptr;
- uint32_t vb_size;
// shader storage
ExaOffscreenArea *shaders;
@@ -725,6 +679,8 @@ struct radeon_accel_state {
uint64_t vs_mc_addr;
uint32_t ps_size;
uint64_t ps_mc_addr;
+ uint32_t vb_size;
+ uint64_t vb_mc_addr;
// UTS/DFS
drmBufPtr scratch;
@@ -867,9 +823,6 @@ typedef struct {
RADEONCardType cardType; /* Current card is a PCI card */
struct radeon_cp *cp;
struct radeon_dri *dri;
-#ifdef XF86DRM_MODE
- struct radeon_dri2 dri2;
-#endif
#ifdef USE_EXA
Bool accelDFS;
#endif
@@ -982,32 +935,6 @@ typedef struct {
float igp_ht_link_clk;
float igp_ht_link_width;
- int can_resize;
- void (*reemit_current2d)(ScrnInfoPtr pScrn, int op); // emit the current 2D state into the IB
- struct radeon_2d_state state_2d;
- Bool kms_enabled;
- struct radeon_bo *front_bo;
-#ifdef XF86DRM_MODE
- struct radeon_bo_manager *bufmgr;
- struct radeon_cs_manager *csm;
- struct radeon_cs *cs;
-
- struct radeon_bo *cursor_bo[2];
- uint64_t vram_size;
- uint64_t gart_size;
- drmmode_rec drmmode;
-#else
- /* fake bool */
- Bool cs;
-#endif
-
- /* Xv bicubic filtering */
- struct radeon_bo *bicubic_bo;
- void *bicubic_memory;
- int bicubic_offset;
-
- /* indicate whether XvMC is eanbled */
- Bool XvMCEnabled;
} RADEONInfoRec, *RADEONInfoPtr;
#define RADEONWaitForFifo(pScrn, entries) \
@@ -1089,7 +1016,6 @@ extern int RADEONCPStop(ScrnInfoPtr pScrn, RADEONInfoPtr info);
# ifdef USE_XAA
extern Bool RADEONSetupMemXAA_DRI(int scrnIndex, ScreenPtr pScreen);
# endif
-uint32_t radeonGetPixmapOffset(PixmapPtr pPix);
#endif
#ifdef USE_XAA
@@ -1189,12 +1115,6 @@ extern void RADEONInitMemMapRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save,
extern void RADEONRestoreMemMapRegisters(ScrnInfoPtr pScrn,
RADEONSavePtr restore);
-Bool RADEONGetRec(ScrnInfoPtr pScrn);
-void RADEONFreeRec(ScrnInfoPtr pScrn);
-Bool RADEONPreInitVisual(ScrnInfoPtr pScrn);
-Bool RADEONPreInitWeight(ScrnInfoPtr pScrn);
-
-
/* radeon_pm.c */
extern void RADEONPMInit(ScrnInfoPtr pScrn);
extern void RADEONPMBlockHandler(ScrnInfoPtr pScrn);
@@ -1269,7 +1189,6 @@ extern void RADEONUpdateHVPosition(xf86OutputPtr output, DisplayModePtr mode);
/* radeon_video.c */
extern void RADEONInitVideo(ScreenPtr pScreen);
extern void RADEONResetVideo(ScrnInfoPtr pScrn);
-extern Bool radeon_load_bicubic_texture(ScrnInfoPtr pScrn);
/* radeon_legacy_memory.c */
extern uint32_t
@@ -1281,15 +1200,6 @@ extern void
radeon_legacy_free_memory(ScrnInfoPtr pScrn,
void *mem_struct);
-#ifdef XF86DRM_MODE
-extern void radeon_cs_flush_indirect(ScrnInfoPtr pScrn);
-extern void radeon_ddx_cs_start(ScrnInfoPtr pScrn,
- int num, const char *file,
- const char *func, int line);
-#endif
-struct radeon_bo *radeon_get_pixmap_bo(PixmapPtr pPix);
-void radeon_set_pixmap_bo(PixmapPtr pPix, struct radeon_bo *bo);
-
#ifdef XF86DRI
# ifdef USE_XAA
/* radeon_accelfuncs.c */
@@ -1308,9 +1218,7 @@ do { \
#define RADEONCP_RELEASE(pScrn, info) \
do { \
- if (info->cs) { \
- radeon_cs_flush_indirect(pScrn); \
- } else if (info->cp->CPInUse) { \
+ if (info->cp->CPInUse) { \
RADEON_PURGE_CACHE(); \
RADEON_WAIT_UNTIL_IDLE(); \
RADEONCPReleaseIndirect(pScrn); \
@@ -1345,7 +1253,7 @@ do { \
#define RADEONCP_REFRESH(pScrn, info) \
do { \
- if (!info->cp->CPInUse && !info->cs) { \
+ if (!info->cp->CPInUse) { \
if (info->cp->needCacheFlush) { \
RADEON_PURGE_CACHE(); \
RADEON_PURGE_ZCACHE(); \
@@ -1376,59 +1284,54 @@ do { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"BEGIN_RING(%d) in %s\n", (unsigned int)n, __FUNCTION__);\
} \
- if (info->cs) { radeon_ddx_cs_start(pScrn, n, __FILE__, __func__, __LINE__); } else { \
- if (++info->cp->dma_begin_count != 1) { \
+ if (++info->cp->dma_begin_count != 1) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"BEGIN_RING without end at %s:%d\n", \
- info->cp->dma_debug_func, info->cp->dma_debug_lineno); \
+ info->cp->dma_debug_func, info->cp->dma_debug_lineno); \
info->cp->dma_begin_count = 1; \
- } \
- info->cp->dma_debug_func = __FILE__; \
- info->cp->dma_debug_lineno = __LINE__; \
- if (!info->cp->indirectBuffer) { \
+ } \
+ info->cp->dma_debug_func = __FILE__; \
+ info->cp->dma_debug_lineno = __LINE__; \
+ if (!info->cp->indirectBuffer) { \
info->cp->indirectBuffer = RADEONCPGetBuffer(pScrn); \
info->cp->indirectStart = 0; \
- } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \
- info->cp->indirectBuffer->total) { \
+ } else if (info->cp->indirectBuffer->used + (n) * (int)sizeof(uint32_t) > \
+ info->cp->indirectBuffer->total) { \
RADEONCPFlushIndirect(pScrn, 1); \
- } \
- __expected = n; \
- __head = (pointer)((char *)info->cp->indirectBuffer->address + \
- info->cp->indirectBuffer->used); \
- __count = 0; \
} \
+ __expected = n; \
+ __head = (pointer)((char *)info->cp->indirectBuffer->address + \
+ info->cp->indirectBuffer->used); \
+ __count = 0; \
} while (0)
#define ADVANCE_RING() do { \
- if (info->cs) radeon_cs_end(info->cs, __FILE__, __func__, __LINE__); else { \
- if (info->cp->dma_begin_count-- != 1) { \
+ if (info->cp->dma_begin_count-- != 1) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"ADVANCE_RING without begin at %s:%d\n", \
__FILE__, __LINE__); \
info->cp->dma_begin_count = 0; \
- } \
- if (__count != __expected) { \
+ } \
+ if (__count != __expected) { \
xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \
"ADVANCE_RING count != expected (%d vs %d) at %s:%d\n", \
__count, __expected, __FILE__, __LINE__); \
- } \
- if (RADEON_VERBOSE) { \
+ } \
+ if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"ADVANCE_RING() start: %d used: %d count: %d\n", \
info->cp->indirectStart, \
info->cp->indirectBuffer->used, \
__count * (int)sizeof(uint32_t)); \
- } \
- info->cp->indirectBuffer->used += __count * (int)sizeof(uint32_t); \
} \
- } while (0)
+ info->cp->indirectBuffer->used += __count * (int)sizeof(uint32_t); \
+} while (0)
#define OUT_RING(x) do { \
if (RADEON_VERBOSE) { \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
" OUT_RING(0x%08x)\n", (unsigned int)(x)); \
} \
- if (info->cs) radeon_cs_write_dword(info->cs, (x)); else \
__head[__count++] = (x); \
} while (0)
@@ -1438,22 +1341,12 @@ do { \
OUT_RING(val); \
} while (0)
-#define OUT_RING_RELOC(x, read_domains, write_domain) \
- do { \
- int _ret; \
- _ret = radeon_cs_write_reloc(info->cs, x, read_domains, write_domain, 0); \
- if (_ret) ErrorF("reloc emit failure %d\n", _ret); \
- } while(0)
-
-
#define FLUSH_RING() \
do { \
if (RADEON_VERBOSE) \
xf86DrvMsg(pScrn->scrnIndex, X_INFO, \
"FLUSH_RING in %s\n", __FUNCTION__); \
- if (info->cs) \
- radeon_cs_flush_indirect(pScrn); \
- else if (info->cp->indirectBuffer) \
+ if (info->cp->indirectBuffer) \
RADEONCPFlushIndirect(pScrn, 0); \
} while (0)
@@ -1529,13 +1422,6 @@ do { \
#endif /* XF86DRI */
#if defined(XF86DRI) && defined(USE_EXA)
-
-#ifdef XF86DRM_MODE
-#define CS_FULL(cs) ((cs)->cdw > 15 * 1024)
-#else
-#define CS_FULL(cs) FALSE
-#endif
-
#define RADEON_SWITCH_TO_2D() \
do { \
uint32_t flush = 0; \
@@ -1546,12 +1432,8 @@ do { \
case EXA_ENGINEMODE_2D: \
break; \
} \
- if (flush) { \
- if (info->cs) \
- radeon_cs_flush_indirect(pScrn); \
- else if (info->directRenderingEnabled) \
- RADEONCPFlushIndirect(pScrn, 1); \
- } \
+ if (flush && info->directRenderingEnabled) \
+ RADEONCPFlushIndirect(pScrn, 1); \
info->accel_state->engineMode = EXA_ENGINEMODE_2D; \
} while (0);
@@ -1560,21 +1442,16 @@ do { \
uint32_t flush = 0; \
switch (info->accel_state->engineMode) { \
case EXA_ENGINEMODE_UNKNOWN: \
- flush = 1; \
- break; \
case EXA_ENGINEMODE_2D: \
- flush = !info->cs || CS_FULL(info->cs); \
+ flush = 1; \
case EXA_ENGINEMODE_3D: \
break; \
} \
if (flush) { \
- if (info->cs) \
- radeon_cs_flush_indirect(pScrn); \
- else if (info->directRenderingEnabled) \
+ if (info->directRenderingEnabled) \
RADEONCPFlushIndirect(pScrn, 1); \
- } \
- if (!info->accel_state->XInited3D) \
RADEONInit3DEngine(pScrn); \
+ } \
info->accel_state->engineMode = EXA_ENGINEMODE_3D; \
} while (0);
#else
@@ -1623,9 +1500,4 @@ static __inline__ int radeon_timedout(const struct timeval *endtime)
now.tv_usec > endtime->tv_usec : now.tv_sec > endtime->tv_sec;
}
-enum {
- RADEON_CREATE_PIXMAP_TILING_MACRO = 0x10000000,
- RADEON_CREATE_PIXMAP_TILING_MICRO = 0x20000000,
-};
-
#endif /* _RADEON_H_ */
generated by cgit v1.2.3 (git 2.39.1) at 2024-06-08 13:32:06 +0000