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authorAlex Deucher <alexdeucher@gmail.com>2009-05-12 17:30:02 -0400
committerAlex Deucher <alexdeucher@gmail.com>2009-05-12 17:30:02 -0400
commitcd89241396d1931b04cfbdd8d553be16dbf9c360 (patch)
treedff6ae0a187deb6d6cd10d478e1a1b1ff1a73f73
parent15ee78d37f8b64c3e6d234e7ab37a31e82327b6b (diff)
R3xx-R5xx: do EXA transforms in the vertex shader
-rw-r--r--src/radeon_commonfuncs.c306
-rw-r--r--src/radeon_exa_render.c99
-rw-r--r--src/radeon_reg.h13
-rw-r--r--src/radeon_textured_videofuncs.c40
4 files changed, 360 insertions, 98 deletions
diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c
index ba358ab..28bb6e5 100644
--- a/src/radeon_commonfuncs.c
+++ b/src/radeon_commonfuncs.c
@@ -220,10 +220,10 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
/* pre-load the vertex shaders */
if (info->accel_state->has_tcl) {
- /* exa mask/Xv bicubic shader program */
- BEGIN_ACCEL(13);
- OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
- /* PVS inst 0 */
+ BEGIN_ACCEL(37);
+ /* exa composite shader program */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_INST_INDEX(0));
+ /* PVS inst 0 - dst X,Y */
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_DST_OPCODE(R300_VE_ADD) |
R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
@@ -235,8 +235,8 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_OFFSET(0) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
- R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_1)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(0) |
@@ -252,20 +252,26 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
- /* PVS inst 1 */
+ /* PVS inst 1 - src X */
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
- (R300_PVS_DST_OPCODE(R300_VE_ADD) |
- R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
- R300_PVS_DST_OFFSET(1) |
- R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
- R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ (R300_PVS_DST_OPCODE(R300_VE_DOT_PRODUCT) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_TEMPORARY) |
+ R300_PVS_DST_OFFSET(0) |
+ R300_PVS_DST_WE_X));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_1) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
@@ -273,6 +279,27 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+
+ /* PVS inst 2 - src Y */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_DOT_PRODUCT) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_TEMPORARY) |
+ R300_PVS_DST_OFFSET(0) |
+ R300_PVS_DST_WE_Y));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(6) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_1) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(1) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
@@ -281,82 +308,138 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
- /* PVS inst 2 */
+ /* PVS inst 3 - src X / w */
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
- (R300_PVS_DST_OPCODE(R300_VE_ADD) |
+ (R300_PVS_DST_OPCODE(R300_VE_MULTIPLY) |
R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
- R300_PVS_DST_OFFSET(2) |
- R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
- R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ R300_PVS_DST_OFFSET(1) |
+ R300_PVS_DST_WE_X));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
- (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(7) |
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_TEMPORARY) |
+ R300_PVS_SRC_OFFSET(0) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
- R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
- R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_W) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_OFFSET(6) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+
+ /* PVS inst 4 - src y / h */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_MULTIPLY) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
+ R300_PVS_DST_OFFSET(1) |
+ R300_PVS_DST_WE_Y));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_TEMPORARY) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(1) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_W) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_OFFSET(6) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
- FINISH_ACCEL();
- BEGIN_ACCEL(9);
- /* exa no mask instruction */
- OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, 3);
- /* PVS inst 0 */
+ /* PVS inst 5 - mask X */
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
- (R300_PVS_DST_OPCODE(R300_VE_ADD) |
- R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
+ (R300_PVS_DST_OPCODE(R300_VE_DOT_PRODUCT) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_TEMPORARY) |
R300_PVS_DST_OFFSET(0) |
- R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
- R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ R300_PVS_DST_WE_Z));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_1) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(2) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_OFFSET(7) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+
+ /* PVS inst 6 - mask Y */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_DOT_PRODUCT) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_TEMPORARY) |
+ R300_PVS_DST_OFFSET(0) |
+ R300_PVS_DST_WE_W));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_1) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(3) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(7) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
- /* PVS inst 1 */
+ /* PVS inst 7 - mask X / w */
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
- (R300_PVS_DST_OPCODE(R300_VE_ADD) |
+ (R300_PVS_DST_OPCODE(R300_VE_MULTIPLY) |
R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
- R300_PVS_DST_OFFSET(1) |
- R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
- R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ R300_PVS_DST_OFFSET(2) |
+ R300_PVS_DST_WE_X));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
- (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
- R300_PVS_SRC_OFFSET(6) |
- R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
- R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
- R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_TEMPORARY) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_Z) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(2) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_W) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
@@ -364,6 +447,27 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+
+ /* PVS inst 8 - mask y / h */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_MULTIPLY) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
+ R300_PVS_DST_OFFSET(2) |
+ R300_PVS_DST_WE_Y));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_TEMPORARY) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_W) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_CONSTANT) |
+ R300_PVS_SRC_OFFSET(3) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_W) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
@@ -375,7 +479,7 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
/* Xv shader program */
BEGIN_ACCEL(9);
- OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, 5);
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_INST_INDEX(9));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_DST_OPCODE(R300_VE_ADD) |
@@ -388,8 +492,8 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_OFFSET(0) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
- R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_1)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(0) |
@@ -409,15 +513,14 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
(R300_PVS_DST_OPCODE(R300_VE_ADD) |
R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
R300_PVS_DST_OFFSET(1) |
- R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
- R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
- R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_Z) |
- R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_W)));
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_1)));
OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
(R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
R300_PVS_SRC_OFFSET(6) |
@@ -433,6 +536,97 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn)
R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
FINISH_ACCEL();
+
+ /* Xv bicubic shader program */
+ BEGIN_ACCEL(13);
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_INST_INDEX(11));
+ /* PVS inst 0 */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_ADD) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
+ R300_PVS_DST_OFFSET(0) |
+ R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
+ R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_1)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(0) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+
+ /* PVS inst 1 */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_ADD) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
+ R300_PVS_DST_OFFSET(1) |
+ R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
+ R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(6) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_1)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(6) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(6) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+
+ /* PVS inst 2 */
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_DST_OPCODE(R300_VE_ADD) |
+ R300_PVS_DST_REG_TYPE(R300_PVS_DST_REG_OUT) |
+ R300_PVS_DST_OFFSET(2) |
+ R300_PVS_DST_WE_X | R300_PVS_DST_WE_Y |
+ R300_PVS_DST_WE_Z | R300_PVS_DST_WE_W));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_X) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_Y) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_1)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG,
+ (R300_PVS_SRC_REG_TYPE(R300_PVS_SRC_REG_INPUT) |
+ R300_PVS_SRC_OFFSET(7) |
+ R300_PVS_SRC_SWIZZLE_X(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Y(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) |
+ R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0)));
+ FINISH_ACCEL();
}
/* pre-load the RS instructions */
diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c
index 8dbbee9..89c803a 100644
--- a/src/radeon_exa_render.c
+++ b/src/radeon_exa_render.c
@@ -1099,9 +1099,6 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
*/
txformat0 |= R300_TXPITCH_EN;
- info->accel_state->texW[unit] = w;
- info->accel_state->texH[unit] = h;
-
txfilter = (unit << R300_TX_ID_SHIFT);
if (pPict->repeat) {
@@ -1160,8 +1157,61 @@ static Bool FUNC_NAME(R300TextureSetup)(PicturePtr pPict, PixmapPtr pPix,
if (pPict->transform != 0) {
info->accel_state->is_transform[unit] = TRUE;
info->accel_state->transform[unit] = pPict->transform;
+
+ /* setup the PVS consts */
+ if (info->accel_state->has_tcl) {
+ info->accel_state->texW[unit] = 1;
+ info->accel_state->texH[unit] = 1;
+ BEGIN_ACCEL(9);
+ if (IS_R300_3D)
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_CONST_INDEX(unit * 2));
+ else
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R500_PVS_VECTOR_CONST_INDEX(unit * 2));
+
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][0])));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][1])));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[0][2])));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/w));
+
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][0])));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][1])));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(xFixedToFloat(pPict->transform->matrix[1][2])));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/h));
+
+ FINISH_ACCEL();
+ } else {
+ info->accel_state->texW[unit] = w;
+ info->accel_state->texH[unit] = h;
+ }
} else {
info->accel_state->is_transform[unit] = FALSE;
+
+ /* setup the PVS consts */
+ if (info->accel_state->has_tcl) {
+ info->accel_state->texW[unit] = 1;
+ info->accel_state->texH[unit] = 1;
+
+ BEGIN_ACCEL(9);
+ if (IS_R300_3D)
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R300_PVS_VECTOR_CONST_INDEX(unit * 2));
+ else
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_INDX_REG, R500_PVS_VECTOR_CONST_INDEX(unit * 2));
+
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/w));
+
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(0.0));
+ OUT_ACCEL_REG(R300_VAP_PVS_VECTOR_DATA_REG, F_TO_DW(1.0/h));
+
+ FINISH_ACCEL();
+ } else {
+ info->accel_state->texW[unit] = w;
+ info->accel_state->texH[unit] = h;
+ }
}
return TRUE;
@@ -1310,9 +1360,10 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
/* setup the VAP */
if (info->accel_state->has_tcl) {
if (pMask)
- BEGIN_ACCEL(8);
+ BEGIN_ACCEL(10);
else
- BEGIN_ACCEL(7);
+ BEGIN_ACCEL(9);
+ OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0);
} else {
if (pMask)
BEGIN_ACCEL(6);
@@ -1363,22 +1414,28 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture,
/* load the vertex shader
* We pre-load vertex programs in RADEONInit3DEngine():
- * - exa no mask
- * - exa mask
+ * - exa
* - Xv
+ * - Xv bicubic
* Here we select the offset of the vertex program we want to use
*/
if (info->accel_state->has_tcl) {
if (pMask) {
+ /* consts used by vertex shaders */
+ OUT_ACCEL_REG(R300_VAP_PVS_CONST_CNTL, (R300_PVS_CONST_BASE_OFFSET(0) |
+ R300_PVS_MAX_CONST_ADDR(3)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
((0 << R300_PVS_FIRST_INST_SHIFT) |
- (2 << R300_PVS_XYZW_VALID_INST_SHIFT) |
- (2 << R300_PVS_LAST_INST_SHIFT)));
+ (8 << R300_PVS_XYZW_VALID_INST_SHIFT) |
+ (8 << R300_PVS_LAST_INST_SHIFT)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
- (2 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
+ (8 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
} else {
+ /* consts used by vertex shaders */
+ OUT_ACCEL_REG(R300_VAP_PVS_CONST_CNTL, (R300_PVS_CONST_BASE_OFFSET(0) |
+ R300_PVS_MAX_CONST_ADDR(3)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
- ((3 << R300_PVS_FIRST_INST_SHIFT) |
+ ((0 << R300_PVS_FIRST_INST_SHIFT) |
(4 << R300_PVS_XYZW_VALID_INST_SHIFT) |
(4 << R300_PVS_LAST_INST_SHIFT)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
@@ -2054,10 +2111,12 @@ static void FUNC_NAME(RadeonCompositeTile)(ScrnInfoPtr pScrn,
srcBottomRight.y = IntToxFixed(srcY + h);
if (info->accel_state->is_transform[0]) {
- transformPoint(info->accel_state->transform[0], &srcTopLeft);
- transformPoint(info->accel_state->transform[0], &srcTopRight);
- transformPoint(info->accel_state->transform[0], &srcBottomLeft);
- transformPoint(info->accel_state->transform[0], &srcBottomRight);
+ if ((info->ChipFamily < CHIP_FAMILY_R300) || !info->accel_state->has_tcl) {
+ transformPoint(info->accel_state->transform[0], &srcTopLeft);
+ transformPoint(info->accel_state->transform[0], &srcTopRight);
+ transformPoint(info->accel_state->transform[0], &srcBottomLeft);
+ transformPoint(info->accel_state->transform[0], &srcBottomRight);
+ }
}
if (info->accel_state->has_mask) {
@@ -2071,10 +2130,12 @@ static void FUNC_NAME(RadeonCompositeTile)(ScrnInfoPtr pScrn,
maskBottomRight.y = IntToxFixed(maskY + h);
if (info->accel_state->is_transform[1]) {
- transformPoint(info->accel_state->transform[1], &maskTopLeft);
- transformPoint(info->accel_state->transform[1], &maskTopRight);
- transformPoint(info->accel_state->transform[1], &maskBottomLeft);
- transformPoint(info->accel_state->transform[1], &maskBottomRight);
+ if ((info->ChipFamily < CHIP_FAMILY_R300) || !info->accel_state->has_tcl) {
+ transformPoint(info->accel_state->transform[1], &maskTopLeft);
+ transformPoint(info->accel_state->transform[1], &maskTopRight);
+ transformPoint(info->accel_state->transform[1], &maskBottomLeft);
+ transformPoint(info->accel_state->transform[1], &maskBottomRight);
+ }
}
vtx_count = 6;
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 248cb42..9261b39 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -4284,6 +4284,12 @@
#define R300_VAP_PVS_CODE_CNTL_1 0x22D8
# define R300_PVS_LAST_VTX_SRC_INST_SHIFT 0
#define R300_VAP_PVS_VECTOR_INDX_REG 0x2200
+# define R300_PVS_CODE_START 0
+# define R300_PVS_CONST_START 512
+# define R500_PVS_CONST_START 1024
+# define R300_PVS_VECTOR_INST_INDEX(x) ((x) + R300_PVS_CODE_START)
+# define R300_PVS_VECTOR_CONST_INDEX(x) ((x) + R300_PVS_CONST_START)
+# define R500_PVS_VECTOR_CONST_INDEX(x) ((x) + R500_PVS_CONST_START)
#define R300_VAP_PVS_VECTOR_DATA_REG 0x2204
/* PVS instructions */
/* Opcode and dst instruction */
@@ -4402,6 +4408,10 @@
#define R300_PVS_SRC_ADDR_SEL(x) ((x) << 29)
#define R300_PVS_SRC_ADDR_MODE_1 (1 << 31)
+#define R300_VAP_PVS_CONST_CNTL 0x22d4
+# define R300_PVS_CONST_BASE_OFFSET(x) ((x) << 0)
+# define R300_PVS_MAX_CONST_ADDR(x) ((x) << 16)
+
#define R300_VAP_PVS_FLOW_CNTL_OPC 0x22dc
#define R300_VAP_OUT_VTX_FMT_0 0x2090
# define R300_VTX_POS_PRESENT (1 << 0)
@@ -5441,9 +5451,6 @@
# define R500_W_SRC_US (0 << 2)
# define R500_W_SRC_RAS (1 << 2)
-#define R500_GA_US_VECTOR_INDEX 0x4250
-#define R500_GA_US_VECTOR_DATA 0x4254
-
#define R500_RS_INST_0 0x4320
#define R500_RS_INST_1 0x4324
# define R500_RS_INST_TEX_ID_SHIFT 0
diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c
index bbc5caf..8ead2a4 100644
--- a/src/radeon_textured_videofuncs.c
+++ b/src/radeon_textured_videofuncs.c
@@ -1213,26 +1213,26 @@ FUNC_NAME(R300DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
/* load the vertex shader
* We pre-load vertex programs in RADEONInit3DEngine():
- * - exa mask/Xv bicubic
- * - exa no mask
+ * - exa
* - Xv
+ * - Xv bicubic
* Here we select the offset of the vertex program we want to use
*/
if (info->accel_state->has_tcl) {
if (pPriv->bicubic_enabled) {
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
- ((0 << R300_PVS_FIRST_INST_SHIFT) |
- (2 << R300_PVS_XYZW_VALID_INST_SHIFT) |
- (2 << R300_PVS_LAST_INST_SHIFT)));
+ ((11 << R300_PVS_FIRST_INST_SHIFT) |
+ (13 << R300_PVS_XYZW_VALID_INST_SHIFT) |
+ (13 << R300_PVS_LAST_INST_SHIFT)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
- (2 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
+ (13 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
} else {
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
- ((5 << R300_PVS_FIRST_INST_SHIFT) |
- (6 << R300_PVS_XYZW_VALID_INST_SHIFT) |
- (6 << R300_PVS_LAST_INST_SHIFT)));
+ ((9 << R300_PVS_FIRST_INST_SHIFT) |
+ (10 << R300_PVS_XYZW_VALID_INST_SHIFT) |
+ (10 << R300_PVS_LAST_INST_SHIFT)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
- (6 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
+ (10 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
}
}
@@ -2643,26 +2643,26 @@ FUNC_NAME(R500DisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv)
/* load the vertex shader
* We pre-load vertex programs in RADEONInit3DEngine():
- * - exa mask/Xv bicubic
- * - exa no mask
+ * - exa
* - Xv
+ * - Xv bicubic
* Here we select the offset of the vertex program we want to use
*/
if (info->accel_state->has_tcl) {
if (pPriv->bicubic_enabled) {
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
- ((0 << R300_PVS_FIRST_INST_SHIFT) |
- (2 << R300_PVS_XYZW_VALID_INST_SHIFT) |
- (2 << R300_PVS_LAST_INST_SHIFT)));
+ ((11 << R300_PVS_FIRST_INST_SHIFT) |
+ (13 << R300_PVS_XYZW_VALID_INST_SHIFT) |
+ (13 << R300_PVS_LAST_INST_SHIFT)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
- (2 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
+ (13 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
} else {
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0,
- ((5 << R300_PVS_FIRST_INST_SHIFT) |
- (6 << R300_PVS_XYZW_VALID_INST_SHIFT) |
- (6 << R300_PVS_LAST_INST_SHIFT)));
+ ((9 << R300_PVS_FIRST_INST_SHIFT) |
+ (10 << R300_PVS_XYZW_VALID_INST_SHIFT) |
+ (10 << R300_PVS_LAST_INST_SHIFT)));
OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1,
- (6 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
+ (10 << R300_PVS_LAST_VTX_SRC_INST_SHIFT));
}
}