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authorMengdong Lin <mengdong.lin@intel.com>2013-08-13 00:22:24 -0400
committerBen Widawsky <benjamin.widawsky@intel.com>2013-11-06 09:39:41 -0800
commit97e5cf6006077d2ea1b58b5d7993756e9ec1c8b4 (patch)
tree4c24bcf3cec85b7c9fe9e08ec6d142e513c965ce /tools
parentf075c3c0688c8f2d38bf49691110934e1c2d2032 (diff)
intel_audio_dump/bdw: dump audio DP and DIP FIFO debug status
Signed-off-by: Mengdong Lin <mengdong.lin@intel.com> Reviewed-by: Xingchao Wang <xingchao.wang@intel.com> Signed-off-by: Ben Widawsky <benjamin.widawsky@intel.com>
Diffstat (limited to 'tools')
-rw-r--r--tools/intel_audio_dump.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/tools/intel_audio_dump.c b/tools/intel_audio_dump.c
index 3475caaa..619734cd 100644
--- a/tools/intel_audio_dump.c
+++ b/tools/intel_audio_dump.c
@@ -315,6 +315,28 @@ static const char * const en_mmio_program[] = {
[1] = "Programming by MMIO debug registers",
};
+static const char * const audio_dp_dip_status[] = {
+ [0] = "audfc dp fifo full",
+ [1] = "audfc dp fifo empty",
+ [2] = "audfc dp fifo overrun",
+ [3] = "audfc dip fifo full",
+ [4] = "audfc dp fifo empty cd",
+ [5] = "audfb dp fifo full",
+ [6] = "audfb dp fifo empty",
+ [7] = "audfb dp fifo overrun",
+ [8] = "audfb dip fifo full",
+ [9] = "audfb dp fifo empty cd",
+ [10] = "audfa dp fifo full",
+ [11] = "audfa dp fifo empty",
+ [12] = "audfa dp fifo overrun",
+ [13] = "audfa dip fifo full",
+ [14] = "audfa dp fifo empty cd",
+ [15] = "Pipe c audio overflow",
+ [16] = "Pipe b audio overflow",
+ [17] = "Pipe a audio overflow",
+ [31] = 0,
+};
+
static void do_self_tests(void)
{
if (BIT(1, 0) != 1)
@@ -1632,6 +1654,7 @@ static void dump_cpt(void)
#define AUD_IRII 0x65f04
#define AUD_ICS 0x65f08
#define AUD_CHICKENBIT_REG 0x65f10
+#define AUD_DP_DIP_STATUS 0x65f20
/* Video DIP Control */
#define VIDEO_DIP_CTL_A 0x60200
@@ -2002,6 +2025,7 @@ static void parse_bdw_audio_chicken_bit_reg(uint32_t dword)
static void dump_hsw_plus(void)
{
uint32_t dword;
+ int i;
/* HSW DDI Buffer */
dump_reg(DDI_BUF_CTL_A, "DDI Buffer Controler A");
@@ -2076,6 +2100,7 @@ static void dump_hsw_plus(void)
dump_reg(AUD_IRII, "Audio Immediate Response Input Interface");
dump_reg(AUD_ICS, "Audio Immediate Command Status");
dump_reg(AUD_CHICKENBIT_REG, "Audio Chicken Bit Register");
+ dump_reg(AUD_DP_DIP_STATUS, "Audio DP and DIP FIFO Debug Status");
printf("\nDetails:\n\n");
@@ -2151,6 +2176,12 @@ static void dump_hsw_plus(void)
if (IS_BROADWELL(devid))
parse_bdw_audio_chicken_bit_reg(dword);
+ dword = INREG(AUD_DP_DIP_STATUS);
+ printf("AUD_DP_DIP_STATUS Audio DP & DIP FIFO Status: %08x\n\t", dword);
+ for (i = 31; i >= 0; i--)
+ if (BIT(dword, i))
+ printf("%s\n\t", audio_dp_dip_status[i]);
+ printf("\n");
}
int main(int argc, char **argv)