diff options
| author | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-03-31 13:19:43 -0700 |
|---|---|---|
| committer | Ben Widawsky <benjamin.widawsky@intel.com> | 2015-03-31 13:19:43 -0700 |
| commit | 0ab9356b97ffecc96db95297b73a5ab65563dfa8 (patch) | |
| tree | 654c7179b71b80a49535c19386e56a44433675b4 | |
| parent | c0f3dfb853d0f7dde4c6cb3a2876bbe5bf31f982 (diff) | |
drm/i915: Add BDWmi_urb_clear
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 13 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_gem_context.c | 11 |
2 files changed, 18 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 2f385102839e..ffdd0f076acd 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2693,7 +2693,18 @@ void i915_gem_object_ggtt_unpin(struct drm_i915_gem_object *obj); static inline uint16_t intel_urb_clear_size(struct drm_device *dev) { - if (IS_HASWELL(dev)) { + if (IS_BROADWELL(dev)) { + /* This isn't totally accurate for BDW, but meh */ + switch(INTEL_DEVID(dev) & 0x00F0 >> 4) { + case 2: + case 1: + return 384; + case 0: + return 192; + default: + BUG(); + } + } else if (IS_HASWELL(dev)) { switch(INTEL_DEVID(dev) & 0x00F0 >> 4) { case 2: return 512; diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c index 8c145dfd8ece..1044879960de 100644 --- a/drivers/gpu/drm/i915/i915_gem_context.c +++ b/drivers/gpu/drm/i915/i915_gem_context.c @@ -498,13 +498,14 @@ mi_set_context(struct intel_engine_cs *ring, len = 4; - /* PSMI workaround */ - if (INTEL_INFO(ring->dev)->gen >= 7) + if (INTEL_INFO(ring->dev)->gen >= 7) { + /* PSMI workaround */ len += 2 + (num_rings ? 4*num_rings + 2 : 0); - /* MI_URB_CLEAR */ - if (IS_GEN7(ring->dev)) + /* MI_URB_CLEAR */ len += 2; + } + ret = intel_ring_begin(ring, len); if (ret) @@ -532,7 +533,7 @@ mi_set_context(struct intel_engine_cs *ring, /* MI_URB_CLEAR must be programmed following MI_SET_CONTEXT and before * workload is submitted, when a given context expects URB locations to * be initialized to 0x0. (GEN7) */ - if (IS_GEN7(ring->dev)) { + if (INTEL_INFO(ring->dev)->gen >= 7) { /* Convert to 256b quantities */ const uint16_t urb_size = intel_urb_clear_size(ring->dev) << 5; intel_ring_emit(ring, MI_URB_CLEAR); |