diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-01-27 18:50:21 +0100 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-01-27 18:50:21 +0100 |
| commit | 611e0cb333b9c0c55985b5d40d7c0c76e15b343b (patch) | |
| tree | fb936eedada1ffa3d54f945be5fe78eaf6a05479 | |
| parent | 6b6b13906a22d7d1f0205a6a44b6c760b4c3fe97 (diff) | |
intel_reg_dumper: add TRANS_VSYNCSHIFT
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | lib/intel_reg.h | 3 | ||||
| -rw-r--r-- | tools/intel_reg_dumper.c | 3 |
2 files changed, 6 insertions, 0 deletions
diff --git a/lib/intel_reg.h b/lib/intel_reg.h index 4e2c735d..c7cd8575 100644 --- a/lib/intel_reg.h +++ b/lib/intel_reg.h @@ -3192,6 +3192,7 @@ typedef enum { #define TRANS_VSYNC_A 0xe0014 #define TRANS_VSYNC_END_SHIFT 16 #define TRANS_VSYNC_START_SHIFT 0 +#define TRANS_VSYNCSHIFT_A 0xe0028 #define TRANSA_DATA_M1 0xe0030 #define TRANSA_DATA_N1 0xe0034 @@ -3208,6 +3209,7 @@ typedef enum { #define TRANS_VTOTAL_B 0xe100c #define TRANS_VBLANK_B 0xe1010 #define TRANS_VSYNC_B 0xe1014 +#define TRANS_VSYNCSHIFT_B 0xe1028 #define TRANSB_DATA_M1 0xe1030 #define TRANSB_DATA_N1 0xe1034 @@ -3224,6 +3226,7 @@ typedef enum { #define TRANS_VTOTAL_C 0xe200c #define TRANS_VBLANK_C 0xe2010 #define TRANS_VSYNC_C 0xe2014 +#define TRANS_VSYNCSHIFT_C 0xe2028 #define TRANSC_DATA_M1 0xe2030 #define TRANSC_DATA_N1 0xe2034 diff --git a/tools/intel_reg_dumper.c b/tools/intel_reg_dumper.c index 1a5325f7..be30fa1e 100644 --- a/tools/intel_reg_dumper.c +++ b/tools/intel_reg_dumper.c @@ -1597,6 +1597,7 @@ static struct reg_debug ironlake_debug_regs[] = { DEFINEREG2(TRANS_VTOTAL_A, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_A, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_A, i830_debug_hvsyncblank), + DEFINEREG(TRANS_VSYNCSHIFT_A), DEFINEREG2(TRANSA_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(TRANSA_DATA_N1, ironlake_debug_n), @@ -1613,6 +1614,7 @@ static struct reg_debug ironlake_debug_regs[] = { DEFINEREG2(TRANS_VTOTAL_B, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_B, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_B, i830_debug_hvsyncblank), + DEFINEREG(TRANS_VSYNCSHIFT_B), DEFINEREG2(TRANSB_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(TRANSB_DATA_N1, ironlake_debug_n), @@ -1629,6 +1631,7 @@ static struct reg_debug ironlake_debug_regs[] = { DEFINEREG2(TRANS_VTOTAL_C, i830_debug_hvtotal), DEFINEREG2(TRANS_VBLANK_C, i830_debug_hvsyncblank), DEFINEREG2(TRANS_VSYNC_C, i830_debug_hvsyncblank), + DEFINEREG(TRANS_VSYNCSHIFT_C), DEFINEREG2(TRANSC_DATA_M1, ironlake_debug_m_tu), DEFINEREG2(TRANSC_DATA_N1, ironlake_debug_n), |