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authorAndre Maasikas <amaasikas@gmail.com>2010-09-01 09:19:51 +0300
committerAndre Maasikas <amaasikas@gmail.com>2010-09-01 09:19:51 +0300
commitc3c25a7ab8507c9c6b21137de03b5d94c2420369 (patch)
treec2e9898f4186fcd49933a0cbe26f7aa3d300a319
parent1d7b4af81781512b5bc5d43249529441d60ecebe (diff)
r600: cube mipmap levels are aligned to 8 faces only starting from r7xx
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
index c6e5f110ea..ddfde3edaf 100644
--- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
+++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c
@@ -199,10 +199,10 @@ static void calculate_miptree_layout_r300(radeonContextPtr rmesa, radeon_mipmap_
for(face = 0; face < mt->faces; face++)
compute_tex_image_offset(rmesa, mt, face, level, &curOffset);
- /* r600 cube levels seems to be aligned to 8 faces but
- * we have separate register for 1'st level offset so add
+ /* from r700? cube levels seems to be aligned to 8 faces,
+ * as we have separate register for 1'st level offset add
* 2 image alignment after 1'st mip level */
- if(rmesa->radeonScreen->chip_family >= CHIP_FAMILY_R600 &&
+ if(rmesa->radeonScreen->chip_family >= CHIP_FAMILY_RV770 &&
mt->target == GL_TEXTURE_CUBE_MAP && level >= 1)
curOffset += 2 * mt->levels[level].size;
}