summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
-rw-r--r--src/mga_dacG.c21
1 files changed, 1 insertions, 20 deletions
diff --git a/src/mga_dacG.c b/src/mga_dacG.c
index c98ae97..aadd8aa 100644
--- a/src/mga_dacG.c
+++ b/src/mga_dacG.c
@@ -309,10 +309,6 @@ MGAG200WBPIXPLLSET(ScrnInfoPtr pScrn, MGARegPtr mgaReg)
ucTempByte |= 0x3<<2; //select MGA pixel clock
OUTREG8(MGAREG_MEM_MISC_WRITE, ucTempByte);
- // Set pixlock to 0
- ucTempByte = inMGAdac(MGA1064_PIX_PLL_STAT);
- outMGAdac(MGA1064_PIX_PLL_STAT, ucTempByte & ~0x40);
-
ucPixCtrl |= MGA1064_PIX_CLK_CTL_CLK_POW_DOWN | 0x80;
outMGAdac(MGA1064_PIX_CLK_CTL, ucPixCtrl);
@@ -331,24 +327,13 @@ MGAG200WBPIXPLLSET(ScrnInfoPtr pScrn, MGARegPtr mgaReg)
usleep(50);
// Program the Pixel PLL Register
- outMGAdac(MGA1064_WB_PIX_PLLC_M, mgaReg->PllM);
outMGAdac(MGA1064_WB_PIX_PLLC_N, mgaReg->PllN);
+ outMGAdac(MGA1064_WB_PIX_PLLC_M, mgaReg->PllM);
outMGAdac(MGA1064_WB_PIX_PLLC_P, mgaReg->PllP);
// Wait 50 us
usleep(50);
- ucTempByte = INREG8(MGAREG_MEM_MISC_READ);
- OUTREG8(MGAREG_MEM_MISC_WRITE, ucTempByte);
-
- // Wait 50 us
- usleep(50);
-
- OUTREG8(MGAREG_MEM_MISC_WRITE, ucTempByte);
-
- // Wait 500 us
- usleep(500);
-
// Turning the PLL on
ucTempByte = inMGAdac(MGA1064_VREF_CTL);
ucTempByte |= 0x04;
@@ -368,10 +353,6 @@ MGAG200WBPIXPLLSET(ScrnInfoPtr pScrn, MGARegPtr mgaReg)
ucTempByte |= MGA1064_REMHEADCTL_CLKSL_PLL;
outMGAdac(MGA1064_REMHEADCTL, ucTempByte);
- // Set pixlock to 1
- ucTempByte = inMGAdac(MGA1064_PIX_PLL_STAT);
- outMGAdac(MGA1064_PIX_PLL_STAT, ucTempByte | 0x40);
-
// Reset dotclock rate bit.
OUTREG8(MGAREG_SEQ_INDEX, 1);
ucTempByte = INREG8(MGAREG_SEQ_DATA);