Remove pNv->Chipset use

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

4 files changed, 7 insertions, 55 deletions

diff --git a/src/nouveau_xv.c b/src/nouveau_xv.c
index a6cec9b..8416f2b 100644
--- a/src/nouveau_xv.c
+++ b/src/nouveau_xv.c
@@ -869,12 +869,12 @@ NV_set_action_flags(ScrnInfoPtr pScrn, DrawablePtr pDraw, NVPortPrivPtr pPriv,
 	if (USING_OVERLAY && (pNv->Architecture == NV_ARCH_10 ||
 			      pNv->Architecture == NV_ARCH_20)) {
 		/* No YV12 overlay on NV10, 11, 15, 20, NFORCE */
-		switch (pNv->Chipset & 0xfff0) {
-		case CHIPSET_NV10:
-		case CHIPSET_NV11:
-		case CHIPSET_NV15:
-		case CHIPSET_NFORCE: /*XXX: unsure about nforce*/
-		case CHIPSET_NV20:
+		switch (pNv->NVArch) {
+		case 0x10:
+		case 0x11:
+		case 0x15:
+		case 0x1a: /*XXX: unsure about nforce */
+		case 0x20:
 			*action_flags |= CONVERT_TO_YUY2;
 			break;
 		default:
diff --git a/src/nv04_xv_blit.c b/src/nv04_xv_blit.c
index c1451e3..831a0f0 100644
--- a/src/nv04_xv_blit.c
+++ b/src/nv04_xv_blit.c
@@ -141,7 +141,7 @@ NVPutBlitImage(ScrnInfoPtr pScrn, struct nouveau_bo *src, int src_offset,
                         NVWaitVSync(pScrn, 1);
         }
 
-        if ((pNv->Chipset & 0xffff) > CHIPSET_NV04) {
+        if (pNv->NVArch >= 0x05) {
                 BEGIN_RING(chan, sifm,
 				 NV04_SCALED_IMAGE_FROM_MEMORY_COLOR_FORMAT, 2);
                 OUT_RING  (chan, src_format);
diff --git a/src/nv_driver.c b/src/nv_driver.c
index f2a2cbc..f31298b 100644
--- a/src/nv_driver.c
+++ b/src/nv_driver.c
@@ -681,7 +681,6 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
 	volatile uint32_t *regs = NULL;
 	pci_device_map_range(pNv->PciInfo, pNv->PciInfo->regions[0].base_addr,
 			     0x90000, 0, (void *)&regs);
-	pNv->Chipset = NVGetPCIID(regs) & 0xffff;
 	pNv->NVArch = NVGetArchitecture(regs);
 	pci_device_unmap_range(pNv->PciInfo, (void *) regs, 0x90000);
 
@@ -692,16 +691,6 @@ NVPreInit(ScrnInfoPtr pScrn, int flags)
 		pScrn->chipset = "Unknown NVIDIA";
 	}
 
-	/*
-	* This shouldn't happen because such problems should be caught in
-	* NVProbe(), but check it just in case.
-	*/
-	if (pScrn->chipset == NULL)
-		NVPreInitFail("ChipID 0x%04X is not recognised\n", pNv->Chipset);
-
-	if (pNv->NVArch < 0x04)
-		NVPreInitFail("Chipset \"%s\" is not recognised\n", pScrn->chipset);
-
 	xf86DrvMsg(pScrn->scrnIndex, X_PROBED, "Chipset: \"%s\"\n", pScrn->chipset);
 
 	/* The highest architecture currently supported is NV5x */
diff --git a/src/nv_type.h b/src/nv_type.h
index e75c37a..a30c1ee 100644
--- a/src/nv_type.h
+++ b/src/nv_type.h
@@ -25,49 +25,12 @@
 #define NV_ARCH_40  0x40
 #define NV_ARCH_50  0x50
 
-#define CHIPSET_NV03     0x0010
-#define CHIPSET_NV04     0x0020
-#define CHIPSET_NV10     0x0100
-#define CHIPSET_NV11     0x0110
-#define CHIPSET_NV15     0x0150
-#define CHIPSET_NV17     0x0170
-#define CHIPSET_NV18     0x0180
-#define CHIPSET_NFORCE   0x01A0
-#define CHIPSET_NFORCE2  0x01F0
-#define CHIPSET_NV20     0x0200
-#define CHIPSET_NV25     0x0250
-#define CHIPSET_NV28     0x0280
-#define CHIPSET_NV30     0x0300
-#define CHIPSET_NV31     0x0310
-#define CHIPSET_NV34     0x0320
-#define CHIPSET_NV35     0x0330
-#define CHIPSET_NV36     0x0340
-#define CHIPSET_NV40     0x0040
-#define CHIPSET_NV41     0x00C0
-#define CHIPSET_NV43     0x0140
-#define CHIPSET_NV44     0x0160
-#define CHIPSET_NV44A    0x0220
-#define CHIPSET_NV45     0x0210
-#define CHIPSET_NV50     0x0190
-#define CHIPSET_NV84     0x0400
-#define CHIPSET_MISC_BRIDGED  0x00F0
-#define CHIPSET_G70      0x0090
-#define CHIPSET_G71      0x0290
-#define CHIPSET_G72      0x01D0
-#define CHIPSET_G73      0x0390
-// integrated GeForces (6100, 6150)
-#define CHIPSET_C51      0x0240
-// variant of C51, seems based on a G70 design
-#define CHIPSET_C512     0x03D0
-#define CHIPSET_G73_BRIDGED 0x02E0
-
 /* NV50 */
 typedef struct _NVRec *NVPtr;
 typedef struct _NVRec {
     uint32_t              Architecture;
     EntityInfoPtr       pEnt;
 	struct pci_device *PciInfo;
-    int                 Chipset;
     int                 NVArch;
     Bool                Primary;